80 files changed, 347 insertions, 270 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index f728ac2b298a..ebb6c6f30c56 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -824,7 +824,7 @@ ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE
 M:      Alexander Shiyan <shc_work@mail.ru>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Odd Fixes
-F:      arch/arm/mach-clps711x/
+N:      clps711x
 
 ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE
 M:      Hartley Sweeten <hsweeten@visionengravers.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b4ac5de6dec..79bea0b34d1f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -423,6 +423,7 @@ config ARCH_EFM32
         bool "Energy Micro efm32"
         depends on !MMU
         select ARCH_REQUIRE_GPIOLIB
+        select AUTO_ZRELADDR
         select ARM_NVIC
         # CLKSRC_MMIO is wrong here, but needed until a proper fix is merged,
         # i.e. CLKSRC_EFM32 selecting CLKSRC_MMIO
@@ -698,6 +699,7 @@ config ARCH_RPC
         select ARCH_MAY_HAVE_PC_FDC
         select ARCH_SPARSEMEM_ENABLE
         select ARCH_USES_GETTIMEOFFSET
+        select CPU_SA110
         select FIQ
         select HAVE_IDE
         select HAVE_PATA_PLATFORM
@@ -732,6 +734,7 @@ config ARCH_S3C24XX
         bool "Samsung S3C24XX SoCs"
         select ARCH_HAS_CPUFREQ
         select ARCH_REQUIRE_GPIOLIB
+        select ATAGS
         select CLKDEV_LOOKUP
         select CLKSRC_SAMSUNG_PWM
         select GENERIC_CLOCKEVENTS
@@ -754,6 +757,7 @@ config ARCH_S3C64XX
         select ARCH_REQUIRE_GPIOLIB
         select ARM_AMBA
         select ARM_VIC
+        select ATAGS
         select CLKDEV_LOOKUP
         select CLKSRC_SAMSUNG_PWM
         select COMMON_CLK
@@ -765,7 +769,7 @@ config ARCH_S3C64XX
         select HAVE_TCM
         select NO_IOPORT
         select PLAT_SAMSUNG
-        select PM_GENERIC_DOMAINS
+        select PM_GENERIC_DOMAINS if PM
         select S3C_DEV_NAND
         select S3C_GPIO_TRACK
         select SAMSUNG_ATAGS
@@ -776,6 +780,7 @@ config ARCH_S3C64XX
 
 config ARCH_S5P64X0
         bool "Samsung S5P6440 S5P6450"
+        select ATAGS
         select CLKDEV_LOOKUP
         select CLKSRC_SAMSUNG_PWM
         select CPU_V6
@@ -794,6 +799,7 @@ config ARCH_S5P64X0
 config ARCH_S5PC100
         bool "Samsung S5PC100"
         select ARCH_REQUIRE_GPIOLIB
+        select ATAGS
         select CLKDEV_LOOKUP
         select CLKSRC_SAMSUNG_PWM
         select CPU_V7
@@ -813,6 +819,7 @@ config ARCH_S5PV210
         select ARCH_HAS_CPUFREQ
         select ARCH_HAS_HOLES_MEMORYMODEL
         select ARCH_SPARSEMEM_ENABLE
+        select ATAGS
         select CLKDEV_LOOKUP
         select CLKSRC_SAMSUNG_PWM
         select CPU_V7
@@ -886,6 +893,12 @@ menu "Multiple platform selection"
 
 comment "CPU Core family selection"
 
+config ARCH_MULTI_V4
+        bool "ARMv4 based platforms (FA526)"
+        depends on !ARCH_MULTI_V6_V7
+        select ARCH_MULTI_V4_V5
+        select CPU_FA526
+
 config ARCH_MULTI_V4T
         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
         depends on !ARCH_MULTI_V6_V7
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 6d95d3df33c7..79087ccf64bc 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -448,7 +448,7 @@
                         ti,hwmods = "usb_otg_hs";
                         status = "disabled";
 
-                        usb_ctrl_mod: control@44e10000 {
+                        usb_ctrl_mod: control@44e10620 {
                                 compatible = "ti,am335x-usb-ctrl-module";
                                 reg = <0x44e10620 0x10
                                         0x44e10648 0x4>;
@@ -551,7 +551,7 @@
                                         "tx14", "tx15";
                         };
 
-                        cppi41dma: dma-controller@07402000 {
+                        cppi41dma: dma-controller@47402000 {
                                 compatible = "ti,am3359-cppi41";
                                 reg =  <0x47400000 0x1000
                                         0x47402000 0x1000
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index b42e658876e5..457112d659ea 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -287,6 +287,7 @@
                                         regulator-name = "vdd_g3d";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
                                         regulator-boot-on;
                                         op_mode = <1>;
                                 };
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index d3f8a6e8ca20..69409f7e05dc 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -275,6 +275,8 @@
                         gpmc,num-waitpins = <4>;
                         ti,hwmods = "gpmc";
                         ti,no-idle-on-init;
+                        clocks = <&l3_div_ck>;
+                        clock-names = "fck";
                 };
 
                 uart1: serial@4806a000 {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index a72813a9663e..7a16647c76f4 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -302,6 +302,8 @@
                         gpmc,num-cs = <8>;
                         gpmc,num-waitpins = <4>;
                         ti,hwmods = "gpmc";
+                        clocks = <&l3_iclk_div>;
+                        clock-names = "fck";
                 };
 
                 i2c1: i2c@48070000 {
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index 73aecfb57ccb..eb54353975bc 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -715,7 +715,6 @@
                                 nvidia,pins = "drive_sdio1";
                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
-                                nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
                                 nvidia,pull-down-strength = <36>;
                                 nvidia,pull-up-strength = <20>;
                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
@@ -725,7 +724,6 @@
                                 nvidia,pins = "drive_sdio3";
                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
-                                nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
                                 nvidia,pull-down-strength = <22>;
                                 nvidia,pull-up-strength = <36>;
                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index c6dcef513e5d..0b54743c2621 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -138,14 +138,9 @@
                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                         };
                         sdmmc1_clk_pz0 {
-                                nvidia,pins = "sdmmc1_clk_pz0",
-                                              "sdmmc1_cmd_pz1",
-                                              "sdmmc1_dat0_py7",
-                                              "sdmmc1_dat1_py6",
-                                              "sdmmc1_dat2_py5",
-                                              "sdmmc1_dat3_py4";
+                                nvidia,pins = "sdmmc1_clk_pz0";
                                 nvidia,function = "sdmmc1";
-                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
                         };
@@ -423,7 +418,6 @@
                                 nvidia,pins = "drive_sdio1";
                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
-                                nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
                                 nvidia,pull-down-strength = <32>;
                                 nvidia,pull-up-strength = <42>;
                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
@@ -433,7 +427,6 @@
                                 nvidia,pins = "drive_sdio3";
                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
-                                nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
                                 nvidia,pull-down-strength = <20>;
                                 nvidia,pull-up-strength = <36>;
                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index ab2f7378352c..932b932c8856 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -198,3 +198,5 @@ CONFIG_DEBUG_ERRORS=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
 CONFIG_CRC_T10DIF=m
+CONFIG_GPIO_PCA953X=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
index dbe1f1c47bb0..4ce7b70ea901 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -94,7 +94,7 @@ CONFIG_FONT_7x14=y
 CONFIG_LOGO=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_S5P=y
+CONFIG_USB_EHCI_EXYNOS=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_PHY=y
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 22a3b9b5d4a1..4157aec4e307 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -74,6 +74,7 @@ struct secondary_data {
 };
 extern struct secondary_data secondary_data;
 extern volatile int pen_release;
+extern void secondary_startup(void);
 
 extern int __cpu_disable(void);
 
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index f98763f0bc17..3bc80599c022 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -53,8 +53,7 @@
 
 #define checkuart(rp, rv, lhu, bit, uart) \
                 /* Load address of CLK_RST register */ \
-                movw    rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
-                movt    rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+                ldr     rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \
                 /* Load value from CLK_RST register */ \
                 ldr     rp, [rp, #0] ; \
                 /* Test UART's reset bit */ \
@@ -62,8 +61,7 @@
                 /* If set, can't use UART; jump to save no UART */ \
                 bne     90f ; \
                 /* Load address of CLK_OUT_ENB register */ \
-                movw    rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
-                movt    rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+                ldr     rp, =TEGRA_CLK_OUT_ENB_##lhu ; \
                 /* Load value from CLK_OUT_ENB register */ \
                 ldr     rp, [rp, #0] ; \
                 /* Test UART's clock enable bit */ \
@@ -71,8 +69,7 @@
                 /* If clear, can't use UART; jump to save no UART */ \
                 beq     90f ; \
                 /* Passed all tests, load address of UART registers */ \
-                movw    rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
-                movt    rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+                ldr     rp, =TEGRA_UART##uart##_BASE ; \
                 /* Jump to save UART address */ \
                 b 91f
 
@@ -90,15 +87,16 @@
 
 #ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
                 /* Check ODMDATA */
-10:             movw    \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
-                movt    \rp, #TEGRA_PMC_SCRATCH20 >> 16
+10:             ldr     \rp, =TEGRA_PMC_SCRATCH20
                 ldr     \rp, [\rp, #0]          @ Load PMC_SCRATCH20
-                ubfx    \rv, \rp, #18, #2       @ 19:18 are console type
+                lsr     \rv, \rp, #18           @ 19:18 are console type
+                and     \rv, \rv, #3
                 cmp     \rv, #2                 @ 2 and 3 mean DCC, UART
                 beq     11f                     @ some boards swap the meaning
                 cmp     \rv, #3                 @ so accept either
                 bne     90f
-11:             ubfx    \rv, \rp, #15, #3       @ 17:15 are UART ID
+11:             lsr     \rv, \rp, #15           @ 17:15 are UART ID
+                and     \rv, #7 
                 cmp     \rv, #0                 @ UART 0?
                 beq     20f
                 cmp     \rv, #1                 @ UART 1?
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 4f0e800e7e71..9968f208b7df 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -57,6 +57,7 @@ config SOC_SAMA5
         select GENERIC_CLOCKEVENTS
         select MULTI_IRQ_HANDLER
         select SPARSE_IRQ
+        select USE_OF
 
 menu "Atmel AT91 System-on-Chip"
 
@@ -64,11 +65,22 @@ choice
 
         prompt "Core type"
 
+config ARCH_AT91X40
+        bool "ARM7 AT91X40"
+        depends on !MMU
+        select CPU_ARM7TDMI
+        select ARCH_USES_GETTIMEOFFSET
+        select MULTI_IRQ_HANDLER
+        select SPARSE_IRQ
+
+        help
+          Select this if you are using one of Atmel's AT91X40 SoC.
+
 config SOC_SAM_V4_V5
-        bool "ARM7/ARM9"
+        bool "ARM9 AT91SAM9/AT91RM9200"
         help
-          Select this if you are using one of Atmel's AT91SAM9, AT91RM9200
-          or AT91X40 SoC.
+          Select this if you are using one of Atmel's AT91SAM9 or
+          AT91RM9200 SoC.
 
 config SOC_SAM_V7
         bool "Cortex A5"
@@ -179,9 +191,12 @@ config SOC_AT91SAM9N12
           Select this if you are using Atmel's AT91SAM9N12 SoC.
 
 # ----------------------------------------------------------
+endif # SOC_SAM_V4_V5
+
 
+if SOC_SAM_V4_V5 || ARCH_AT91X40
 source arch/arm/mach-at91/Kconfig.non_dt
-endif # SOC_SAM_V4_V5
+endif
 
 comment "Generic Board Type"
 
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index 1f73e9b527da..44ace320d2e1 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -5,6 +5,7 @@ config HAVE_AT91_DATAFLASH_CARD
 
 choice
         prompt "Atmel AT91 Processor Devices for non DT boards"
+        depends on !ARCH_AT91X40
 
 config ARCH_AT91_NONE
         bool "None"
@@ -39,13 +40,6 @@ config ARCH_AT91SAM9G45
         select SOC_AT91SAM9G45
         select AT91_USE_OLD_CLK
 
-config ARCH_AT91X40
-        bool "AT91x40"
-        depends on !MMU
-        select ARCH_USES_GETTIMEOFFSET
-        select MULTI_IRQ_HANDLER
-        select SPARSE_IRQ
-
 endchoice
 
 config ARCH_AT91SAM9G20
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index eda8d1679d40..1630ae64d3fb 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1255,12 +1255,8 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
 
-        if (data->flags & AT91_CF_TRUE_IDE)
-#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
+        if (IS_ENABLED(CONFIG_PATA_AT91) && (data->flags & AT91_CF_TRUE_IDE))
                 pdev->name = "pata_at91";
-#else
-#warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
-#endif
         else
                 pdev->name = "at91_cf";
 
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index b26156bf15db..826315af6d11 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -36,6 +36,7 @@ void sam9_smc_write_mode(int id, int cs,
 {
         sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
 }
+EXPORT_SYMBOL_GPL(sam9_smc_write_mode);
 
 static void sam9_smc_cs_configure(void __iomem *base,
                                         struct sam9_smc_config *config)
@@ -69,6 +70,7 @@ void sam9_smc_configure(int id, int cs,
 {
         sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
 }
+EXPORT_SYMBOL_GPL(sam9_smc_configure);
 
 static void sam9_smc_cs_read_mode(void __iomem *base,
                                         struct sam9_smc_config *config)
@@ -84,6 +86,7 @@ void sam9_smc_read_mode(int id, int cs,
 {
         sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
 }
+EXPORT_SYMBOL_GPL(sam9_smc_read_mode);
 
 static void sam9_smc_cs_read(void __iomem *base,
                                         struct sam9_smc_config *config)
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index f7ca97b7291e..f7a07a58ebb6 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -351,7 +351,7 @@ void __init at91_ioremap_matrix(u32 base_addr)
                 panic("Impossible to ioremap at91_matrix_base\n");
 }
 
-#if defined(CONFIG_OF)
+#if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40)
 static struct of_device_id rstc_ids[] = {
         { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
         { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
index f8d71a89644a..5f831133178f 100644
--- a/arch/arm/mach-clps711x/board-autcpu12.c
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -73,7 +73,7 @@
 #define AUTCPU12_SMC_NCE        (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */
 #define AUTCPU12_SMC_RDY        CLPS711X_GPIO(1, 2)
 #define AUTCPU12_SMC_ALE        CLPS711X_GPIO(1, 3)
-#define AUTCPU12_SMC_CLE        CLPS711X_GPIO(1, 3)
+#define AUTCPU12_SMC_CLE        CLPS711X_GPIO(1, 4)
 
 /* LCD contrast digital potentiometer */
 #define AUTCPU12_DPOT_CS        CLPS711X_GPIO(4, 0)
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index ce096d678aa4..d863d8729edc 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -246,7 +246,6 @@ static void __init cns3420_map_io(void)
 
 MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
         .atag_offset    = 0x100,
-        .nr_irqs        = NR_IRQS_CNS3XXX,
         .map_io         = cns3420_map_io,
         .init_irq       = cns3xxx_init_irq,
         .init_time      = cns3xxx_timer_init,
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 384dc859e6c6..2ae28a69e3e5 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -47,6 +47,38 @@ static struct map_desc cns3xxx_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(CNS3XXX_PM_BASE),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
+#ifdef CONFIG_PCI
+        }, {
+                .virtual        = CNS3XXX_PCIE0_HOST_BASE_VIRT,
+                .pfn            = __phys_to_pfn(CNS3XXX_PCIE0_HOST_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = CNS3XXX_PCIE0_CFG0_BASE_VIRT,
+                .pfn            = __phys_to_pfn(CNS3XXX_PCIE0_CFG0_BASE),
+                .length         = SZ_64K, /* really 4 KiB at offset 32 KiB */
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = CNS3XXX_PCIE0_CFG1_BASE_VIRT,
+                .pfn            = __phys_to_pfn(CNS3XXX_PCIE0_CFG1_BASE),
+                .length         = SZ_16M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = CNS3XXX_PCIE1_HOST_BASE_VIRT,
+                .pfn            = __phys_to_pfn(CNS3XXX_PCIE1_HOST_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = CNS3XXX_PCIE1_CFG0_BASE_VIRT,
+                .pfn            = __phys_to_pfn(CNS3XXX_PCIE1_CFG0_BASE),
+                .length         = SZ_64K, /* really 4 KiB at offset 32 KiB */
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = CNS3XXX_PCIE1_CFG1_BASE_VIRT,
+                .pfn            = __phys_to_pfn(CNS3XXX_PCIE1_CFG1_BASE),
+                .length         = SZ_16M,
+                .type           = MT_DEVICE,
+#endif
         },
 };
 
@@ -368,7 +400,6 @@ static const char *cns3xxx_dt_compat[] __initdata = {
 
 DT_MACHINE_START(CNS3XXX_DT, "Cavium Networks CNS3xxx")
         .dt_compat      = cns3xxx_dt_compat,
-        .nr_irqs        = NR_IRQS_CNS3XXX,
         .map_io         = cns3xxx_map_io,
         .init_irq       = cns3xxx_init_irq,
         .init_time      = cns3xxx_timer_init,
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index c7b204bff386..413134c54452 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -23,15 +23,10 @@
 #include "cns3xxx.h"
 #include "core.h"
 
-enum cns3xxx_access_type {
-        CNS3XXX_HOST_TYPE = 0,
-        CNS3XXX_CFG0_TYPE,
-        CNS3XXX_CFG1_TYPE,
-        CNS3XXX_NUM_ACCESS_TYPES,
-};
-
 struct cns3xxx_pcie {
-        struct map_desc cfg_bases[CNS3XXX_NUM_ACCESS_TYPES];
+        void __iomem *host_regs; /* PCI config registers for host bridge */
+        void __iomem *cfg0_regs; /* PCI Type 0 config registers */
+        void __iomem *cfg1_regs; /* PCI Type 1 config registers */
         unsigned int irqs[2];
         struct resource res_io;
         struct resource res_mem;
@@ -66,7 +61,6 @@ static void __iomem *cns3xxx_pci_cfg_base(struct pci_bus *bus,
         int busno = bus->number;
         int slot = PCI_SLOT(devfn);
         int offset;
-        enum cns3xxx_access_type type;
         void __iomem *base;
 
         /* If there is no link, just show the CNS PCI bridge. */
@@ -78,17 +72,21 @@ static void __iomem *cns3xxx_pci_cfg_base(struct pci_bus *bus,
          * we still want to access it. For this to work, we must place
          * the first device on the same bus as the CNS PCI bridge.
          */
-        if (busno == 0) {
-                if (slot > 1)
-                        return NULL;
-                type = slot;
-        } else {
-                type = CNS3XXX_CFG1_TYPE;
-        }
+        if (busno == 0) { /* directly connected PCIe bus */
+                switch (slot) {
+                case 0: /* host bridge device, function 0 only */
+                        base = cnspci->host_regs;
+                        break;
+                case 1: /* directly connected device */
+                        base = cnspci->cfg0_regs;
+                        break;
+                default:
+                        return NULL; /* no such device */
+                }
+        } else /* remote PCI bus */
+                base = cnspci->cfg1_regs;
 
-        base = (void __iomem *)cnspci->cfg_bases[type].virtual;
         offset = ((busno & 0xf) << 20) | (devfn << 12) | (where & 0xffc);
-
         return base + offset;
 }
 
@@ -180,36 +178,19 @@ static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 
 static struct cns3xxx_pcie cns3xxx_pcie[] = {
         [0] = {
-                .cfg_bases = {
-                        [CNS3XXX_HOST_TYPE] = {
-                                .virtual = CNS3XXX_PCIE0_HOST_BASE_VIRT,
-                                .pfn = __phys_to_pfn(CNS3XXX_PCIE0_HOST_BASE),
-                                .length = SZ_16M,
-                                .type = MT_DEVICE,
-                        },
-                        [CNS3XXX_CFG0_TYPE] = {
-                                .virtual = CNS3XXX_PCIE0_CFG0_BASE_VIRT,
-                                .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG0_BASE),
-                                .length = SZ_16M,
-                                .type = MT_DEVICE,
-                        },
-                        [CNS3XXX_CFG1_TYPE] = {
-                                .virtual = CNS3XXX_PCIE0_CFG1_BASE_VIRT,
-                                .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG1_BASE),
-                                .length = SZ_16M,
-                                .type = MT_DEVICE,
-                        },
-                },
+                .host_regs = (void __iomem *)CNS3XXX_PCIE0_HOST_BASE_VIRT,
+                .cfg0_regs = (void __iomem *)CNS3XXX_PCIE0_CFG0_BASE_VIRT,
+                .cfg1_regs = (void __iomem *)CNS3XXX_PCIE0_CFG1_BASE_VIRT,
                 .res_io = {
                         .name = "PCIe0 I/O space",
                         .start = CNS3XXX_PCIE0_IO_BASE,
-                        .end = CNS3XXX_PCIE0_IO_BASE + SZ_16M - 1,
+                        .end = CNS3XXX_PCIE0_CFG0_BASE - 1, /* 16 MiB */
                         .flags = IORESOURCE_IO,
                 },
                 .res_mem = {
                         .name = "PCIe0 non-prefetchable",
                         .start = CNS3XXX_PCIE0_MEM_BASE,
-                        .end = CNS3XXX_PCIE0_MEM_BASE + SZ_16M - 1,
+                        .end = CNS3XXX_PCIE0_HOST_BASE - 1, /* 176 MiB */
                         .flags = IORESOURCE_MEM,
                 },
                 .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, },
@@ -222,36 +203,19 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = {
                 },
         },
         [1] = {
-                .cfg_bases = {
-                        [CNS3XXX_HOST_TYPE] = {
-                                .virtual = CNS3XXX_PCIE1_HOST_BASE_VIRT,
-                                .pfn = __phys_to_pfn(CNS3XXX_PCIE1_HOST_BASE),
-                                .length = SZ_16M,
-                                .type = MT_DEVICE,
-                        },
-                        [CNS3XXX_CFG0_TYPE] = {
-                                .virtual = CNS3XXX_PCIE1_CFG0_BASE_VIRT,
-                                .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG0_BASE),
-                                .length = SZ_16M,
-                                .type = MT_DEVICE,
-                        },
-                        [CNS3XXX_CFG1_TYPE] = {
-                                .virtual = CNS3XXX_PCIE1_CFG1_BASE_VIRT,
-                                .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG1_BASE),
-                                .length = SZ_16M,
-                                .type = MT_DEVICE,
-                        },
-                },
+                .host_regs = (void __iomem *)CNS3XXX_PCIE1_HOST_BASE_VIRT,
+                .cfg0_regs = (void __iomem *)CNS3XXX_PCIE1_CFG0_BASE_VIRT,
+                .cfg1_regs = (void __iomem *)CNS3XXX_PCIE1_CFG1_BASE_VIRT,
                 .res_io = {
                         .name = "PCIe1 I/O space",
                         .start = CNS3XXX_PCIE1_IO_BASE,
-                        .end = CNS3XXX_PCIE1_IO_BASE + SZ_16M - 1,
+                        .end = CNS3XXX_PCIE1_CFG0_BASE - 1, /* 16 MiB */
                         .flags = IORESOURCE_IO,
                 },
                 .res_mem = {
                         .name = "PCIe1 non-prefetchable",
                         .start = CNS3XXX_PCIE1_MEM_BASE,
-                        .end = CNS3XXX_PCIE1_MEM_BASE + SZ_16M - 1,
+                        .end = CNS3XXX_PCIE1_HOST_BASE - 1, /* 176 MiB */
                         .flags = IORESOURCE_MEM,
                 },
                 .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, },
@@ -307,18 +271,15 @@ static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci)
                 .ops = &cns3xxx_pcie_ops,
                 .sysdata = &sd,
         };
-        u32 io_base = cnspci->res_io.start >> 16;
-        u32 mem_base = cnspci->res_mem.start >> 16;
-        u32 host_base = cnspci->cfg_bases[CNS3XXX_HOST_TYPE].pfn;
-        u32 cfg0_base = cnspci->cfg_bases[CNS3XXX_CFG0_TYPE].pfn;
+        u16 mem_base  = cnspci->res_mem.start >> 16;
+        u16 mem_limit = cnspci->res_mem.end   >> 16;
+        u16 io_base   = cnspci->res_io.start  >> 16;
+        u16 io_limit  = cnspci->res_io.end    >> 16;
         u32 devfn = 0;
         u8 tmp8;
         u16 pos;
         u16 dc;
 
-        host_base = (__pfn_to_phys(host_base) - 1) >> 16;
-        cfg0_base = (__pfn_to_phys(cfg0_base) - 1) >> 16;
-
         pci_bus_write_config_byte(&bus, devfn, PCI_PRIMARY_BUS, 0);
         pci_bus_write_config_byte(&bus, devfn, PCI_SECONDARY_BUS, 1);
         pci_bus_write_config_byte(&bus, devfn, PCI_SUBORDINATE_BUS, 1);
@@ -328,9 +289,9 @@ static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci)
         pci_bus_read_config_byte(&bus, devfn, PCI_SUBORDINATE_BUS, &tmp8);
 
         pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_BASE, mem_base);
-        pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_LIMIT, host_base);
+        pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_LIMIT, mem_limit);
         pci_bus_write_config_word(&bus, devfn, PCI_IO_BASE_UPPER16, io_base);
-        pci_bus_write_config_word(&bus, devfn, PCI_IO_LIMIT_UPPER16, cfg0_base);
+        pci_bus_write_config_word(&bus, devfn, PCI_IO_LIMIT_UPPER16, io_limit);
 
         if (!cnspci->linked)
                 return;
@@ -368,8 +329,6 @@ static int __init cns3xxx_pcie_init(void)
                         "imprecise external abort");
 
         for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
-                iotable_init(cns3xxx_pcie[i].cfg_bases,
-                             ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
                 cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i));
                 cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i));
                 cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index a075b3e0c5c7..626d2b82d0f3 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -214,11 +214,6 @@ config DA850_WL12XX
           Say Y if you want to use a wl1271 expansion card connected to the
           AM18x EVM.
 
-config GPIO_PCA953X
-        default MACH_DAVINCI_DA850_EVM
-
-config KEYBOARD_GPIO_POLLED
-        default MACH_DAVINCI_DA850_EVM
 
 config MACH_TNETV107X
         bool "TI TNETV107X Reference Platform"
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 987605b78556..3de4dc9a1698 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -799,11 +799,12 @@ static __init void davinci_evm_init(void)
         /* irlml6401 switches over 1A, in under 8 msec */
         davinci_setup_usb(1000, 8);
 
-        soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
-        /* Register the fixup for PHY on DaVinci */
-        phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
-                                        davinci_phy_fixup);
-
+        if (IS_BUILTIN(CONFIG_PHYLIB)) {
+                soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
+                /* Register the fixup for PHY on DaVinci */
+                phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
+                                                davinci_phy_fixup);
+        }
 }
 
 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 157ba88433c9..fd021ba539fe 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -242,6 +242,7 @@ unsigned int ep93xx_chip_revision(void)
         v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
         return v;
 }
+EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
 
 /*************************************************************************
  * EP93xx GPIO
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index f18be40e5b21..8d0042c9d4d3 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -404,8 +404,10 @@ static int __init exynos4_l2x0_cache_init(void)
         if (ret)
                 return ret;
 
-        l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
-        clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+        if (IS_ENABLED(CONFIG_S5P_SLEEP)) {
+                l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
+                clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+        }
         return 0;
 }
 early_initcall(exynos4_l2x0_cache_init);
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index f57cb91f02aa..93d2decc112d 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -14,6 +14,7 @@
 #include <linux/cpu_pm.h>
 #include <linux/io.h>
 #include <linux/export.h>
+#include <linux/module.h>
 #include <linux/time.h>
 #include <linux/platform_device.h>
 
diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig
index fba55fb9f47d..07152d00fc50 100644
--- a/arch/arm/mach-footbridge/Kconfig
+++ b/arch/arm/mach-footbridge/Kconfig
@@ -52,6 +52,7 @@ config ARCH_EBSA285_HOST
         select FOOTBRIDGE_HOST
         select ISA
         select ISA_DMA
+        select ARCH_MAY_HAVE_PC_FDC
         select PCI
         help
           Say Y here if you intend to run this kernel on the EBSA285 card
@@ -94,6 +95,5 @@ config FOOTBRIDGE_ADDIN
 # EBSA285 board in either host or addin mode
 config ARCH_EBSA285
         bool
-        select ARCH_MAY_HAVE_PC_FDC
 
 endif
diff --git a/arch/arm/mach-footbridge/Makefile b/arch/arm/mach-footbridge/Makefile
index 0b64dd430d61..c3faa3bc84dd 100644
--- a/arch/arm/mach-footbridge/Makefile
+++ b/arch/arm/mach-footbridge/Makefile
@@ -4,11 +4,12 @@
 
 # Object file lists.
 
-obj-y                   := common.o dc21285.o dma.o isa-irq.o
+obj-y                   := common.o dma.o isa-irq.o
 obj-m                   :=
 obj-n                   :=
 obj-                    :=
 
+pci-y                   += dc21285.o
 pci-$(CONFIG_ARCH_CATS) += cats-pci.o
 pci-$(CONFIG_ARCH_EBSA285_HOST) += ebsa285-pci.o
 pci-$(CONFIG_ARCH_NETWINDER) += netwinder-pci.o
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 9669cc0b6318..da0415094856 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -78,9 +78,11 @@ __initcall(cats_hw_init);
 static void __init
 fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
+#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
         screen_info.orig_video_lines  = 25;
         screen_info.orig_video_points = 16;
         screen_info.orig_y = 24;
+#endif
 }
 
 MACHINE_START(CATS, "Chalice-CATS")
diff --git a/arch/arm/mach-hisi/Makefile b/arch/arm/mach-hisi/Makefile
index 6870058d0a48..2ae1b59267c2 100644
--- a/arch/arm/mach-hisi/Makefile
+++ b/arch/arm/mach-hisi/Makefile
@@ -3,5 +3,4 @@
 #
 
 obj-y   += hisilicon.o
-obj-$(CONFIG_SMP)               += platsmp.o
-obj-$(CONFIG_HOTPLUG_CPU)       += hotplug.o
+obj-$(CONFIG_SMP)               += platsmp.o hotplug.o
diff --git a/arch/arm/mach-hisi/hotplug.c b/arch/arm/mach-hisi/hotplug.c
index b909854eee7f..abd441b0c604 100644
--- a/arch/arm/mach-hisi/hotplug.c
+++ b/arch/arm/mach-hisi/hotplug.c
@@ -178,6 +178,7 @@ static inline void cpu_enter_lowpower(void)
           : "cc");
 }
 
+#ifdef CONFIG_HOTPLUG_CPU
 void hi3xxx_cpu_die(unsigned int cpu)
 {
         cpu_enter_lowpower();
@@ -198,3 +199,4 @@ int hi3xxx_cpu_kill(unsigned int cpu)
         hi3xxx_set_cpu(cpu, false);
         return 1;
 }
+#endif
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index abeff25532ab..271a255864d2 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -6,8 +6,8 @@ config ARCH_INTEGRATOR_AP
         bool "Support Integrator/AP and Integrator/PP2 platforms"
         select CLKSRC_MMIO
         select MIGHT_HAVE_PCI
-        select SERIAL_AMBA_PL010
-        select SERIAL_AMBA_PL010_CONSOLE
+        select SERIAL_AMBA_PL010 if TTY
+        select SERIAL_AMBA_PL010_CONSOLE if TTY
         select SOC_BUS
         help
           Include support for the ARM(R) Integrator/AP and
@@ -18,8 +18,8 @@ config ARCH_INTEGRATOR_CP
         select ARCH_CINTEGRATOR
         select ARM_TIMER_SP804
         select PLAT_VERSATILE_CLCD
-        select SERIAL_AMBA_PL011
-        select SERIAL_AMBA_PL011_CONSOLE
+        select SERIAL_AMBA_PL011 if TTY
+        select SERIAL_AMBA_PL011_CONSOLE if TTY
         select SOC_BUS
         help
           Include support for the ARM(R) Integrator CP platform.
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 200970d56f6d..4977296f0c78 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -315,33 +315,6 @@ static int abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *r
         return 0;
 }
 
-
-static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
-{
-        return (dma_addr + size) >= SZ_64M;
-}
-
-/*
- * Setup DMA mask to 64MB on PCI devices. Ignore all other devices.
- */
-static int ixp4xx_pci_platform_notify(struct device *dev)
-{
-        if (dev_is_pci(dev)) {
-                *dev->dma_mask =  SZ_64M - 1;
-                dev->coherent_dma_mask = SZ_64M - 1;
-                dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce);
-        }
-        return 0;
-}
-
-static int ixp4xx_pci_platform_notify_remove(struct device *dev)
-{
-        if (dev_is_pci(dev))
-                dmabounce_unregister_dev(dev);
-
-        return 0;
-}
-
 void __init ixp4xx_pci_preinit(void)
 {
         unsigned long cpuid = read_cpuid_id();
@@ -475,20 +448,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
         pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
         pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
 
-        platform_notify = ixp4xx_pci_platform_notify;
-        platform_notify_remove = ixp4xx_pci_platform_notify_remove;
-
         return 1;
 }
 
-int dma_set_coherent_mask(struct device *dev, u64 mask)
-{
-        if (mask >= SZ_64M - 1)
-                return 0;
-
-        return -EIO;
-}
-
 EXPORT_SYMBOL(ixp4xx_pci_read);
 EXPORT_SYMBOL(ixp4xx_pci_write);
-EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index a465f27bc263..be882c95bd36 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -30,8 +30,8 @@
 #include <linux/export.h>
 #include <linux/gpio.h>
 #include <linux/cpu.h>
+#include <linux/pci.h>
 #include <linux/sched_clock.h>
-
 #include <mach/udc.h>
 #include <mach/hardware.h>
 #include <mach/io.h>
@@ -40,7 +40,6 @@
 #include <asm/page.h>
 #include <asm/irq.h>
 #include <asm/system_misc.h>
-
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
@@ -578,6 +577,54 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd)
         }
 }
 
+#ifdef CONFIG_PCI
+static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
+{
+        return (dma_addr + size) > SZ_64M;
+}
+
+static int ixp4xx_platform_notify_remove(struct device *dev)
+{
+        if (dev_is_pci(dev))
+                dmabounce_unregister_dev(dev);
+
+        return 0;
+}
+#endif
+
+/*
+ * Setup DMA mask to 64MB on PCI devices and 4 GB on all other things.
+ */
+static int ixp4xx_platform_notify(struct device *dev)
+{
+        dev->dma_mask = &dev->coherent_dma_mask;
+
+#ifdef CONFIG_PCI
+        if (dev_is_pci(dev)) {
+                dev->coherent_dma_mask = DMA_BIT_MASK(28); /* 64 MB */
+                dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce);
+                return 0;
+        }
+#endif
+
+        dev->coherent_dma_mask = DMA_BIT_MASK(32);
+        return 0;
+}
+
+int dma_set_coherent_mask(struct device *dev, u64 mask)
+{
+        if (dev_is_pci(dev))
+                mask &= DMA_BIT_MASK(28); /* 64 MB */
+
+        if ((mask & DMA_BIT_MASK(28)) == DMA_BIT_MASK(28)) {
+                dev->coherent_dma_mask = mask;
+                return 0;
+        }
+
+        return -EIO;            /* device wanted sub-64MB mask */
+}
+EXPORT_SYMBOL(dma_set_coherent_mask);
+
 #ifdef CONFIG_IXP4XX_INDIRECT_PCI
 /*
  * In the case of using indirect PCI, we simply return the actual PCI
@@ -600,12 +647,16 @@ static void ixp4xx_iounmap(void __iomem *addr)
         if (!is_pci_memory((__force u32)addr))
                 __iounmap(addr);
 }
+#endif
 
 void __init ixp4xx_init_early(void)
 {
+        platform_notify = ixp4xx_platform_notify;
+#ifdef CONFIG_PCI
+        platform_notify_remove = ixp4xx_platform_notify_remove;
+#endif
+#ifdef CONFIG_IXP4XX_INDIRECT_PCI
         arch_ioremap_caller = ixp4xx_ioremap_caller;
         arch_iounmap = ixp4xx_iounmap;
-}
-#else
-void __init ixp4xx_init_early(void) {}
 #endif
+}
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index e54ff491c105..80bd9d6d04de 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/hdlc.h>
 #include <linux/i2c-gpio.h>
 #include <linux/io.h>
@@ -79,19 +80,19 @@ static u8 control_value;
 
 static void set_scl(u8 value)
 {
-        gpio_line_set(GPIO_SCL, !!value);
+        gpio_set_value(GPIO_SCL, !!value);
         udelay(3);
 }
 
 static void set_sda(u8 value)
 {
-        gpio_line_set(GPIO_SDA, !!value);
+        gpio_set_value(GPIO_SDA, !!value);
         udelay(3);
 }
 
 static void set_str(u8 value)
 {
-        gpio_line_set(GPIO_STR, !!value);
+        gpio_set_value(GPIO_STR, !!value);
         udelay(3);
 }
 
@@ -108,8 +109,8 @@ static void output_control(void)
 {
         int i;
 
-        gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT);
-        gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT);
+        gpio_direction_output(GPIO_SCL, 1);
+        gpio_direction_output(GPIO_SDA, 1);
 
         for (i = 0; i < 8; i++) {
                 set_scl(0);
@@ -151,8 +152,8 @@ static int hss_set_clock(int port, unsigned int clock_type)
 
 static irqreturn_t hss_dcd_irq(int irq, void *pdev)
 {
-        int i, port = (irq == IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N));
-        gpio_line_get(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N, &i);
+        int port = (irq == IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N));
+        int i = gpio_get_value(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N);
         set_carrier_cb_tab[port](pdev, !i);
         return IRQ_HANDLED;
 }
@@ -168,7 +169,7 @@ static int hss_open(int port, void *pdev,
         else
                 irq = IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N);
 
-        gpio_line_get(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N, &i);
+        i = gpio_get_value(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N);
         set_carrier_cb(pdev, !i);
 
         set_carrier_cb_tab[!!port] = set_carrier_cb;
@@ -181,7 +182,7 @@ static int hss_open(int port, void *pdev,
 
         set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 0);
         output_control();
-        gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 0);
+        gpio_set_value(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 0);
         return 0;
 }
 
@@ -193,7 +194,7 @@ static void hss_close(int port, void *pdev)
 
         set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 1);
         output_control();
-        gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 1);
+        gpio_set_value(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 1);
 }
 
 
@@ -413,13 +414,21 @@ static void __init gmlr_init(void)
         if (hw_bits & CFG_HW_HAS_EEPROM)
                 device_tab[devices++] = &device_i2c; /* max index 6 */
 
-        gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT);
-        gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT);
-        gpio_line_config(GPIO_STR, IXP4XX_GPIO_OUT);
-        gpio_line_config(GPIO_HSS0_RTS_N, IXP4XX_GPIO_OUT);
-        gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT);
-        gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN);
-        gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN);
+        gpio_request(GPIO_SCL, "SCL/clock");
+        gpio_request(GPIO_SDA, "SDA/data");
+        gpio_request(GPIO_STR, "strobe");
+        gpio_request(GPIO_HSS0_RTS_N, "HSS0 RTS");
+        gpio_request(GPIO_HSS1_RTS_N, "HSS1 RTS");
+        gpio_request(GPIO_HSS0_DCD_N, "HSS0 DCD");
+        gpio_request(GPIO_HSS1_DCD_N, "HSS1 DCD");
+
+        gpio_direction_output(GPIO_SCL, 1);
+        gpio_direction_output(GPIO_SDA, 1);
+        gpio_direction_output(GPIO_STR, 0);
+        gpio_direction_output(GPIO_HSS0_RTS_N, 1);
+        gpio_direction_output(GPIO_HSS1_RTS_N, 1);
+        gpio_direction_input(GPIO_HSS0_DCD_N);
+        gpio_direction_input(GPIO_HSS1_DCD_N);
         irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH);
         irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH);
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 5cf30d1b78d2..559c69a47731 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -48,9 +48,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
  * fallback to the default.
  */
 
+extern unsigned long pcibios_min_mem;
 static inline int is_pci_memory(u32 addr)
 {
-        return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
+        return (addr >= pcibios_min_mem) && (addr <= 0x4FFFFFFF);
 }
 
 #define writeb(v, p)                    __indirect_writeb(v, p)
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 75ef03dc9964..2d494b454376 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -17,9 +17,7 @@
 #include <linux/serial_8250.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
-#ifdef CONFIG_LEDS_CLASS
 #include <linux/leds.h>
-#endif
 
 #include <asm/setup.h>
 #include <asm/memory.h>
diff --git a/arch/arm/mach-ks8695/board-og.c b/arch/arm/mach-ks8695/board-og.c
index 002bc619bb68..f2658168eeff 100644
--- a/arch/arm/mach-ks8695/board-og.c
+++ b/arch/arm/mach-ks8695/board-og.c
@@ -44,7 +44,8 @@ static void __init og_register_pci(void)
         if (machine_is_im4004())
                 ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_LOW);
 
-        ks8695_init_pci(&og_pci);
+        if (IS_ENABLED(CONFIG_PCI))
+                ks8695_init_pci(&og_pci);
 }
 
 /*
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index d7aa54c25c59..de03620d7fa7 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -99,6 +99,7 @@ u32 lpc32xx_return_iram_size(void)
 
         return iram_size;
 }
+EXPORT_SYMBOL_GPL(lpc32xx_return_iram_size);
 
 /*
  * Computes PLL rate from PLL register and input clock
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 0c002099c3a3..7e0248582efd 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -231,7 +231,7 @@ static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
         .debounce_interval      = 30,
 };
 
-#if defined(CONFIG_USB_EHCI_MV)
+#if IS_ENABLED(CONFIG_USB_EHCI_MV)
 static struct mv_usb_platform_data pxa168_sph_pdata = {
         .mode           = MV_USB_MODE_HOST,
         .phy_init       = pxa_usb_phy_init,
@@ -258,7 +258,7 @@ static void __init common_init(void)
         /* off-chip devices */
         platform_device_register(&smc91x_device);
 
-#if defined(CONFIG_USB_EHCI_MV)
+#if IS_ENABLED(CONFIG_USB_EHCI_MV)
         pxa168_add_usb_host(&pxa168_sph_pdata);
 #endif
 }
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c
index dd2d8b103cc8..2bcb766af05d 100644
--- a/arch/arm/mach-mmp/devices.c
+++ b/arch/arm/mach-mmp/devices.c
@@ -72,7 +72,7 @@ int __init pxa_register_device(struct pxa_device_desc *desc,
         return platform_device_add(pdev);
 }
 
-#if defined(CONFIG_USB) || defined(CONFIG_USB_GADGET)
+#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET)
 
 /*****************************************************************************
  * The registers read/write routines
@@ -112,9 +112,9 @@ static void u2o_write(void __iomem *base, unsigned int offset,
         readl_relaxed(base + offset);
 }
 
-#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV)
+#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
 
-#if defined(CONFIG_CPU_PXA910) || defined(CONFIG_CPU_PXA168)
+#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
 
 static DEFINE_MUTEX(phy_lock);
 static int phy_init_cnt;
@@ -238,10 +238,10 @@ void pxa_usb_phy_deinit(void __iomem *phy_reg)
 #endif
 #endif
 
-#ifdef CONFIG_USB_SUPPORT
+#if IS_ENABLED(CONFIG_USB_SUPPORT)
 static u64 usb_dma_mask = ~(u32)0;
 
-#ifdef CONFIG_USB_MV_UDC
+#if IS_ENABLED(CONFIG_USB_MV_UDC)
 struct resource pxa168_u2o_resources[] = {
         /* regbase */
         [0] = {
@@ -276,7 +276,7 @@ struct platform_device pxa168_device_u2o = {
 };
 #endif /* CONFIG_USB_MV_UDC */
 
-#ifdef CONFIG_USB_EHCI_MV_U2O
+#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
 struct resource pxa168_u2oehci_resources[] = {
         /* regbase */
         [0] = {
@@ -312,7 +312,7 @@ struct platform_device pxa168_device_u2oehci = {
 };
 #endif
 
-#if defined(CONFIG_USB_MV_OTG)
+#if IS_ENABLED(CONFIG_USB_MV_OTG)
 struct resource pxa168_u2ootg_resources[] = {
         /* regbase */
         [0] = {
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index cfadd974f5ce..ac4af81de3ea 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -164,8 +164,8 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
         },
 };
 
-#ifdef CONFIG_USB_SUPPORT
-#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)
+#if IS_ENABLED(CONFIG_USB_SUPPORT)
+#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
 
 static struct mv_usb_platform_data ttc_usb_pdata = {
         .vbus           = NULL,
@@ -178,14 +178,14 @@ static struct mv_usb_platform_data ttc_usb_pdata = {
 #endif
 #endif
 
-#ifdef CONFIG_MTD_NAND_PXA3xx
+#if IS_ENABLED(CONFIG_MTD_NAND_PXA3xx)
 static struct pxa3xx_nand_platform_data dkb_nand_info = {
         .enable_arbiter = 1,
         .num_cs = 1,
 };
 #endif
 
-#ifdef CONFIG_MMP_DISP
+#if IS_ENABLED(CONFIG_MMP_DISP)
 /* path config */
 #define CFG_IOPADMODE(iopad)   (iopad)  /* 0x0 ~ 0xd */
 #define SCLK_SOURCE_SELECT(x)  (x << 30) /* 0x0 ~ 0x3 */
@@ -275,7 +275,7 @@ static void __init ttc_dkb_init(void)
 
         /* on-chip devices */
         pxa910_add_uart(1);
-#ifdef CONFIG_MTD_NAND_PXA3xx
+#if IS_ENABLED(CONFIG_MTD_NAND_PXA3xx)
         pxa910_add_nand(&dkb_nand_info);
 #endif
 
@@ -285,22 +285,22 @@ static void __init ttc_dkb_init(void)
                                  sizeof(struct pxa_gpio_platform_data));
         platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));
 
-#ifdef CONFIG_USB_MV_UDC
+#if IS_ENABLED(CONFIG_USB_MV_UDC)
         pxa168_device_u2o.dev.platform_data = &ttc_usb_pdata;
         platform_device_register(&pxa168_device_u2o);
 #endif
 
-#ifdef CONFIG_USB_EHCI_MV_U2O
+#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
         pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata;
         platform_device_register(&pxa168_device_u2oehci);
 #endif
 
-#ifdef CONFIG_USB_MV_OTG
+#if IS_ENABLED(CONFIG_USB_MV_OTG)
         pxa168_device_u2ootg.dev.platform_data = &ttc_usb_pdata;
         platform_device_register(&pxa168_device_u2ootg);
 #endif
 
-#ifdef CONFIG_MMP_DISP
+#if IS_ENABLED(CONFIG_MMP_DISP)
         add_disp();
 #endif
 }
diff --git a/arch/arm/mach-moxart/Kconfig b/arch/arm/mach-moxart/Kconfig
index 3795ae28a613..e9b45bb58263 100644
--- a/arch/arm/mach-moxart/Kconfig
+++ b/arch/arm/mach-moxart/Kconfig
@@ -1,5 +1,5 @@
 config ARCH_MOXART
-        bool "MOXA ART SoC" if ARCH_MULTI_V4T
+        bool "MOXA ART SoC" if ARCH_MULTI_V4
         select CPU_FA526
         select ARM_DMA_MEM_BUFFERABLE
         select USE_OF
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index f8f6adfa07c6..fb9762464718 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
 #include <linux/completion.h>
+#include <linux/module.h>
 #include <mach/dma.h>
 #include <mach/msm_iomap.h>
 
@@ -77,6 +78,7 @@ void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful)
 {
         writel((graceful << 31), DMOV_FLUSH0(id));
 }
+EXPORT_SYMBOL_GPL(msm_dmov_stop_cmd);
 
 void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd)
 {
@@ -115,6 +117,7 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd)
         }
         spin_unlock_irqrestore(&msm_dmov_lock, irq_flags);
 }
+EXPORT_SYMBOL_GPL(msm_dmov_enqueue_cmd);
 
 struct msm_dmov_exec_cmdptr_cmd {
         struct msm_dmov_cmd dmov_cmd;
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index adc8971c7266..34e09474636d 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -78,8 +78,10 @@ void __init msm_map_common_io(void)
         asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
 #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
                 defined(CONFIG_DEBUG_MSM_UART3)
+#ifdef CONFIG_MMU
         debug_ll_addr(&msm_io_desc[size - 1].pfn,
                       &msm_io_desc[size - 1].virtual);
+#endif
         msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn);
 #endif
         iotable_init(msm_io_desc, size);
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index f6c9d1d85c14..5b793ebb0a24 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -21,6 +21,7 @@
 #include <linux/clocksource.h>
 #include <linux/dma-mapping.h>
 #include <linux/mbus.h>
+#include <linux/signal.h>
 #include <linux/slab.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c
index 4b2ed2e8352f..3d24ebf12095 100644
--- a/arch/arm/mach-nspire/nspire.c
+++ b/arch/arm/mach-nspire/nspire.c
@@ -63,7 +63,7 @@ static void __init nspire_init(void)
                         nspire_auxdata, NULL);
 }
 
-static void nspire_restart(char mode, const char *cmd)
+static void nspire_restart(enum reboot_mode mode, const char *cmd)
 {
         void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
         if (!base)
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index fd90cafc2e36..65d2acb31498 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -318,6 +318,9 @@ static void __init h2_init_smc91x(void)
 
 static int tps_setup(struct i2c_client *client, void *context)
 {
+        if (!IS_BUILTIN(CONFIG_TPS65010))
+                return -ENOSYS;
+        
         tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
                                 TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
 
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index d68909b095f1..3a0262156e93 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -191,6 +191,9 @@ static struct platform_device osk5912_tps_leds = {
 
 static int osk_tps_setup(struct i2c_client *client, void *context)
 {
+        if (!IS_BUILTIN(CONFIG_TPS65010))
+                return -ENOSYS;
+
         /* Set GPIO 1 HIGH to disable VBUS power supply;
          * OHCI driver powers it up/down as needed.
          */
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 40a1ae319610..dbee729e3b6d 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -71,7 +71,11 @@ static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE];
 static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];
 static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE];
 
-#ifdef CONFIG_OMAP_32K_TIMER
+#ifndef CONFIG_OMAP_32K_TIMER
+
+static unsigned short enable_dyn_sleep = 0;
+
+#else
 
 static unsigned short enable_dyn_sleep = 1;
 
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index e022a869bff2..6037a9a01ed5 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -222,6 +222,7 @@ void __init ti81xx_init_irq(void)
 static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
 {
         u32 irqnr;
+        int handled_irq = 0;
 
         do {
                 irqnr = readl_relaxed(base_addr + 0x98);
@@ -249,8 +250,15 @@ out:
                 if (irqnr) {
                         irqnr = irq_find_mapping(domain, irqnr);
                         handle_IRQ(irqnr, regs);
+                        handled_irq = 1;
                 }
         } while (irqnr);
+
+        /* If an irq is masked or deasserted while active, we will
+         * keep ending up here with no irq handled. So remove it from
+         * the INTC with an ack.*/
+        if (!handled_irq)
+                omap_ack_irq(NULL);
 }
 
 asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 3318cae96e7d..1219280bb976 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2541,8 +2541,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_spinlock_sysc = {
         .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
                            SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
                            SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                           SIDLE_SMART_WKUP),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 7bdd22afce69..d4d0fce325c7 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -103,7 +103,7 @@ static inline void enable_omap3630_toggle_l2_on_restore(void) { }
 
 #define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD      (1 << 0)
 
-#if defined(CONFIG_ARCH_OMAP4)
+#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
 extern u16 pm44xx_errata;
 #define IS_PM44XX_ERRATUM(id)           (pm44xx_errata & (id))
 #else
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 2cb2f06c20f5..14f2cae4109c 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -33,7 +33,6 @@ config MACH_KUROBOX_PRO
 config MACH_DNS323
         bool "D-Link DNS-323"
         select I2C_BOARDINFO
-        select PHYLIB
         help
           Say 'Y' here if you want your kernel to support the
           D-Link DNS-323 platform.
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 70974732cbf0..56edeab17b68 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -642,6 +642,8 @@ static void __init dns323_init(void)
                 platform_device_register_simple("dns323c-fan", 0, NULL, 0);
 
                 /* Register fixup for the PHY LEDs */
+                if (!IS_BUILTIN(CONFIG_PHYLIB))
+                        break;
                 phy_register_fixup_for_uid(MARVELL_PHY_ID_88E1118,
                                            MARVELL_PHY_ID_MASK,
                                            dns323c_phy_fixup);
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 96100dbf5a2e..a280cc42636b 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -53,12 +53,16 @@ config MACH_TAVOREVB
         select CPU_PXA930
         select CPU_PXA935
         select PXA3xx
+        select FB
+        select FB_PXA
 
 config MACH_SAAR
         bool "PXA930 Handheld Platform (aka SAAR)"
         select CPU_PXA930
         select CPU_PXA935
         select PXA3xx
+        select FB
+        select FB_PXA
 
 comment "Third Party Dev Platforms (sorted by vendor name)"
 
@@ -69,8 +73,7 @@ config ARCH_PXA_IDP
 config ARCH_VIPER
         bool "Arcom/Eurotech VIPER SBC"
         select ARCOM_PCMCIA
-        select HAVE_PWM
-        select I2C_GPIO
+        select I2C_GPIO if I2C=y
         select ISA
         select PXA25x
         select PXA_HAVE_ISA_IRQS
@@ -164,7 +167,6 @@ config MACH_XCEP
         select MTD_CFI_INTELEXT
         select MTD_PHYSMAP
         select PXA25x
-        select SMC91X
         help
           PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
           Tuned for usage in Libera instruments for particle accelerators.
@@ -181,6 +183,7 @@ config MACH_TRIZEPS4
 config MACH_TRIZEPS4WL
         bool "Keith und Koep Trizeps4-WL DIMM-Module"
         depends on TRIZEPS_PXA
+        select MACH_TRIZEPS4
         select PXA27x
         select TRIZEPS_PCMCIA
 
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 2f71b3fbd319..43596e0ed051 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -331,7 +331,6 @@ static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = {
 static void __init balloon3_udc_init(void)
 {
         pxa_set_udc_info(&balloon3_udc_info);
-        platform_device_register(&balloon3_gpio_vbus);
 }
 #else
 static inline void balloon3_udc_init(void) {}
diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 8404b24240ea..638b0bb88426 100644
--- a/arch/arm/mach-pxa/colibri-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -20,6 +20,7 @@
 #include <asm/mach/arch.h>
 #include <linux/i2c.h>
 #include <linux/i2c/pxa-i2c.h>
+#include <asm/io.h>
 
 #include <mach/pxa27x.h>
 #include <mach/colibri.h>
diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h
index 2022e092f0ca..db09170e3832 100644
--- a/arch/arm/mach-realview/include/mach/memory.h
+++ b/arch/arm/mach-realview/include/mach/memory.h
@@ -56,6 +56,8 @@
 #define PAGE_OFFSET1    (PAGE_OFFSET + 0x10000000)
 #define PAGE_OFFSET2    (PAGE_OFFSET + 0x30000000)
 
+#define PHYS_OFFSET PLAT_PHYS_OFFSET
+
 #define __phys_to_virt(phys)                                            \
         ((phys) >= 0x80000000 ? (phys) - 0x80000000 + PAGE_OFFSET2 :    \
          (phys) >= 0x20000000 ? (phys) - 0x20000000 + PAGE_OFFSET1 :    \
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index d876431d64c0..f2727f2cc661 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -537,7 +537,7 @@ config MACH_AT2440EVB
 
 config MACH_MINI2440
         bool "MINI2440 development board"
-        select EEPROM_AT24
+        select EEPROM_AT24 if I2C
         select LEDS_CLASS
         select LEDS_TRIGGERS
         select LEDS_TRIGGER_BACKLIGHT
@@ -573,7 +573,7 @@ config MACH_OSIRIS
 config MACH_OSIRIS_DVS
         tristate "Simtec IM2440D20 (OSIRIS) Dynamic Voltage Scaling driver"
         depends on MACH_OSIRIS
-        select TPS65010
+        depends on TPS65010
         help
           Say Y/M here if you want to have dynamic voltage scaling support
           on the Simtec IM2440D20 (OSIRIS) module via the TPS65011.
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index 4adaa4b43ffe..1d77d709ec22 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -484,7 +484,7 @@ struct platform_device s3c2440_device_dma = {
 };
 #endif
 
-#if defined(CONFIG_CPUS_3C2443) || defined(CONFIG_CPU_S3C2416)
+#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
 static struct resource s3c2443_dma_resource[] = {
         [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA),
         [1] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA0),
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index d9170e9f8ccd..ee7bb2905a99 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -196,7 +196,7 @@ static void gta02_charger_worker(struct work_struct *work)
          * If the PCF50633 ADC is disabled we fallback to a
          * 100mA limit for safety.
          */
-        pcf50633_mbc_usb_curlim_set(pcf, 100);
+        pcf50633_mbc_usb_curlim_set(gta02_pcf, 100);
 #endif
 }
 
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 64f04e6f9c31..3136d86b0d6e 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -86,8 +86,7 @@ config MACH_SMDK6400
        bool "SMDK6400"
         select CPU_S3C6400
         select S3C64XX_SETUP_SDHCI
-        select S3C_DEV_HSMMC
-        select S3C_DEV_NAND
+        select S3C_DEV_HSMMC1
         help
           Machine support for the Samsung SMDK6400
 
diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index 1649c0d1c1b8..ddf65583a5d8 100644
--- a/arch/arm/mach-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -55,7 +55,13 @@ static struct irq_grp_save {
         u32     mask;
 } eint_grp_save[5];
 
-static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
+#ifndef CONFIG_SERIAL_SAMSUNG_UARTS
+#define SERIAL_SAMSUNG_UARTS 0
+#else
+#define SERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
+#endif
+
+static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];
 
 static int s3c64xx_irq_pm_suspend(void)
 {
@@ -66,7 +72,7 @@ static int s3c64xx_irq_pm_suspend(void)
 
         s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
 
-        for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
+        for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
                 irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
 
         for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
@@ -87,7 +93,7 @@ static void s3c64xx_irq_pm_resume(void)
 
         s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
 
-        for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
+        for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
                 __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
 
         for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 7ccfef227c77..9c00d83f7151 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -401,4 +401,4 @@ static int __init wlf_gf_module_register(void)
 {
         return i2c_add_driver(&wlf_gf_module_driver);
 }
-module_init(wlf_gf_module_register);
+device_initcall(wlf_gf_module_register);
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 42e14f2e7ca7..f07edc304efb 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -205,6 +205,7 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
         samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
 }
 
+#ifdef CONFIG_CPU_S5P6440
 void __init s5p6440_map_io(void)
 {
         /* initialize any device information early */
@@ -218,7 +219,9 @@ void __init s5p6440_map_io(void)
 
         iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
 }
+#endif
 
+#ifdef CONFIG_CPU_S5P6450
 void __init s5p6450_map_io(void)
 {
         /* initialize any device information early */
@@ -232,13 +235,14 @@ void __init s5p6450_map_io(void)
 
         iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
 }
+#endif
 
 /*
  * s5p64x0_init_clocks
  *
  * register and setup the CPU clocks
  */
-
+#ifdef CONFIG_CPU_S5P6440
 void __init s5p6440_init_clocks(int xtal)
 {
         printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
@@ -248,7 +252,9 @@ void __init s5p6440_init_clocks(int xtal)
         s5p6440_register_clocks();
         s5p6440_setup_clocks();
 }
+#endif
 
+#ifdef CONFIG_CPU_S5P6450
 void __init s5p6450_init_clocks(int xtal)
 {
         printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
@@ -258,13 +264,14 @@ void __init s5p6450_init_clocks(int xtal)
         s5p6450_register_clocks();
         s5p6450_setup_clocks();
 }
+#endif
 
 /*
  * s5p64x0_init_irq
  *
  * register the CPU interrupts
  */
-
+#ifdef CONFIG_CPU_S5P6440
 void __init s5p6440_init_irq(void)
 {
         /* S5P6440 supports 2 VIC */
@@ -279,7 +286,9 @@ void __init s5p6440_init_irq(void)
 
         s5p_init_irq(vic, ARRAY_SIZE(vic));
 }
+#endif
 
+#ifdef CONFIG_CPU_S5P6450
 void __init s5p6450_init_irq(void)
 {
         /* S5P6450 supports only 2 VIC */
@@ -294,6 +303,7 @@ void __init s5p6450_init_irq(void)
 
         s5p_init_irq(vic, ARRAY_SIZE(vic));
 }
+#endif
 
 struct bus_type s5p64x0_subsys = {
         .name           = "s5p64x0-core",
@@ -321,6 +331,7 @@ int __init s5p64x0_init(void)
 }
 
 /* uart registration process */
+#ifdef CONFIG_CPU_S5P6440
 void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
         int uart;
@@ -332,11 +343,14 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 
         s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
 }
+#endif
 
+#ifdef CONFIG_CPU_S5P6450
 void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
         s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
 }
+#endif
 
 #define eint_offset(irq)        ((irq) - IRQ_EINT(0))
 
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h
index f3a9b43cba4a..cbe7f3d731d0 100644
--- a/arch/arm/mach-s5p64x0/common.h
+++ b/arch/arm/mach-s5p64x0/common.h
@@ -25,10 +25,10 @@ void s5p6450_register_clocks(void);
 void s5p6450_setup_clocks(void);
 
 void s5p64x0_restart(enum reboot_mode mode, const char *cmd);
+extern  int s5p64x0_init(void);
 
 #ifdef CONFIG_CPU_S5P6440
 
-extern  int s5p64x0_init(void);
 extern void s5p6440_map_io(void);
 extern void s5p6440_init_clocks(int xtal);
 
@@ -38,12 +38,10 @@ extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 #define s5p6440_init_clocks NULL
 #define s5p6440_init_uarts NULL
 #define s5p6440_map_io NULL
-#define s5p64x0_init NULL
 #endif
 
 #ifdef CONFIG_CPU_S5P6450
 
-extern  int s5p64x0_init(void);
 extern void s5p6450_map_io(void);
 extern void s5p6450_init_clocks(int xtal);
 
@@ -53,7 +51,6 @@ extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 #define s5p6450_init_clocks NULL
 #define s5p6450_init_uarts NULL
 #define s5p6450_map_io NULL
-#define s5p64x0_init NULL
 #endif
 
 #endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
diff --git a/arch/arm/mach-s5p64x0/irq-pm.c b/arch/arm/mach-s5p64x0/irq-pm.c
index 3e6f2456ee9d..d5f0fd66b635 100644
--- a/arch/arm/mach-s5p64x0/irq-pm.c
+++ b/arch/arm/mach-s5p64x0/irq-pm.c
@@ -34,7 +34,9 @@ static struct irq_grp_save {
         u32     mask;
 } eint_grp_save[4];
 
+#ifdef CONFIG_SERIAL_SAMSUNG
 static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
+#endif
 
 static int s5p64x0_irq_pm_suspend(void)
 {
@@ -45,8 +47,10 @@ static int s5p64x0_irq_pm_suspend(void)
 
         s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
 
+#ifdef CONFIG_SERIAL_SAMSUNG
         for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
                 irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
+#endif
 
         for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
                 grp->con = __raw_readl(S5P64X0_EINT12CON + (i * 4));
@@ -66,8 +70,10 @@ static void s5p64x0_irq_pm_resume(void)
 
         s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
 
+#ifdef CONFIG_SERIAL_SAMSUNG
         for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
                 __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
+#endif
 
         for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
                 __raw_writel(grp->con, S5P64X0_EINT12CON + (i * 4));
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index caaedafbbf5f..8c3abe521757 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -189,6 +189,7 @@ config MACH_TORBRECK
         select S5PV210_SETUP_I2C1
         select S5PV210_SETUP_I2C2
         select S5PV210_SETUP_SDHCI
+        select SAMSUNG_DEV_IDE
         help
           Machine support for aESOP Torbreck
 
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index d9397202d6ec..27b168f121a1 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_ARCH_SUNXI) += sunxi.o
-obj-$(CONFIG_SMP) += platsmp.o headsmp.o
+obj-$(CONFIG_SMP) += platsmp.o
diff --git a/arch/arm/mach-sunxi/headsmp.S b/arch/arm/mach-sunxi/headsmp.S
deleted file mode 100644
index a10d494fb37b..000000000000
--- a/arch/arm/mach-sunxi/headsmp.S
+++ /dev/null
@@ -1,9 +0,0 @@
-#include <linux/linkage.h>
-#include <linux/init.h>
-
-        .section ".text.head", "ax"
-
-ENTRY(sun6i_secondary_startup)
-        msr     cpsr_fsxc, #0xd3
-        b       secondary_startup
-ENDPROC(sun6i_secondary_startup)
diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c
index 7b141d8342a1..0c7dbce033cc 100644
--- a/arch/arm/mach-sunxi/platsmp.c
+++ b/arch/arm/mach-sunxi/platsmp.c
@@ -82,7 +82,7 @@ static int sun6i_smp_boot_secondary(unsigned int cpu,
         spin_lock(&cpu_lock);
 
         /* Set CPU boot address */
-        writel(virt_to_phys(sun6i_secondary_startup),
+        writel(virt_to_phys(secondary_startup),
                cpucfg_membase + CPUCFG_PRIVATE0_REG);
 
         /* Assert the CPU core in reset */
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ca8ecdee47d8..241622e2fea3 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -264,7 +264,7 @@ config CPU_ARM1026
 
 # SA110
 config CPU_SA110
-        bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC
+        bool
         select CPU_32v3 if ARCH_RPC
         select CPU_32v4 if !ARCH_RPC
         select CPU_ABRT_EV4
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 58645a58d0d8..b57e922f1614 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -427,8 +427,7 @@ comment "Power management"
 
 config SAMSUNG_PM_DEBUG
         bool "S3C2410 PM Suspend debug"
-        depends on PM
-        select DEBUG_LL
+        depends on PM && DEBUG_KERNEL && DEBUG_S3C_UART
         help
           Say Y here if you want verbose debugging from the PM Suspend and
           Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
@@ -445,7 +444,8 @@ config S3C_PM_DEBUG_LED_SMDK
 
 config SAMSUNG_PM_CHECK
         bool "S3C2410 PM Suspend Memory CRC"
-        depends on PM && CRC32
+        depends on PM
+        select CRC32
         help
           Enable the PM code's memory area checksum over sleep. This option
           will generate CRCs of all blocks of memory, and store them before
diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
index aa9511b6914a..a30df396ca34 100644
--- a/arch/arm/plat-samsung/init.c
+++ b/arch/arm/plat-samsung/init.c
@@ -97,7 +97,9 @@ void __init s3c24xx_init_clocks(int xtal)
 #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
 static int nr_uarts __initdata = 0;
 
+#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
+#endif
 
 /* s3c24xx_init_uartdevs
  *
@@ -112,6 +114,7 @@ void __init s3c24xx_init_uartdevs(char *name,
                                   struct s3c24xx_uart_resources *res,
                                   struct s3c2410_uartcfg *cfg, int no)
 {
+#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
         struct platform_device *platdev;
         struct s3c2410_uartcfg *cfgptr = uart_cfgs;
         struct s3c24xx_uart_resources *resp;
@@ -134,6 +137,7 @@ void __init s3c24xx_init_uartdevs(char *name,
         }
 
         nr_uarts = no;
+#endif
 }
 
 void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index ae00218b5da3..02517a8206bd 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -222,7 +222,6 @@ static struct ti_dt_clk omap44xx_clks[] = {
         DT_CLK(NULL, "auxclk5_src_ck", "auxclk5_src_ck"),
         DT_CLK(NULL, "auxclk5_ck", "auxclk5_ck"),
         DT_CLK(NULL, "auxclkreq5_ck", "auxclkreq5_ck"),
-        DT_CLK("50000000.gpmc", "fck", "dummy_ck"),
         DT_CLK("omap_i2c.1", "ick", "dummy_ck"),
         DT_CLK("omap_i2c.2", "ick", "dummy_ck"),
         DT_CLK("omap_i2c.3", "ick", "dummy_ck"),
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 0ef9f581286b..08f3d1b915b3 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -182,7 +182,6 @@ static struct ti_dt_clk omap54xx_clks[] = {
         DT_CLK(NULL, "auxclk3_src_ck", "auxclk3_src_ck"),
         DT_CLK(NULL, "auxclk3_ck", "auxclk3_ck"),
         DT_CLK(NULL, "auxclkreq3_ck", "auxclkreq3_ck"),
-        DT_CLK(NULL, "gpmc_ck", "dummy_ck"),
         DT_CLK("omap_i2c.1", "ick", "dummy_ck"),
         DT_CLK("omap_i2c.2", "ick", "dummy_ck"),
         DT_CLK("omap_i2c.3", "ick", "dummy_ck"),
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 9977653f2d63..f7e40734c819 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -262,7 +262,6 @@ static struct ti_dt_clk dra7xx_clks[] = {
         DT_CLK(NULL, "vip1_gclk_mux", "vip1_gclk_mux"),
         DT_CLK(NULL, "vip2_gclk_mux", "vip2_gclk_mux"),
         DT_CLK(NULL, "vip3_gclk_mux", "vip3_gclk_mux"),
-        DT_CLK(NULL, "gpmc_ck", "dummy_ck"),
         DT_CLK("omap_i2c.1", "ick", "dummy_ck"),
         DT_CLK("omap_i2c.2", "ick", "dummy_ck"),
         DT_CLK("omap_i2c.3", "ick", "dummy_ck"),
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 531769b2433a..63922b9ba6b7 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -661,9 +661,9 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
 
         /*
          * Ensure that stores to Normal memory are visible to the
-         * other CPUs before issuing the IPI.
+         * other CPUs before they observe us issuing the IPI.
          */
-        dsb();
+        dmb(ishst);
 
         /* this always happens on GIC0 */
         writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h
index 49444203328a..f2b405116166 100644
--- a/include/linux/pxa2xx_ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -219,7 +219,7 @@ static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg)
         return __raw_readl(dev->mmio_base + reg);
 }
 
-#ifdef CONFIG_ARCH_PXA
+#if IS_ENABLED(CONFIG_PXA_SSP)
 struct ssp_device *pxa_ssp_request(int port, const char *label);
 void pxa_ssp_free(struct ssp_device *);
 struct ssp_device *pxa_ssp_request_of(const struct device_node *of_node,