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-rw-r--r--arch/sh/boards/renesas/migor/setup.c9
-rw-r--r--include/asm-sh/migor.h58
2 files changed, 59 insertions, 8 deletions
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index 8a6ee842624f..aa79fc87a721 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -14,6 +14,7 @@
14#include <asm/machvec.h> 14#include <asm/machvec.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/sh_keysc.h> 16#include <asm/sh_keysc.h>
17#include <asm/migor.h>
17 18
18/* Address IRQ Size Bus Description 19/* Address IRQ Size Bus Description
19 * 0x00000000 64MB 16 NOR Flash (SP29PL256N) 20 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
@@ -87,14 +88,6 @@ static int __init migor_devices_setup(void)
87} 88}
88__initcall(migor_devices_setup); 89__initcall(migor_devices_setup);
89 90
90#define PORT_PJCR 0xA4050110UL
91#define PORT_PSELA 0xA405014EUL
92#define PORT_PYCR 0xA405014AUL
93#define PORT_PZCR 0xA405014CUL
94#define PORT_HIZCRA 0xA4050158UL
95#define PORT_HIZCRC 0xA405015CUL
96#define MSTPCR2 0xA4150038UL
97
98static void __init migor_setup(char **cmdline_p) 91static void __init migor_setup(char **cmdline_p)
99{ 92{
100 /* SMC91C111 - Enable IRQ0 */ 93 /* SMC91C111 - Enable IRQ0 */
diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h
new file mode 100644
index 000000000000..2329363afdc3
--- /dev/null
+++ b/include/asm-sh/migor.h
@@ -0,0 +1,58 @@
1#ifndef __ASM_SH_MIGOR_H
2#define __ASM_SH_MIGOR_H
3
4/*
5 * linux/include/asm-sh/migor.h
6 *
7 * Copyright (C) 2008 Renesas Solutions
8 *
9 * Portions Copyright (C) 2007 Nobuhiro Iwamatsu
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16#include <asm/addrspace.h>
17
18/* GPIO */
19#define MSTPCR0 0xa4150030
20#define MSTPCR1 0xa4150034
21#define MSTPCR2 0xa4150038
22
23#define PORT_PACR 0xa4050100
24#define PORT_PDCR 0xa4050106
25#define PORT_PECR 0xa4050108
26#define PORT_PHCR 0xa405010e
27#define PORT_PJCR 0xa4050110
28#define PORT_PKCR 0xa4050112
29#define PORT_PLCR 0xa4050114
30#define PORT_PMCR 0xa4050116
31#define PORT_PRCR 0xa405011c
32#define PORT_PWCR 0xa4050146
33#define PORT_PXCR 0xa4050148
34#define PORT_PYCR 0xa405014a
35#define PORT_PZCR 0xa405014c
36#define PORT_PADR 0xa4050120
37#define PORT_PWDR 0xa4050166
38
39#define PORT_HIZCRA 0xa4050158
40#define PORT_HIZCRC 0xa405015c
41
42#define PORT_MSELCRB 0xa4050182
43
44#define MSTPCR1 0xa4150034
45#define MSTPCR2 0xa4150038
46
47#define PORT_PSELA 0xa405014e
48#define PORT_PSELB 0xa4050150
49#define PORT_PSELC 0xa4050152
50#define PORT_PSELD 0xa4050154
51
52#define PORT_HIZCRA 0xa4050158
53#define PORT_HIZCRB 0xa405015a
54#define PORT_HIZCRC 0xa405015c
55
56#define BSC_CS6ABCR 0xfec1001c
57
58#endif /* __ASM_SH_MIGOR_H */