diff options
| -rw-r--r-- | Documentation/devicetree/bindings/net/keystone-netcp.txt | 18 | ||||
| -rw-r--r-- | drivers/net/ethernet/ti/netcp_ethss.c | 920 |
2 files changed, 902 insertions, 36 deletions
diff --git a/Documentation/devicetree/bindings/net/keystone-netcp.txt b/Documentation/devicetree/bindings/net/keystone-netcp.txt index 8368abdd5a34..d0e6fa38f335 100644 --- a/Documentation/devicetree/bindings/net/keystone-netcp.txt +++ b/Documentation/devicetree/bindings/net/keystone-netcp.txt | |||
| @@ -65,12 +65,30 @@ NetCP device properties: Device specification for NetCP sub-modules. | |||
| 65 | 1Gb/10Gb (gbe/xgbe) ethernet switch sub-module specifications. | 65 | 1Gb/10Gb (gbe/xgbe) ethernet switch sub-module specifications. |
| 66 | Required properties: | 66 | Required properties: |
| 67 | - label: Must be "netcp-gbe" for 1Gb & "netcp-xgbe" for 10Gb. | 67 | - label: Must be "netcp-gbe" for 1Gb & "netcp-xgbe" for 10Gb. |
| 68 | - compatible: Must be one of below:- | ||
| 69 | "ti,netcp-gbe" for 1GbE on NetCP 1.4 | ||
| 70 | "ti,netcp-gbe-5" for 1GbE N NetCP 1.5 (N=5) | ||
| 71 | "ti,netcp-gbe-9" for 1GbE N NetCP 1.5 (N=9) | ||
| 72 | "ti,netcp-gbe-2" for 1GbE N NetCP 1.5 (N=2) | ||
| 73 | "ti,netcp-xgbe" for 10 GbE | ||
| 74 | |||
| 68 | - reg: register location and the size for the following register | 75 | - reg: register location and the size for the following register |
| 69 | regions in the specified order. | 76 | regions in the specified order. |
| 70 | - switch subsystem registers | 77 | - switch subsystem registers |
| 71 | - sgmii port3/4 module registers (only for NetCP 1.4) | 78 | - sgmii port3/4 module registers (only for NetCP 1.4) |
| 72 | - switch module registers | 79 | - switch module registers |
| 73 | - serdes registers (only for 10G) | 80 | - serdes registers (only for 10G) |
| 81 | |||
| 82 | NetCP 1.4 ethss, here is the order | ||
| 83 | index #0 - switch subsystem registers | ||
| 84 | index #1 - sgmii port3/4 module registers | ||
| 85 | index #2 - switch module registers | ||
| 86 | |||
| 87 | NetCP 1.5 ethss 9 port, 5 port and 2 port | ||
| 88 | index #0 - switch subsystem registers | ||
| 89 | index #1 - switch module registers | ||
| 90 | index #2 - serdes registers | ||
| 91 | |||
| 74 | - tx-channel: the navigator packet dma channel name for tx. | 92 | - tx-channel: the navigator packet dma channel name for tx. |
| 75 | - tx-queue: the navigator queue number associated with the tx dma channel. | 93 | - tx-queue: the navigator queue number associated with the tx dma channel. |
| 76 | - interfaces: specification for each of the switch port to be registered as a | 94 | - interfaces: specification for each of the switch port to be registered as a |
diff --git a/drivers/net/ethernet/ti/netcp_ethss.c b/drivers/net/ethernet/ti/netcp_ethss.c index f8f3be3fd59f..2bef655279f3 100644 --- a/drivers/net/ethernet/ti/netcp_ethss.c +++ b/drivers/net/ethernet/ti/netcp_ethss.c | |||
| @@ -53,10 +53,31 @@ | |||
| 53 | #define GBE13_HW_STATS_OFFSET 0x300 | 53 | #define GBE13_HW_STATS_OFFSET 0x300 |
| 54 | #define GBE13_ALE_OFFSET 0x600 | 54 | #define GBE13_ALE_OFFSET 0x600 |
| 55 | #define GBE13_HOST_PORT_NUM 0 | 55 | #define GBE13_HOST_PORT_NUM 0 |
| 56 | #define GBE13_NUM_SLAVES 4 | ||
| 57 | #define GBE13_NUM_ALE_PORTS (GBE13_NUM_SLAVES + 1) | ||
| 58 | #define GBE13_NUM_ALE_ENTRIES 1024 | 56 | #define GBE13_NUM_ALE_ENTRIES 1024 |
| 59 | 57 | ||
| 58 | /* 1G Ethernet NU SS defines */ | ||
| 59 | #define GBENU_MODULE_NAME "netcp-gbenu" | ||
| 60 | #define GBE_SS_ID_NU 0x4ee6 | ||
| 61 | #define GBE_SS_ID_2U 0x4ee8 | ||
| 62 | |||
| 63 | #define IS_SS_ID_MU(d) \ | ||
| 64 | ((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \ | ||
| 65 | (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U)) | ||
| 66 | |||
| 67 | #define IS_SS_ID_NU(d) \ | ||
| 68 | (GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) | ||
| 69 | |||
| 70 | #define GBENU_SS_REG_INDEX 0 | ||
| 71 | #define GBENU_SM_REG_INDEX 1 | ||
| 72 | #define GBENU_SGMII_MODULE_OFFSET 0x100 | ||
| 73 | #define GBENU_HOST_PORT_OFFSET 0x1000 | ||
| 74 | #define GBENU_SLAVE_PORT_OFFSET 0x2000 | ||
| 75 | #define GBENU_EMAC_OFFSET 0x2330 | ||
| 76 | #define GBENU_HW_STATS_OFFSET 0x1a000 | ||
| 77 | #define GBENU_ALE_OFFSET 0x1e000 | ||
| 78 | #define GBENU_HOST_PORT_NUM 0 | ||
| 79 | #define GBENU_NUM_ALE_ENTRIES 1024 | ||
| 80 | |||
| 60 | /* 10G Ethernet SS defines */ | 81 | /* 10G Ethernet SS defines */ |
| 61 | #define XGBE_MODULE_NAME "netcp-xgbe" | 82 | #define XGBE_MODULE_NAME "netcp-xgbe" |
| 62 | #define XGBE_SS_VERSION_10 0x4ee42100 | 83 | #define XGBE_SS_VERSION_10 0x4ee42100 |
| @@ -74,8 +95,6 @@ | |||
| 74 | #define XGBE10_ALE_OFFSET 0x700 | 95 | #define XGBE10_ALE_OFFSET 0x700 |
| 75 | #define XGBE10_HW_STATS_OFFSET 0x800 | 96 | #define XGBE10_HW_STATS_OFFSET 0x800 |
| 76 | #define XGBE10_HOST_PORT_NUM 0 | 97 | #define XGBE10_HOST_PORT_NUM 0 |
| 77 | #define XGBE10_NUM_SLAVES 2 | ||
| 78 | #define XGBE10_NUM_ALE_PORTS (XGBE10_NUM_SLAVES + 1) | ||
| 79 | #define XGBE10_NUM_ALE_ENTRIES 1024 | 98 | #define XGBE10_NUM_ALE_ENTRIES 1024 |
| 80 | 99 | ||
| 81 | #define GBE_TIMER_INTERVAL (HZ / 2) | 100 | #define GBE_TIMER_INTERVAL (HZ / 2) |
| @@ -95,7 +114,7 @@ | |||
| 95 | #define MACSL_FULLDUPLEX BIT(0) | 114 | #define MACSL_FULLDUPLEX BIT(0) |
| 96 | 115 | ||
| 97 | #define GBE_CTL_P0_ENABLE BIT(2) | 116 | #define GBE_CTL_P0_ENABLE BIT(2) |
| 98 | #define GBE_REG_VAL_STAT_ENABLE_ALL 0xff | 117 | #define GBE13_REG_VAL_STAT_ENABLE_ALL 0xff |
| 99 | #define XGBE_REG_VAL_STAT_ENABLE_ALL 0xf | 118 | #define XGBE_REG_VAL_STAT_ENABLE_ALL 0xf |
| 100 | #define GBE_STATS_CD_SEL BIT(28) | 119 | #define GBE_STATS_CD_SEL BIT(28) |
| 101 | 120 | ||
| @@ -115,11 +134,20 @@ | |||
| 115 | #define GBE_STATSC_MODULE 2 | 134 | #define GBE_STATSC_MODULE 2 |
| 116 | #define GBE_STATSD_MODULE 3 | 135 | #define GBE_STATSD_MODULE 3 |
| 117 | 136 | ||
| 137 | #define GBENU_STATS0_MODULE 0 | ||
| 138 | #define GBENU_STATS1_MODULE 1 | ||
| 139 | #define GBENU_STATS2_MODULE 2 | ||
| 140 | #define GBENU_STATS3_MODULE 3 | ||
| 141 | #define GBENU_STATS4_MODULE 4 | ||
| 142 | #define GBENU_STATS5_MODULE 5 | ||
| 143 | #define GBENU_STATS6_MODULE 6 | ||
| 144 | #define GBENU_STATS7_MODULE 7 | ||
| 145 | #define GBENU_STATS8_MODULE 8 | ||
| 146 | |||
| 118 | #define XGBE_STATS0_MODULE 0 | 147 | #define XGBE_STATS0_MODULE 0 |
| 119 | #define XGBE_STATS1_MODULE 1 | 148 | #define XGBE_STATS1_MODULE 1 |
| 120 | #define XGBE_STATS2_MODULE 2 | 149 | #define XGBE_STATS2_MODULE 2 |
| 121 | 150 | ||
| 122 | #define MAX_SLAVES GBE13_NUM_SLAVES | ||
| 123 | /* s: 0-based slave_port */ | 151 | /* s: 0-based slave_port */ |
| 124 | #define SGMII_BASE(s) \ | 152 | #define SGMII_BASE(s) \ |
| 125 | (((s) < 2) ? gbe_dev->sgmii_port_regs : gbe_dev->sgmii_port34_regs) | 153 | (((s) < 2) ? gbe_dev->sgmii_port_regs : gbe_dev->sgmii_port34_regs) |
| @@ -132,10 +160,14 @@ | |||
| 132 | 160 | ||
| 133 | #define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ | 161 | #define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ |
| 134 | offsetof(struct gbe##_##rb, rn) | 162 | offsetof(struct gbe##_##rb, rn) |
| 163 | #define GBENU_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ | ||
| 164 | offsetof(struct gbenu##_##rb, rn) | ||
| 135 | #define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ | 165 | #define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ |
| 136 | offsetof(struct xgbe##_##rb, rn) | 166 | offsetof(struct xgbe##_##rb, rn) |
| 137 | #define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn) | 167 | #define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn) |
| 138 | 168 | ||
| 169 | #define HOST_TX_PRI_MAP_DEFAULT 0x00000000 | ||
| 170 | |||
| 139 | struct xgbe_ss_regs { | 171 | struct xgbe_ss_regs { |
| 140 | u32 id_ver; | 172 | u32 id_ver; |
| 141 | u32 synce_count; | 173 | u32 synce_count; |
| @@ -265,6 +297,192 @@ struct xgbe_hw_stats { | |||
| 265 | 297 | ||
| 266 | #define XGBE10_NUM_STAT_ENTRIES (sizeof(struct xgbe_hw_stats)/sizeof(u32)) | 298 | #define XGBE10_NUM_STAT_ENTRIES (sizeof(struct xgbe_hw_stats)/sizeof(u32)) |
| 267 | 299 | ||
| 300 | struct gbenu_ss_regs { | ||
| 301 | u32 id_ver; | ||
| 302 | u32 synce_count; /* NU */ | ||
| 303 | u32 synce_mux; /* NU */ | ||
| 304 | u32 control; /* 2U */ | ||
| 305 | u32 __rsvd_0[2]; /* 2U */ | ||
| 306 | u32 rgmii_status; /* 2U */ | ||
| 307 | u32 ss_status; /* 2U */ | ||
| 308 | }; | ||
| 309 | |||
| 310 | struct gbenu_switch_regs { | ||
| 311 | u32 id_ver; | ||
| 312 | u32 control; | ||
| 313 | u32 __rsvd_0[2]; | ||
| 314 | u32 emcontrol; | ||
| 315 | u32 stat_port_en; | ||
| 316 | u32 ptype; /* NU */ | ||
| 317 | u32 soft_idle; | ||
| 318 | u32 thru_rate; /* NU */ | ||
| 319 | u32 gap_thresh; /* NU */ | ||
| 320 | u32 tx_start_wds; /* NU */ | ||
| 321 | u32 eee_prescale; /* 2U */ | ||
| 322 | u32 tx_g_oflow_thresh_set; /* NU */ | ||
| 323 | u32 tx_g_oflow_thresh_clr; /* NU */ | ||
| 324 | u32 tx_g_buf_thresh_set_l; /* NU */ | ||
| 325 | u32 tx_g_buf_thresh_set_h; /* NU */ | ||
| 326 | u32 tx_g_buf_thresh_clr_l; /* NU */ | ||
| 327 | u32 tx_g_buf_thresh_clr_h; /* NU */ | ||
| 328 | }; | ||
| 329 | |||
| 330 | struct gbenu_port_regs { | ||
| 331 | u32 __rsvd_0; | ||
| 332 | u32 control; | ||
| 333 | u32 max_blks; /* 2U */ | ||
| 334 | u32 mem_align1; | ||
| 335 | u32 blk_cnt; | ||
| 336 | u32 port_vlan; | ||
| 337 | u32 tx_pri_map; /* NU */ | ||
| 338 | u32 pri_ctl; /* 2U */ | ||
| 339 | u32 rx_pri_map; | ||
| 340 | u32 rx_maxlen; | ||
| 341 | u32 tx_blks_pri; /* NU */ | ||
| 342 | u32 __rsvd_1; | ||
| 343 | u32 idle2lpi; /* 2U */ | ||
| 344 | u32 lpi2idle; /* 2U */ | ||
| 345 | u32 eee_status; /* 2U */ | ||
| 346 | u32 __rsvd_2; | ||
| 347 | u32 __rsvd_3[176]; /* NU: more to add */ | ||
| 348 | u32 __rsvd_4[2]; | ||
| 349 | u32 sa_lo; | ||
| 350 | u32 sa_hi; | ||
| 351 | u32 ts_ctl; | ||
| 352 | u32 ts_seq_ltype; | ||
| 353 | u32 ts_vlan; | ||
| 354 | u32 ts_ctl_ltype2; | ||
| 355 | u32 ts_ctl2; | ||
| 356 | }; | ||
| 357 | |||
| 358 | struct gbenu_host_port_regs { | ||
| 359 | u32 __rsvd_0; | ||
| 360 | u32 control; | ||
| 361 | u32 flow_id_offset; /* 2U */ | ||
| 362 | u32 __rsvd_1; | ||
| 363 | u32 blk_cnt; | ||
| 364 | u32 port_vlan; | ||
| 365 | u32 tx_pri_map; /* NU */ | ||
| 366 | u32 pri_ctl; | ||
| 367 | u32 rx_pri_map; | ||
| 368 | u32 rx_maxlen; | ||
| 369 | u32 tx_blks_pri; /* NU */ | ||
| 370 | u32 __rsvd_2; | ||
| 371 | u32 idle2lpi; /* 2U */ | ||
| 372 | u32 lpi2wake; /* 2U */ | ||
| 373 | u32 eee_status; /* 2U */ | ||
| 374 | u32 __rsvd_3; | ||
| 375 | u32 __rsvd_4[184]; /* NU */ | ||
| 376 | u32 host_blks_pri; /* NU */ | ||
| 377 | }; | ||
| 378 | |||
| 379 | struct gbenu_emac_regs { | ||
| 380 | u32 mac_control; | ||
| 381 | u32 mac_status; | ||
| 382 | u32 soft_reset; | ||
| 383 | u32 boff_test; | ||
| 384 | u32 rx_pause; | ||
| 385 | u32 __rsvd_0[11]; /* NU */ | ||
| 386 | u32 tx_pause; | ||
| 387 | u32 __rsvd_1[11]; /* NU */ | ||
| 388 | u32 em_control; | ||
| 389 | u32 tx_gap; | ||
| 390 | }; | ||
| 391 | |||
| 392 | /* Some hw stat regs are applicable to slave port only. | ||
| 393 | * This is handled by gbenu_et_stats struct. Also some | ||
| 394 | * are for SS version NU and some are for 2U. | ||
| 395 | */ | ||
| 396 | struct gbenu_hw_stats { | ||
| 397 | u32 rx_good_frames; | ||
| 398 | u32 rx_broadcast_frames; | ||
| 399 | u32 rx_multicast_frames; | ||
| 400 | u32 rx_pause_frames; /* slave */ | ||
| 401 | u32 rx_crc_errors; | ||
| 402 | u32 rx_align_code_errors; /* slave */ | ||
| 403 | u32 rx_oversized_frames; | ||
| 404 | u32 rx_jabber_frames; /* slave */ | ||
| 405 | u32 rx_undersized_frames; | ||
| 406 | u32 rx_fragments; /* slave */ | ||
| 407 | u32 ale_drop; | ||
| 408 | u32 ale_overrun_drop; | ||
| 409 | u32 rx_bytes; | ||
| 410 | u32 tx_good_frames; | ||
| 411 | u32 tx_broadcast_frames; | ||
| 412 | u32 tx_multicast_frames; | ||
| 413 | u32 tx_pause_frames; /* slave */ | ||
| 414 | u32 tx_deferred_frames; /* slave */ | ||
| 415 | u32 tx_collision_frames; /* slave */ | ||
| 416 | u32 tx_single_coll_frames; /* slave */ | ||
| 417 | u32 tx_mult_coll_frames; /* slave */ | ||
| 418 | u32 tx_excessive_collisions; /* slave */ | ||
| 419 | u32 tx_late_collisions; /* slave */ | ||
| 420 | u32 rx_ipg_error; /* slave 10G only */ | ||
| 421 | u32 tx_carrier_sense_errors; /* slave */ | ||
| 422 | u32 tx_bytes; | ||
| 423 | u32 tx_64B_frames; | ||
| 424 | u32 tx_65_to_127B_frames; | ||
| 425 | u32 tx_128_to_255B_frames; | ||
| 426 | u32 tx_256_to_511B_frames; | ||
| 427 | u32 tx_512_to_1023B_frames; | ||
| 428 | u32 tx_1024B_frames; | ||
| 429 | u32 net_bytes; | ||
| 430 | u32 rx_bottom_fifo_drop; | ||
| 431 | u32 rx_port_mask_drop; | ||
| 432 | u32 rx_top_fifo_drop; | ||
| 433 | u32 ale_rate_limit_drop; | ||
| 434 | u32 ale_vid_ingress_drop; | ||
| 435 | u32 ale_da_eq_sa_drop; | ||
| 436 | u32 __rsvd_0[3]; | ||
| 437 | u32 ale_unknown_ucast; | ||
| 438 | u32 ale_unknown_ucast_bytes; | ||
| 439 | u32 ale_unknown_mcast; | ||
| 440 | u32 ale_unknown_mcast_bytes; | ||
| 441 | u32 ale_unknown_bcast; | ||
| 442 | u32 ale_unknown_bcast_bytes; | ||
| 443 | u32 ale_pol_match; | ||
| 444 | u32 ale_pol_match_red; /* NU */ | ||
| 445 | u32 ale_pol_match_yellow; /* NU */ | ||
| 446 | u32 __rsvd_1[44]; | ||
| 447 | u32 tx_mem_protect_err; | ||
| 448 | /* following NU only */ | ||
| 449 | u32 tx_pri0; | ||
| 450 | u32 tx_pri1; | ||
| 451 | u32 tx_pri2; | ||
| 452 | u32 tx_pri3; | ||
| 453 | u32 tx_pri4; | ||
| 454 | u32 tx_pri5; | ||
| 455 | u32 tx_pri6; | ||
| 456 | u32 tx_pri7; | ||
| 457 | u32 tx_pri0_bcnt; | ||
| 458 | u32 tx_pri1_bcnt; | ||
| 459 | u32 tx_pri2_bcnt; | ||
| 460 | u32 tx_pri3_bcnt; | ||
| 461 | u32 tx_pri4_bcnt; | ||
| 462 | u32 tx_pri5_bcnt; | ||
| 463 | u32 tx_pri6_bcnt; | ||
| 464 | u32 tx_pri7_bcnt; | ||
| 465 | u32 tx_pri0_drop; | ||
| 466 | u32 tx_pri1_drop; | ||
| 467 | u32 tx_pri2_drop; | ||
| 468 | u32 tx_pri3_drop; | ||
| 469 | u32 tx_pri4_drop; | ||
| 470 | u32 tx_pri5_drop; | ||
| 471 | u32 tx_pri6_drop; | ||
| 472 | u32 tx_pri7_drop; | ||
| 473 | u32 tx_pri0_drop_bcnt; | ||
| 474 | u32 tx_pri1_drop_bcnt; | ||
| 475 | u32 tx_pri2_drop_bcnt; | ||
| 476 | u32 tx_pri3_drop_bcnt; | ||
| 477 | u32 tx_pri4_drop_bcnt; | ||
| 478 | u32 tx_pri5_drop_bcnt; | ||
| 479 | u32 tx_pri6_drop_bcnt; | ||
| 480 | u32 tx_pri7_drop_bcnt; | ||
| 481 | }; | ||
| 482 | |||
| 483 | #define GBENU_NUM_HW_STAT_ENTRIES (sizeof(struct gbenu_hw_stats) / sizeof(u32)) | ||
| 484 | #define GBENU_HW_STATS_REG_MAP_SZ 0x200 | ||
| 485 | |||
| 268 | struct gbe_ss_regs { | 486 | struct gbe_ss_regs { |
| 269 | u32 id_ver; | 487 | u32 id_ver; |
| 270 | u32 synce_count; | 488 | u32 synce_count; |
| @@ -323,6 +541,7 @@ struct gbe_port_regs_ofs { | |||
| 323 | u16 ts_vlan; | 541 | u16 ts_vlan; |
| 324 | u16 ts_ctl_ltype2; | 542 | u16 ts_ctl_ltype2; |
| 325 | u16 ts_ctl2; | 543 | u16 ts_ctl2; |
| 544 | u16 rx_maxlen; /* 2U, NU */ | ||
| 326 | }; | 545 | }; |
| 327 | 546 | ||
| 328 | struct gbe_host_port_regs { | 547 | struct gbe_host_port_regs { |
| @@ -397,9 +616,7 @@ struct gbe_hw_stats { | |||
| 397 | }; | 616 | }; |
| 398 | 617 | ||
| 399 | #define GBE13_NUM_HW_STAT_ENTRIES (sizeof(struct gbe_hw_stats)/sizeof(u32)) | 618 | #define GBE13_NUM_HW_STAT_ENTRIES (sizeof(struct gbe_hw_stats)/sizeof(u32)) |
| 400 | #define GBE13_NUM_HW_STATS_MOD 2 | 619 | #define GBE_MAX_HW_STAT_MODS 9 |
| 401 | #define XGBE10_NUM_HW_STATS_MOD 3 | ||
| 402 | #define GBE_MAX_HW_STAT_MODS 3 | ||
| 403 | #define GBE_HW_STATS_REG_MAP_SZ 0x100 | 620 | #define GBE_HW_STATS_REG_MAP_SZ 0x100 |
| 404 | 621 | ||
| 405 | struct gbe_slave { | 622 | struct gbe_slave { |
| @@ -427,11 +644,14 @@ struct gbe_priv { | |||
| 427 | u32 ale_entries; | 644 | u32 ale_entries; |
| 428 | u32 ale_ports; | 645 | u32 ale_ports; |
| 429 | bool enable_ale; | 646 | bool enable_ale; |
| 647 | u8 max_num_slaves; | ||
| 648 | u8 max_num_ports; /* max_num_slaves + 1 */ | ||
| 430 | struct netcp_tx_pipe tx_pipe; | 649 | struct netcp_tx_pipe tx_pipe; |
| 431 | 650 | ||
| 432 | int host_port; | 651 | int host_port; |
| 433 | u32 rx_packet_max; | 652 | u32 rx_packet_max; |
| 434 | u32 ss_version; | 653 | u32 ss_version; |
| 654 | u32 stats_en_mask; | ||
| 435 | 655 | ||
| 436 | void __iomem *ss_regs; | 656 | void __iomem *ss_regs; |
| 437 | void __iomem *switch_regs; | 657 | void __iomem *switch_regs; |
| @@ -653,6 +873,488 @@ static const struct netcp_ethtool_stat gbe13_et_stats[] = { | |||
| 653 | GBE_STATSD_INFO(rx_dma_overruns), | 873 | GBE_STATSD_INFO(rx_dma_overruns), |
| 654 | }; | 874 | }; |
| 655 | 875 | ||
| 876 | /* This is the size of entries in GBENU_STATS_HOST */ | ||
| 877 | #define GBENU_ET_STATS_HOST_SIZE 33 | ||
| 878 | |||
| 879 | #define GBENU_STATS_HOST(field) \ | ||
| 880 | { \ | ||
| 881 | "GBE_HOST:"#field, GBENU_STATS0_MODULE, \ | ||
| 882 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 883 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 884 | } | ||
| 885 | |||
| 886 | /* This is the size of entries in GBENU_STATS_HOST */ | ||
| 887 | #define GBENU_ET_STATS_PORT_SIZE 46 | ||
| 888 | |||
| 889 | #define GBENU_STATS_P1(field) \ | ||
| 890 | { \ | ||
| 891 | "GBE_P1:"#field, GBENU_STATS1_MODULE, \ | ||
| 892 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 893 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 894 | } | ||
| 895 | |||
| 896 | #define GBENU_STATS_P2(field) \ | ||
| 897 | { \ | ||
| 898 | "GBE_P2:"#field, GBENU_STATS2_MODULE, \ | ||
| 899 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 900 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 901 | } | ||
| 902 | |||
| 903 | #define GBENU_STATS_P3(field) \ | ||
| 904 | { \ | ||
| 905 | "GBE_P3:"#field, GBENU_STATS3_MODULE, \ | ||
| 906 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 907 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 908 | } | ||
| 909 | |||
| 910 | #define GBENU_STATS_P4(field) \ | ||
| 911 | { \ | ||
| 912 | "GBE_P4:"#field, GBENU_STATS4_MODULE, \ | ||
| 913 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 914 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 915 | } | ||
| 916 | |||
| 917 | #define GBENU_STATS_P5(field) \ | ||
| 918 | { \ | ||
| 919 | "GBE_P5:"#field, GBENU_STATS5_MODULE, \ | ||
| 920 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 921 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 922 | } | ||
| 923 | |||
| 924 | #define GBENU_STATS_P6(field) \ | ||
| 925 | { \ | ||
| 926 | "GBE_P6:"#field, GBENU_STATS6_MODULE, \ | ||
| 927 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 928 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 929 | } | ||
| 930 | |||
| 931 | #define GBENU_STATS_P7(field) \ | ||
| 932 | { \ | ||
| 933 | "GBE_P7:"#field, GBENU_STATS7_MODULE, \ | ||
| 934 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 935 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 936 | } | ||
| 937 | |||
| 938 | #define GBENU_STATS_P8(field) \ | ||
| 939 | { \ | ||
| 940 | "GBE_P8:"#field, GBENU_STATS8_MODULE, \ | ||
| 941 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | ||
| 942 | offsetof(struct gbenu_hw_stats, field) \ | ||
| 943 | } | ||
| 944 | |||
| 945 | static const struct netcp_ethtool_stat gbenu_et_stats[] = { | ||
| 946 | /* GBENU Host Module */ | ||
| 947 | GBENU_STATS_HOST(rx_good_frames), | ||
| 948 | GBENU_STATS_HOST(rx_broadcast_frames), | ||
| 949 | GBENU_STATS_HOST(rx_multicast_frames), | ||
| 950 | GBENU_STATS_HOST(rx_crc_errors), | ||
| 951 | GBENU_STATS_HOST(rx_oversized_frames), | ||
| 952 | GBENU_STATS_HOST(rx_undersized_frames), | ||
| 953 | GBENU_STATS_HOST(ale_drop), | ||
| 954 | GBENU_STATS_HOST(ale_overrun_drop), | ||
| 955 | GBENU_STATS_HOST(rx_bytes), | ||
| 956 | GBENU_STATS_HOST(tx_good_frames), | ||
| 957 | GBENU_STATS_HOST(tx_broadcast_frames), | ||
| 958 | GBENU_STATS_HOST(tx_multicast_frames), | ||
| 959 | GBENU_STATS_HOST(tx_bytes), | ||
| 960 | GBENU_STATS_HOST(tx_64B_frames), | ||
| 961 | GBENU_STATS_HOST(tx_65_to_127B_frames), | ||
| 962 | GBENU_STATS_HOST(tx_128_to_255B_frames), | ||
| 963 | GBENU_STATS_HOST(tx_256_to_511B_frames), | ||
| 964 | GBENU_STATS_HOST(tx_512_to_1023B_frames), | ||
| 965 | GBENU_STATS_HOST(tx_1024B_frames), | ||
| 966 | GBENU_STATS_HOST(net_bytes), | ||
| 967 | GBENU_STATS_HOST(rx_bottom_fifo_drop), | ||
| 968 | GBENU_STATS_HOST(rx_port_mask_drop), | ||
| 969 | GBENU_STATS_HOST(rx_top_fifo_drop), | ||
| 970 | GBENU_STATS_HOST(ale_rate_limit_drop), | ||
| 971 | GBENU_STATS_HOST(ale_vid_ingress_drop), | ||
| 972 | GBENU_STATS_HOST(ale_da_eq_sa_drop), | ||
| 973 | GBENU_STATS_HOST(ale_unknown_ucast), | ||
| 974 | GBENU_STATS_HOST(ale_unknown_ucast_bytes), | ||
| 975 | GBENU_STATS_HOST(ale_unknown_mcast), | ||
| 976 | GBENU_STATS_HOST(ale_unknown_mcast_bytes), | ||
| 977 | GBENU_STATS_HOST(ale_unknown_bcast), | ||
| 978 | GBENU_STATS_HOST(ale_unknown_bcast_bytes), | ||
| 979 | GBENU_STATS_HOST(tx_mem_protect_err), | ||
| 980 | /* GBENU Module 1 */ | ||
| 981 | GBENU_STATS_P1(rx_good_frames), | ||
| 982 | GBENU_STATS_P1(rx_broadcast_frames), | ||
| 983 | GBENU_STATS_P1(rx_multicast_frames), | ||
| 984 | GBENU_STATS_P1(rx_pause_frames), | ||
| 985 | GBENU_STATS_P1(rx_crc_errors), | ||
| 986 | GBENU_STATS_P1(rx_align_code_errors), | ||
| 987 | GBENU_STATS_P1(rx_oversized_frames), | ||
| 988 | GBENU_STATS_P1(rx_jabber_frames), | ||
| 989 | GBENU_STATS_P1(rx_undersized_frames), | ||
| 990 | GBENU_STATS_P1(rx_fragments), | ||
| 991 | GBENU_STATS_P1(ale_drop), | ||
| 992 | GBENU_STATS_P1(ale_overrun_drop), | ||
| 993 | GBENU_STATS_P1(rx_bytes), | ||
| 994 | GBENU_STATS_P1(tx_good_frames), | ||
| 995 | GBENU_STATS_P1(tx_broadcast_frames), | ||
| 996 | GBENU_STATS_P1(tx_multicast_frames), | ||
| 997 | GBENU_STATS_P1(tx_pause_frames), | ||
| 998 | GBENU_STATS_P1(tx_deferred_frames), | ||
| 999 | GBENU_STATS_P1(tx_collision_frames), | ||
| 1000 | GBENU_STATS_P1(tx_single_coll_frames), | ||
| 1001 | GBENU_STATS_P1(tx_mult_coll_frames), | ||
| 1002 | GBENU_STATS_P1(tx_excessive_collisions), | ||
| 1003 | GBENU_STATS_P1(tx_late_collisions), | ||
| 1004 | GBENU_STATS_P1(rx_ipg_error), | ||
| 1005 | GBENU_STATS_P1(tx_carrier_sense_errors), | ||
| 1006 | GBENU_STATS_P1(tx_bytes), | ||
| 1007 | GBENU_STATS_P1(tx_64B_frames), | ||
| 1008 | GBENU_STATS_P1(tx_65_to_127B_frames), | ||
| 1009 | GBENU_STATS_P1(tx_128_to_255B_frames), | ||
| 1010 | GBENU_STATS_P1(tx_256_to_511B_frames), | ||
| 1011 | GBENU_STATS_P1(tx_512_to_1023B_frames), | ||
| 1012 | GBENU_STATS_P1(tx_1024B_frames), | ||
| 1013 | GBENU_STATS_P1(net_bytes), | ||
| 1014 | GBENU_STATS_P1(rx_bottom_fifo_drop), | ||
| 1015 | GBENU_STATS_P1(rx_port_mask_drop), | ||
| 1016 | GBENU_STATS_P1(rx_top_fifo_drop), | ||
| 1017 | GBENU_STATS_P1(ale_rate_limit_drop), | ||
| 1018 | GBENU_STATS_P1(ale_vid_ingress_drop), | ||
| 1019 | GBENU_STATS_P1(ale_da_eq_sa_drop), | ||
| 1020 | GBENU_STATS_P1(ale_unknown_ucast), | ||
| 1021 | GBENU_STATS_P1(ale_unknown_ucast_bytes), | ||
| 1022 | GBENU_STATS_P1(ale_unknown_mcast), | ||
| 1023 | GBENU_STATS_P1(ale_unknown_mcast_bytes), | ||
| 1024 | GBENU_STATS_P1(ale_unknown_bcast), | ||
| 1025 | GBENU_STATS_P1(ale_unknown_bcast_bytes), | ||
| 1026 | GBENU_STATS_P1(tx_mem_protect_err), | ||
| 1027 | /* GBENU Module 2 */ | ||
| 1028 | GBENU_STATS_P2(rx_good_frames), | ||
| 1029 | GBENU_STATS_P2(rx_broadcast_frames), | ||
| 1030 | GBENU_STATS_P2(rx_multicast_frames), | ||
| 1031 | GBENU_STATS_P2(rx_pause_frames), | ||
| 1032 | GBENU_STATS_P2(rx_crc_errors), | ||
| 1033 | GBENU_STATS_P2(rx_align_code_errors), | ||
| 1034 | GBENU_STATS_P2(rx_oversized_frames), | ||
| 1035 | GBENU_STATS_P2(rx_jabber_frames), | ||
| 1036 | GBENU_STATS_P2(rx_undersized_frames), | ||
| 1037 | GBENU_STATS_P2(rx_fragments), | ||
| 1038 | GBENU_STATS_P2(ale_drop), | ||
| 1039 | GBENU_STATS_P2(ale_overrun_drop), | ||
| 1040 | GBENU_STATS_P2(rx_bytes), | ||
| 1041 | GBENU_STATS_P2(tx_good_frames), | ||
| 1042 | GBENU_STATS_P2(tx_broadcast_frames), | ||
| 1043 | GBENU_STATS_P2(tx_multicast_frames), | ||
| 1044 | GBENU_STATS_P2(tx_pause_frames), | ||
| 1045 | GBENU_STATS_P2(tx_deferred_frames), | ||
| 1046 | GBENU_STATS_P2(tx_collision_frames), | ||
| 1047 | GBENU_STATS_P2(tx_single_coll_frames), | ||
| 1048 | GBENU_STATS_P2(tx_mult_coll_frames), | ||
| 1049 | GBENU_STATS_P2(tx_excessive_collisions), | ||
| 1050 | GBENU_STATS_P2(tx_late_collisions), | ||
| 1051 | GBENU_STATS_P2(rx_ipg_error), | ||
| 1052 | GBENU_STATS_P2(tx_carrier_sense_errors), | ||
| 1053 | GBENU_STATS_P2(tx_bytes), | ||
| 1054 | GBENU_STATS_P2(tx_64B_frames), | ||
| 1055 | GBENU_STATS_P2(tx_65_to_127B_frames), | ||
| 1056 | GBENU_STATS_P2(tx_128_to_255B_frames), | ||
| 1057 | GBENU_STATS_P2(tx_256_to_511B_frames), | ||
| 1058 | GBENU_STATS_P2(tx_512_to_1023B_frames), | ||
| 1059 | GBENU_STATS_P2(tx_1024B_frames), | ||
| 1060 | GBENU_STATS_P2(net_bytes), | ||
| 1061 | GBENU_STATS_P2(rx_bottom_fifo_drop), | ||
| 1062 | GBENU_STATS_P2(rx_port_mask_drop), | ||
| 1063 | GBENU_STATS_P2(rx_top_fifo_drop), | ||
| 1064 | GBENU_STATS_P2(ale_rate_limit_drop), | ||
| 1065 | GBENU_STATS_P2(ale_vid_ingress_drop), | ||
| 1066 | GBENU_STATS_P2(ale_da_eq_sa_drop), | ||
| 1067 | GBENU_STATS_P2(ale_unknown_ucast), | ||
| 1068 | GBENU_STATS_P2(ale_unknown_ucast_bytes), | ||
| 1069 | GBENU_STATS_P2(ale_unknown_mcast), | ||
| 1070 | GBENU_STATS_P2(ale_unknown_mcast_bytes), | ||
| 1071 | GBENU_STATS_P2(ale_unknown_bcast), | ||
| 1072 | GBENU_STATS_P2(ale_unknown_bcast_bytes), | ||
| 1073 | GBENU_STATS_P2(tx_mem_protect_err), | ||
| 1074 | /* GBENU Module 3 */ | ||
| 1075 | GBENU_STATS_P3(rx_good_frames), | ||
| 1076 | GBENU_STATS_P3(rx_broadcast_frames), | ||
| 1077 | GBENU_STATS_P3(rx_multicast_frames), | ||
| 1078 | GBENU_STATS_P3(rx_pause_frames), | ||
| 1079 | GBENU_STATS_P3(rx_crc_errors), | ||
| 1080 | GBENU_STATS_P3(rx_align_code_errors), | ||
| 1081 | GBENU_STATS_P3(rx_oversized_frames), | ||
| 1082 | GBENU_STATS_P3(rx_jabber_frames), | ||
| 1083 | GBENU_STATS_P3(rx_undersized_frames), | ||
| 1084 | GBENU_STATS_P3(rx_fragments), | ||
| 1085 | GBENU_STATS_P3(ale_drop), | ||
| 1086 | GBENU_STATS_P3(ale_overrun_drop), | ||
| 1087 | GBENU_STATS_P3(rx_bytes), | ||
| 1088 | GBENU_STATS_P3(tx_good_frames), | ||
| 1089 | GBENU_STATS_P3(tx_broadcast_frames), | ||
| 1090 | GBENU_STATS_P3(tx_multicast_frames), | ||
| 1091 | GBENU_STATS_P3(tx_pause_frames), | ||
| 1092 | GBENU_STATS_P3(tx_deferred_frames), | ||
| 1093 | GBENU_STATS_P3(tx_collision_frames), | ||
| 1094 | GBENU_STATS_P3(tx_single_coll_frames), | ||
| 1095 | GBENU_STATS_P3(tx_mult_coll_frames), | ||
| 1096 | GBENU_STATS_P3(tx_excessive_collisions), | ||
| 1097 | GBENU_STATS_P3(tx_late_collisions), | ||
| 1098 | GBENU_STATS_P3(rx_ipg_error), | ||
| 1099 | GBENU_STATS_P3(tx_carrier_sense_errors), | ||
| 1100 | GBENU_STATS_P3(tx_bytes), | ||
| 1101 | GBENU_STATS_P3(tx_64B_frames), | ||
| 1102 | GBENU_STATS_P3(tx_65_to_127B_frames), | ||
| 1103 | GBENU_STATS_P3(tx_128_to_255B_frames), | ||
| 1104 | GBENU_STATS_P3(tx_256_to_511B_frames), | ||
| 1105 | GBENU_STATS_P3(tx_512_to_1023B_frames), | ||
| 1106 | GBENU_STATS_P3(tx_1024B_frames), | ||
| 1107 | GBENU_STATS_P3(net_bytes), | ||
| 1108 | GBENU_STATS_P3(rx_bottom_fifo_drop), | ||
| 1109 | GBENU_STATS_P3(rx_port_mask_drop), | ||
| 1110 | GBENU_STATS_P3(rx_top_fifo_drop), | ||
| 1111 | GBENU_STATS_P3(ale_rate_limit_drop), | ||
| 1112 | GBENU_STATS_P3(ale_vid_ingress_drop), | ||
| 1113 | GBENU_STATS_P3(ale_da_eq_sa_drop), | ||
| 1114 | GBENU_STATS_P3(ale_unknown_ucast), | ||
| 1115 | GBENU_STATS_P3(ale_unknown_ucast_bytes), | ||
| 1116 | GBENU_STATS_P3(ale_unknown_mcast), | ||
| 1117 | GBENU_STATS_P3(ale_unknown_mcast_bytes), | ||
| 1118 | GBENU_STATS_P3(ale_unknown_bcast), | ||
| 1119 | GBENU_STATS_P3(ale_unknown_bcast_bytes), | ||
| 1120 | GBENU_STATS_P3(tx_mem_protect_err), | ||
| 1121 | /* GBENU Module 4 */ | ||
| 1122 | GBENU_STATS_P4(rx_good_frames), | ||
| 1123 | GBENU_STATS_P4(rx_broadcast_frames), | ||
| 1124 | GBENU_STATS_P4(rx_multicast_frames), | ||
| 1125 | GBENU_STATS_P4(rx_pause_frames), | ||
| 1126 | GBENU_STATS_P4(rx_crc_errors), | ||
| 1127 | GBENU_STATS_P4(rx_align_code_errors), | ||
| 1128 | GBENU_STATS_P4(rx_oversized_frames), | ||
| 1129 | GBENU_STATS_P4(rx_jabber_frames), | ||
| 1130 | GBENU_STATS_P4(rx_undersized_frames), | ||
| 1131 | GBENU_STATS_P4(rx_fragments), | ||
| 1132 | GBENU_STATS_P4(ale_drop), | ||
| 1133 | GBENU_STATS_P4(ale_overrun_drop), | ||
| 1134 | GBENU_STATS_P4(rx_bytes), | ||
| 1135 | GBENU_STATS_P4(tx_good_frames), | ||
| 1136 | GBENU_STATS_P4(tx_broadcast_frames), | ||
| 1137 | GBENU_STATS_P4(tx_multicast_frames), | ||
| 1138 | GBENU_STATS_P4(tx_pause_frames), | ||
| 1139 | GBENU_STATS_P4(tx_deferred_frames), | ||
| 1140 | GBENU_STATS_P4(tx_collision_frames), | ||
| 1141 | GBENU_STATS_P4(tx_single_coll_frames), | ||
| 1142 | GBENU_STATS_P4(tx_mult_coll_frames), | ||
| 1143 | GBENU_STATS_P4(tx_excessive_collisions), | ||
| 1144 | GBENU_STATS_P4(tx_late_collisions), | ||
| 1145 | GBENU_STATS_P4(rx_ipg_error), | ||
| 1146 | GBENU_STATS_P4(tx_carrier_sense_errors), | ||
| 1147 | GBENU_STATS_P4(tx_bytes), | ||
| 1148 | GBENU_STATS_P4(tx_64B_frames), | ||
| 1149 | GBENU_STATS_P4(tx_65_to_127B_frames), | ||
| 1150 | GBENU_STATS_P4(tx_128_to_255B_frames), | ||
| 1151 | GBENU_STATS_P4(tx_256_to_511B_frames), | ||
| 1152 | GBENU_STATS_P4(tx_512_to_1023B_frames), | ||
| 1153 | GBENU_STATS_P4(tx_1024B_frames), | ||
| 1154 | GBENU_STATS_P4(net_bytes), | ||
| 1155 | GBENU_STATS_P4(rx_bottom_fifo_drop), | ||
| 1156 | GBENU_STATS_P4(rx_port_mask_drop), | ||
| 1157 | GBENU_STATS_P4(rx_top_fifo_drop), | ||
| 1158 | GBENU_STATS_P4(ale_rate_limit_drop), | ||
| 1159 | GBENU_STATS_P4(ale_vid_ingress_drop), | ||
| 1160 | GBENU_STATS_P4(ale_da_eq_sa_drop), | ||
| 1161 | GBENU_STATS_P4(ale_unknown_ucast), | ||
| 1162 | GBENU_STATS_P4(ale_unknown_ucast_bytes), | ||
| 1163 | GBENU_STATS_P4(ale_unknown_mcast), | ||
| 1164 | GBENU_STATS_P4(ale_unknown_mcast_bytes), | ||
| 1165 | GBENU_STATS_P4(ale_unknown_bcast), | ||
| 1166 | GBENU_STATS_P4(ale_unknown_bcast_bytes), | ||
| 1167 | GBENU_STATS_P4(tx_mem_protect_err), | ||
| 1168 | /* GBENU Module 5 */ | ||
| 1169 | GBENU_STATS_P5(rx_good_frames), | ||
| 1170 | GBENU_STATS_P5(rx_broadcast_frames), | ||
| 1171 | GBENU_STATS_P5(rx_multicast_frames), | ||
| 1172 | GBENU_STATS_P5(rx_pause_frames), | ||
| 1173 | GBENU_STATS_P5(rx_crc_errors), | ||
| 1174 | GBENU_STATS_P5(rx_align_code_errors), | ||
| 1175 | GBENU_STATS_P5(rx_oversized_frames), | ||
| 1176 | GBENU_STATS_P5(rx_jabber_frames), | ||
| 1177 | GBENU_STATS_P5(rx_undersized_frames), | ||
| 1178 | GBENU_STATS_P5(rx_fragments), | ||
| 1179 | GBENU_STATS_P5(ale_drop), | ||
| 1180 | GBENU_STATS_P5(ale_overrun_drop), | ||
| 1181 | GBENU_STATS_P5(rx_bytes), | ||
| 1182 | GBENU_STATS_P5(tx_good_frames), | ||
| 1183 | GBENU_STATS_P5(tx_broadcast_frames), | ||
| 1184 | GBENU_STATS_P5(tx_multicast_frames), | ||
| 1185 | GBENU_STATS_P5(tx_pause_frames), | ||
| 1186 | GBENU_STATS_P5(tx_deferred_frames), | ||
| 1187 | GBENU_STATS_P5(tx_collision_frames), | ||
| 1188 | GBENU_STATS_P5(tx_single_coll_frames), | ||
| 1189 | GBENU_STATS_P5(tx_mult_coll_frames), | ||
| 1190 | GBENU_STATS_P5(tx_excessive_collisions), | ||
| 1191 | GBENU_STATS_P5(tx_late_collisions), | ||
| 1192 | GBENU_STATS_P5(rx_ipg_error), | ||
| 1193 | GBENU_STATS_P5(tx_carrier_sense_errors), | ||
| 1194 | GBENU_STATS_P5(tx_bytes), | ||
| 1195 | GBENU_STATS_P5(tx_64B_frames), | ||
| 1196 | GBENU_STATS_P5(tx_65_to_127B_frames), | ||
| 1197 | GBENU_STATS_P5(tx_128_to_255B_frames), | ||
| 1198 | GBENU_STATS_P5(tx_256_to_511B_frames), | ||
| 1199 | GBENU_STATS_P5(tx_512_to_1023B_frames), | ||
| 1200 | GBENU_STATS_P5(tx_1024B_frames), | ||
| 1201 | GBENU_STATS_P5(net_bytes), | ||
| 1202 | GBENU_STATS_P5(rx_bottom_fifo_drop), | ||
| 1203 | GBENU_STATS_P5(rx_port_mask_drop), | ||
| 1204 | GBENU_STATS_P5(rx_top_fifo_drop), | ||
| 1205 | GBENU_STATS_P5(ale_rate_limit_drop), | ||
| 1206 | GBENU_STATS_P5(ale_vid_ingress_drop), | ||
| 1207 | GBENU_STATS_P5(ale_da_eq_sa_drop), | ||
| 1208 | GBENU_STATS_P5(ale_unknown_ucast), | ||
| 1209 | GBENU_STATS_P5(ale_unknown_ucast_bytes), | ||
| 1210 | GBENU_STATS_P5(ale_unknown_mcast), | ||
| 1211 | GBENU_STATS_P5(ale_unknown_mcast_bytes), | ||
| 1212 | GBENU_STATS_P5(ale_unknown_bcast), | ||
| 1213 | GBENU_STATS_P5(ale_unknown_bcast_bytes), | ||
| 1214 | GBENU_STATS_P5(tx_mem_protect_err), | ||
| 1215 | /* GBENU Module 6 */ | ||
| 1216 | GBENU_STATS_P6(rx_good_frames), | ||
| 1217 | GBENU_STATS_P6(rx_broadcast_frames), | ||
| 1218 | GBENU_STATS_P6(rx_multicast_frames), | ||
| 1219 | GBENU_STATS_P6(rx_pause_frames), | ||
| 1220 | GBENU_STATS_P6(rx_crc_errors), | ||
| 1221 | GBENU_STATS_P6(rx_align_code_errors), | ||
| 1222 | GBENU_STATS_P6(rx_oversized_frames), | ||
| 1223 | GBENU_STATS_P6(rx_jabber_frames), | ||
| 1224 | GBENU_STATS_P6(rx_undersized_frames), | ||
| 1225 | GBENU_STATS_P6(rx_fragments), | ||
| 1226 | GBENU_STATS_P6(ale_drop), | ||
| 1227 | GBENU_STATS_P6(ale_overrun_drop), | ||
| 1228 | GBENU_STATS_P6(rx_bytes), | ||
| 1229 | GBENU_STATS_P6(tx_good_frames), | ||
| 1230 | GBENU_STATS_P6(tx_broadcast_frames), | ||
| 1231 | GBENU_STATS_P6(tx_multicast_frames), | ||
| 1232 | GBENU_STATS_P6(tx_pause_frames), | ||
| 1233 | GBENU_STATS_P6(tx_deferred_frames), | ||
| 1234 | GBENU_STATS_P6(tx_collision_frames), | ||
| 1235 | GBENU_STATS_P6(tx_single_coll_frames), | ||
| 1236 | GBENU_STATS_P6(tx_mult_coll_frames), | ||
| 1237 | GBENU_STATS_P6(tx_excessive_collisions), | ||
| 1238 | GBENU_STATS_P6(tx_late_collisions), | ||
| 1239 | GBENU_STATS_P6(rx_ipg_error), | ||
| 1240 | GBENU_STATS_P6(tx_carrier_sense_errors), | ||
| 1241 | GBENU_STATS_P6(tx_bytes), | ||
| 1242 | GBENU_STATS_P6(tx_64B_frames), | ||
| 1243 | GBENU_STATS_P6(tx_65_to_127B_frames), | ||
| 1244 | GBENU_STATS_P6(tx_128_to_255B_frames), | ||
| 1245 | GBENU_STATS_P6(tx_256_to_511B_frames), | ||
| 1246 | GBENU_STATS_P6(tx_512_to_1023B_frames), | ||
| 1247 | GBENU_STATS_P6(tx_1024B_frames), | ||
| 1248 | GBENU_STATS_P6(net_bytes), | ||
| 1249 | GBENU_STATS_P6(rx_bottom_fifo_drop), | ||
| 1250 | GBENU_STATS_P6(rx_port_mask_drop), | ||
| 1251 | GBENU_STATS_P6(rx_top_fifo_drop), | ||
| 1252 | GBENU_STATS_P6(ale_rate_limit_drop), | ||
| 1253 | GBENU_STATS_P6(ale_vid_ingress_drop), | ||
| 1254 | GBENU_STATS_P6(ale_da_eq_sa_drop), | ||
| 1255 | GBENU_STATS_P6(ale_unknown_ucast), | ||
| 1256 | GBENU_STATS_P6(ale_unknown_ucast_bytes), | ||
| 1257 | GBENU_STATS_P6(ale_unknown_mcast), | ||
| 1258 | GBENU_STATS_P6(ale_unknown_mcast_bytes), | ||
| 1259 | GBENU_STATS_P6(ale_unknown_bcast), | ||
| 1260 | GBENU_STATS_P6(ale_unknown_bcast_bytes), | ||
| 1261 | GBENU_STATS_P6(tx_mem_protect_err), | ||
| 1262 | /* GBENU Module 7 */ | ||
| 1263 | GBENU_STATS_P7(rx_good_frames), | ||
| 1264 | GBENU_STATS_P7(rx_broadcast_frames), | ||
| 1265 | GBENU_STATS_P7(rx_multicast_frames), | ||
| 1266 | GBENU_STATS_P7(rx_pause_frames), | ||
| 1267 | GBENU_STATS_P7(rx_crc_errors), | ||
| 1268 | GBENU_STATS_P7(rx_align_code_errors), | ||
| 1269 | GBENU_STATS_P7(rx_oversized_frames), | ||
| 1270 | GBENU_STATS_P7(rx_jabber_frames), | ||
| 1271 | GBENU_STATS_P7(rx_undersized_frames), | ||
| 1272 | GBENU_STATS_P7(rx_fragments), | ||
| 1273 | GBENU_STATS_P7(ale_drop), | ||
| 1274 | GBENU_STATS_P7(ale_overrun_drop), | ||
| 1275 | GBENU_STATS_P7(rx_bytes), | ||
| 1276 | GBENU_STATS_P7(tx_good_frames), | ||
| 1277 | GBENU_STATS_P7(tx_broadcast_frames), | ||
| 1278 | GBENU_STATS_P7(tx_multicast_frames), | ||
| 1279 | GBENU_STATS_P7(tx_pause_frames), | ||
| 1280 | GBENU_STATS_P7(tx_deferred_frames), | ||
| 1281 | GBENU_STATS_P7(tx_collision_frames), | ||
| 1282 | GBENU_STATS_P7(tx_single_coll_frames), | ||
| 1283 | GBENU_STATS_P7(tx_mult_coll_frames), | ||
| 1284 | GBENU_STATS_P7(tx_excessive_collisions), | ||
| 1285 | GBENU_STATS_P7(tx_late_collisions), | ||
| 1286 | GBENU_STATS_P7(rx_ipg_error), | ||
| 1287 | GBENU_STATS_P7(tx_carrier_sense_errors), | ||
| 1288 | GBENU_STATS_P7(tx_bytes), | ||
| 1289 | GBENU_STATS_P7(tx_64B_frames), | ||
| 1290 | GBENU_STATS_P7(tx_65_to_127B_frames), | ||
| 1291 | GBENU_STATS_P7(tx_128_to_255B_frames), | ||
| 1292 | GBENU_STATS_P7(tx_256_to_511B_frames), | ||
| 1293 | GBENU_STATS_P7(tx_512_to_1023B_frames), | ||
| 1294 | GBENU_STATS_P7(tx_1024B_frames), | ||
| 1295 | GBENU_STATS_P7(net_bytes), | ||
| 1296 | GBENU_STATS_P7(rx_bottom_fifo_drop), | ||
| 1297 | GBENU_STATS_P7(rx_port_mask_drop), | ||
| 1298 | GBENU_STATS_P7(rx_top_fifo_drop), | ||
| 1299 | GBENU_STATS_P7(ale_rate_limit_drop), | ||
| 1300 | GBENU_STATS_P7(ale_vid_ingress_drop), | ||
| 1301 | GBENU_STATS_P7(ale_da_eq_sa_drop), | ||
| 1302 | GBENU_STATS_P7(ale_unknown_ucast), | ||
| 1303 | GBENU_STATS_P7(ale_unknown_ucast_bytes), | ||
| 1304 | GBENU_STATS_P7(ale_unknown_mcast), | ||
| 1305 | GBENU_STATS_P7(ale_unknown_mcast_bytes), | ||
| 1306 | GBENU_STATS_P7(ale_unknown_bcast), | ||
| 1307 | GBENU_STATS_P7(ale_unknown_bcast_bytes), | ||
| 1308 | GBENU_STATS_P7(tx_mem_protect_err), | ||
| 1309 | /* GBENU Module 8 */ | ||
| 1310 | GBENU_STATS_P8(rx_good_frames), | ||
| 1311 | GBENU_STATS_P8(rx_broadcast_frames), | ||
| 1312 | GBENU_STATS_P8(rx_multicast_frames), | ||
| 1313 | GBENU_STATS_P8(rx_pause_frames), | ||
| 1314 | GBENU_STATS_P8(rx_crc_errors), | ||
| 1315 | GBENU_STATS_P8(rx_align_code_errors), | ||
| 1316 | GBENU_STATS_P8(rx_oversized_frames), | ||
| 1317 | GBENU_STATS_P8(rx_jabber_frames), | ||
| 1318 | GBENU_STATS_P8(rx_undersized_frames), | ||
| 1319 | GBENU_STATS_P8(rx_fragments), | ||
| 1320 | GBENU_STATS_P8(ale_drop), | ||
| 1321 | GBENU_STATS_P8(ale_overrun_drop), | ||
| 1322 | GBENU_STATS_P8(rx_bytes), | ||
| 1323 | GBENU_STATS_P8(tx_good_frames), | ||
| 1324 | GBENU_STATS_P8(tx_broadcast_frames), | ||
| 1325 | GBENU_STATS_P8(tx_multicast_frames), | ||
| 1326 | GBENU_STATS_P8(tx_pause_frames), | ||
| 1327 | GBENU_STATS_P8(tx_deferred_frames), | ||
| 1328 | GBENU_STATS_P8(tx_collision_frames), | ||
| 1329 | GBENU_STATS_P8(tx_single_coll_frames), | ||
| 1330 | GBENU_STATS_P8(tx_mult_coll_frames), | ||
| 1331 | GBENU_STATS_P8(tx_excessive_collisions), | ||
| 1332 | GBENU_STATS_P8(tx_late_collisions), | ||
| 1333 | GBENU_STATS_P8(rx_ipg_error), | ||
| 1334 | GBENU_STATS_P8(tx_carrier_sense_errors), | ||
| 1335 | GBENU_STATS_P8(tx_bytes), | ||
| 1336 | GBENU_STATS_P8(tx_64B_frames), | ||
| 1337 | GBENU_STATS_P8(tx_65_to_127B_frames), | ||
| 1338 | GBENU_STATS_P8(tx_128_to_255B_frames), | ||
| 1339 | GBENU_STATS_P8(tx_256_to_511B_frames), | ||
| 1340 | GBENU_STATS_P8(tx_512_to_1023B_frames), | ||
| 1341 | GBENU_STATS_P8(tx_1024B_frames), | ||
| 1342 | GBENU_STATS_P8(net_bytes), | ||
| 1343 | GBENU_STATS_P8(rx_bottom_fifo_drop), | ||
| 1344 | GBENU_STATS_P8(rx_port_mask_drop), | ||
| 1345 | GBENU_STATS_P8(rx_top_fifo_drop), | ||
| 1346 | GBENU_STATS_P8(ale_rate_limit_drop), | ||
| 1347 | GBENU_STATS_P8(ale_vid_ingress_drop), | ||
| 1348 | GBENU_STATS_P8(ale_da_eq_sa_drop), | ||
| 1349 | GBENU_STATS_P8(ale_unknown_ucast), | ||
| 1350 | GBENU_STATS_P8(ale_unknown_ucast_bytes), | ||
| 1351 | GBENU_STATS_P8(ale_unknown_mcast), | ||
| 1352 | GBENU_STATS_P8(ale_unknown_mcast_bytes), | ||
| 1353 | GBENU_STATS_P8(ale_unknown_bcast), | ||
| 1354 | GBENU_STATS_P8(ale_unknown_bcast_bytes), | ||
| 1355 | GBENU_STATS_P8(tx_mem_protect_err), | ||
| 1356 | }; | ||
| 1357 | |||
| 656 | #define XGBE_STATS0_INFO(field) \ | 1358 | #define XGBE_STATS0_INFO(field) \ |
| 657 | { \ | 1359 | { \ |
| 658 | "GBE_0:"#field, XGBE_STATS0_MODULE, \ | 1360 | "GBE_0:"#field, XGBE_STATS0_MODULE, \ |
| @@ -1094,9 +1796,16 @@ static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev, | |||
| 1094 | if (!slave->open) | 1796 | if (!slave->open) |
| 1095 | return; | 1797 | return; |
| 1096 | 1798 | ||
| 1097 | if (!SLAVE_LINK_IS_XGMII(slave)) | 1799 | if (!SLAVE_LINK_IS_XGMII(slave)) { |
| 1098 | sgmii_link_state = netcp_sgmii_get_port_link(SGMII_BASE(sp), | 1800 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) |
| 1099 | sp); | 1801 | sgmii_link_state = |
| 1802 | netcp_sgmii_get_port_link(SGMII_BASE(sp), sp); | ||
| 1803 | else | ||
| 1804 | sgmii_link_state = | ||
| 1805 | netcp_sgmii_get_port_link( | ||
| 1806 | gbe_dev->sgmii_port_regs, sp); | ||
| 1807 | } | ||
| 1808 | |||
| 1100 | phy_link_state = gbe_phy_link_status(slave); | 1809 | phy_link_state = gbe_phy_link_status(slave); |
| 1101 | link_state = phy_link_state & sgmii_link_state; | 1810 | link_state = phy_link_state & sgmii_link_state; |
| 1102 | 1811 | ||
| @@ -1165,6 +1874,7 @@ static int gbe_port_reset(struct gbe_slave *slave) | |||
| 1165 | static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave, | 1874 | static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave, |
| 1166 | int max_rx_len) | 1875 | int max_rx_len) |
| 1167 | { | 1876 | { |
| 1877 | void __iomem *rx_maxlen_reg; | ||
| 1168 | u32 xgmii_mode; | 1878 | u32 xgmii_mode; |
| 1169 | 1879 | ||
| 1170 | if (max_rx_len > NETCP_MAX_FRAME_SIZE) | 1880 | if (max_rx_len > NETCP_MAX_FRAME_SIZE) |
| @@ -1178,7 +1888,12 @@ static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave, | |||
| 1178 | writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control)); | 1888 | writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control)); |
| 1179 | } | 1889 | } |
| 1180 | 1890 | ||
| 1181 | writel(max_rx_len, GBE_REG_ADDR(slave, emac_regs, rx_maxlen)); | 1891 | if (IS_SS_ID_MU(gbe_dev)) |
| 1892 | rx_maxlen_reg = GBE_REG_ADDR(slave, port_regs, rx_maxlen); | ||
| 1893 | else | ||
| 1894 | rx_maxlen_reg = GBE_REG_ADDR(slave, emac_regs, rx_maxlen); | ||
| 1895 | |||
| 1896 | writel(max_rx_len, rx_maxlen_reg); | ||
| 1182 | writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control)); | 1897 | writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control)); |
| 1183 | } | 1898 | } |
| 1184 | 1899 | ||
| @@ -1270,6 +1985,12 @@ static int gbe_slave_open(struct gbe_intf *gbe_intf) | |||
| 1270 | static void gbe_init_host_port(struct gbe_priv *priv) | 1985 | static void gbe_init_host_port(struct gbe_priv *priv) |
| 1271 | { | 1986 | { |
| 1272 | int bypass_en = 1; | 1987 | int bypass_en = 1; |
| 1988 | |||
| 1989 | /* Host Tx Pri */ | ||
| 1990 | if (IS_SS_ID_NU(priv)) | ||
| 1991 | writel(HOST_TX_PRI_MAP_DEFAULT, | ||
| 1992 | GBE_REG_ADDR(priv, host_port_regs, tx_pri_map)); | ||
| 1993 | |||
| 1273 | /* Max length register */ | 1994 | /* Max length register */ |
| 1274 | writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs, | 1995 | writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs, |
| 1275 | rx_maxlen)); | 1996 | rx_maxlen)); |
| @@ -1500,8 +2221,8 @@ static int gbe_open(void *intf_priv, struct net_device *ndev) | |||
| 1500 | GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg), | 2221 | GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg), |
| 1501 | GBE_RTL_VERSION(reg), GBE_IDENT(reg)); | 2222 | GBE_RTL_VERSION(reg), GBE_IDENT(reg)); |
| 1502 | 2223 | ||
| 1503 | /* For 10G use directed to port */ | 2224 | /* For 10G and on NetCP 1.5, use directed to port */ |
| 1504 | if (gbe_dev->ss_version == XGBE_SS_VERSION_10) | 2225 | if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) || IS_SS_ID_MU(gbe_dev)) |
| 1505 | gbe_intf->tx_pipe.flags = SWITCH_TO_PORT_IN_TAGINFO; | 2226 | gbe_intf->tx_pipe.flags = SWITCH_TO_PORT_IN_TAGINFO; |
| 1506 | 2227 | ||
| 1507 | if (gbe_dev->enable_ale) | 2228 | if (gbe_dev->enable_ale) |
| @@ -1525,8 +2246,8 @@ static int gbe_open(void *intf_priv, struct net_device *ndev) | |||
| 1525 | writel(GBE_CTL_P0_ENABLE, GBE_REG_ADDR(gbe_dev, switch_regs, control)); | 2246 | writel(GBE_CTL_P0_ENABLE, GBE_REG_ADDR(gbe_dev, switch_regs, control)); |
| 1526 | 2247 | ||
| 1527 | /* All statistics enabled and STAT AB visible by default */ | 2248 | /* All statistics enabled and STAT AB visible by default */ |
| 1528 | writel(GBE_REG_VAL_STAT_ENABLE_ALL, GBE_REG_ADDR(gbe_dev, switch_regs, | 2249 | writel(gbe_dev->stats_en_mask, GBE_REG_ADDR(gbe_dev, switch_regs, |
| 1529 | stat_port_en)); | 2250 | stat_port_en)); |
| 1530 | 2251 | ||
| 1531 | ret = gbe_slave_open(gbe_intf); | 2252 | ret = gbe_slave_open(gbe_intf); |
| 1532 | if (ret) | 2253 | if (ret) |
| @@ -1563,6 +2284,7 @@ static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave, | |||
| 1563 | { | 2284 | { |
| 1564 | int port_reg_num; | 2285 | int port_reg_num; |
| 1565 | u32 port_reg_ofs, emac_reg_ofs; | 2286 | u32 port_reg_ofs, emac_reg_ofs; |
| 2287 | u32 port_reg_blk_sz, emac_reg_blk_sz; | ||
| 1566 | 2288 | ||
| 1567 | if (of_property_read_u32(node, "slave-port", &slave->slave_num)) { | 2289 | if (of_property_read_u32(node, "slave-port", &slave->slave_num)) { |
| 1568 | dev_err(gbe_dev->dev, "missing slave-port parameter\n"); | 2290 | dev_err(gbe_dev->dev, "missing slave-port parameter\n"); |
| @@ -1594,23 +2316,29 @@ static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave, | |||
| 1594 | } else { | 2316 | } else { |
| 1595 | port_reg_ofs = GBE13_SLAVE_PORT_OFFSET; | 2317 | port_reg_ofs = GBE13_SLAVE_PORT_OFFSET; |
| 1596 | } | 2318 | } |
| 2319 | emac_reg_ofs = GBE13_EMAC_OFFSET; | ||
| 2320 | port_reg_blk_sz = 0x30; | ||
| 2321 | emac_reg_blk_sz = 0x40; | ||
| 2322 | } else if (IS_SS_ID_MU(gbe_dev)) { | ||
| 2323 | port_reg_ofs = GBENU_SLAVE_PORT_OFFSET; | ||
| 2324 | emac_reg_ofs = GBENU_EMAC_OFFSET; | ||
| 2325 | port_reg_blk_sz = 0x1000; | ||
| 2326 | emac_reg_blk_sz = 0x1000; | ||
| 1597 | } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) { | 2327 | } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) { |
| 1598 | port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET; | 2328 | port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET; |
| 2329 | emac_reg_ofs = XGBE10_EMAC_OFFSET; | ||
| 2330 | port_reg_blk_sz = 0x30; | ||
| 2331 | emac_reg_blk_sz = 0x40; | ||
| 1599 | } else { | 2332 | } else { |
| 1600 | dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n", | 2333 | dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n", |
| 1601 | gbe_dev->ss_version); | 2334 | gbe_dev->ss_version); |
| 1602 | return -EINVAL; | 2335 | return -EINVAL; |
| 1603 | } | 2336 | } |
| 1604 | 2337 | ||
| 1605 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) | ||
| 1606 | emac_reg_ofs = GBE13_EMAC_OFFSET; | ||
| 1607 | else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) | ||
| 1608 | emac_reg_ofs = XGBE10_EMAC_OFFSET; | ||
| 1609 | |||
| 1610 | slave->port_regs = gbe_dev->switch_regs + port_reg_ofs + | 2338 | slave->port_regs = gbe_dev->switch_regs + port_reg_ofs + |
| 1611 | (0x30 * port_reg_num); | 2339 | (port_reg_blk_sz * port_reg_num); |
| 1612 | slave->emac_regs = gbe_dev->switch_regs + emac_reg_ofs + | 2340 | slave->emac_regs = gbe_dev->switch_regs + emac_reg_ofs + |
| 1613 | (0x40 * slave->slave_num); | 2341 | (emac_reg_blk_sz * slave->slave_num); |
| 1614 | 2342 | ||
| 1615 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) { | 2343 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) { |
| 1616 | /* Initialize slave port register offsets */ | 2344 | /* Initialize slave port register offsets */ |
| @@ -1629,6 +2357,23 @@ static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave, | |||
| 1629 | GBE_SET_REG_OFS(slave, emac_regs, soft_reset); | 2357 | GBE_SET_REG_OFS(slave, emac_regs, soft_reset); |
| 1630 | GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen); | 2358 | GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen); |
| 1631 | 2359 | ||
| 2360 | } else if (IS_SS_ID_MU(gbe_dev)) { | ||
| 2361 | /* Initialize slave port register offsets */ | ||
| 2362 | GBENU_SET_REG_OFS(slave, port_regs, port_vlan); | ||
| 2363 | GBENU_SET_REG_OFS(slave, port_regs, tx_pri_map); | ||
| 2364 | GBENU_SET_REG_OFS(slave, port_regs, sa_lo); | ||
| 2365 | GBENU_SET_REG_OFS(slave, port_regs, sa_hi); | ||
| 2366 | GBENU_SET_REG_OFS(slave, port_regs, ts_ctl); | ||
| 2367 | GBENU_SET_REG_OFS(slave, port_regs, ts_seq_ltype); | ||
| 2368 | GBENU_SET_REG_OFS(slave, port_regs, ts_vlan); | ||
| 2369 | GBENU_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2); | ||
| 2370 | GBENU_SET_REG_OFS(slave, port_regs, ts_ctl2); | ||
| 2371 | GBENU_SET_REG_OFS(slave, port_regs, rx_maxlen); | ||
| 2372 | |||
| 2373 | /* Initialize EMAC register offsets */ | ||
| 2374 | GBENU_SET_REG_OFS(slave, emac_regs, mac_control); | ||
| 2375 | GBENU_SET_REG_OFS(slave, emac_regs, soft_reset); | ||
| 2376 | |||
| 1632 | } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) { | 2377 | } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) { |
| 1633 | /* Initialize slave port register offsets */ | 2378 | /* Initialize slave port register offsets */ |
| 1634 | XGBE_SET_REG_OFS(slave, port_regs, port_vlan); | 2379 | XGBE_SET_REG_OFS(slave, port_regs, port_vlan); |
| @@ -1688,6 +2433,8 @@ static void init_secondary_ports(struct gbe_priv *gbe_dev, | |||
| 1688 | mac_phy_link = true; | 2433 | mac_phy_link = true; |
| 1689 | 2434 | ||
| 1690 | slave->open = true; | 2435 | slave->open = true; |
| 2436 | if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) | ||
| 2437 | break; | ||
| 1691 | } | 2438 | } |
| 1692 | 2439 | ||
| 1693 | /* of_phy_connect() is needed only for MAC-PHY interface */ | 2440 | /* of_phy_connect() is needed only for MAC-PHY interface */ |
| @@ -1758,7 +2505,7 @@ static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev, | |||
| 1758 | void __iomem *regs; | 2505 | void __iomem *regs; |
| 1759 | int ret, i; | 2506 | int ret, i; |
| 1760 | 2507 | ||
| 1761 | ret = of_address_to_resource(node, 0, &res); | 2508 | ret = of_address_to_resource(node, XGBE_SS_REG_INDEX, &res); |
| 1762 | if (ret) { | 2509 | if (ret) { |
| 1763 | dev_err(gbe_dev->dev, | 2510 | dev_err(gbe_dev->dev, |
| 1764 | "Can't xlate xgbe of node(%s) ss address at %d\n", | 2511 | "Can't xlate xgbe of node(%s) ss address at %d\n", |
| @@ -1804,9 +2551,9 @@ static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev, | |||
| 1804 | gbe_dev->xgbe_serdes_regs = regs; | 2551 | gbe_dev->xgbe_serdes_regs = regs; |
| 1805 | 2552 | ||
| 1806 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, | 2553 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, |
| 1807 | XGBE10_NUM_STAT_ENTRIES * | 2554 | XGBE10_NUM_STAT_ENTRIES * |
| 1808 | (XGBE10_NUM_SLAVES + 1) * sizeof(u64), | 2555 | (gbe_dev->max_num_ports) * sizeof(u64), |
| 1809 | GFP_KERNEL); | 2556 | GFP_KERNEL); |
| 1810 | if (!gbe_dev->hw_stats) { | 2557 | if (!gbe_dev->hw_stats) { |
| 1811 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); | 2558 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); |
| 1812 | return -ENOMEM; | 2559 | return -ENOMEM; |
| @@ -1817,16 +2564,17 @@ static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev, | |||
| 1817 | XGBE10_SGMII_MODULE_OFFSET; | 2564 | XGBE10_SGMII_MODULE_OFFSET; |
| 1818 | gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET; | 2565 | gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET; |
| 1819 | 2566 | ||
| 1820 | for (i = 0; i < XGBE10_NUM_HW_STATS_MOD; i++) | 2567 | for (i = 0; i < gbe_dev->max_num_ports; i++) |
| 1821 | gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs + | 2568 | gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs + |
| 1822 | XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i); | 2569 | XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i); |
| 1823 | 2570 | ||
| 1824 | gbe_dev->ale_reg = gbe_dev->ss_regs + XGBE10_ALE_OFFSET; | 2571 | gbe_dev->ale_reg = gbe_dev->switch_regs + XGBE10_ALE_OFFSET; |
| 1825 | gbe_dev->ale_ports = XGBE10_NUM_ALE_PORTS; | 2572 | gbe_dev->ale_ports = gbe_dev->max_num_ports; |
| 1826 | gbe_dev->host_port = XGBE10_HOST_PORT_NUM; | 2573 | gbe_dev->host_port = XGBE10_HOST_PORT_NUM; |
| 1827 | gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES; | 2574 | gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES; |
| 1828 | gbe_dev->et_stats = xgbe10_et_stats; | 2575 | gbe_dev->et_stats = xgbe10_et_stats; |
| 1829 | gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats); | 2576 | gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats); |
| 2577 | gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1; | ||
| 1830 | 2578 | ||
| 1831 | /* Subsystem registers */ | 2579 | /* Subsystem registers */ |
| 1832 | XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver); | 2580 | XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver); |
| @@ -1912,7 +2660,7 @@ static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev, | |||
| 1912 | 2660 | ||
| 1913 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, | 2661 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, |
| 1914 | GBE13_NUM_HW_STAT_ENTRIES * | 2662 | GBE13_NUM_HW_STAT_ENTRIES * |
| 1915 | GBE13_NUM_SLAVES * sizeof(u64), | 2663 | gbe_dev->max_num_slaves * sizeof(u64), |
| 1916 | GFP_KERNEL); | 2664 | GFP_KERNEL); |
| 1917 | if (!gbe_dev->hw_stats) { | 2665 | if (!gbe_dev->hw_stats) { |
| 1918 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); | 2666 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); |
| @@ -1922,18 +2670,19 @@ static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev, | |||
| 1922 | gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBE13_SGMII_MODULE_OFFSET; | 2670 | gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBE13_SGMII_MODULE_OFFSET; |
| 1923 | gbe_dev->host_port_regs = gbe_dev->switch_regs + GBE13_HOST_PORT_OFFSET; | 2671 | gbe_dev->host_port_regs = gbe_dev->switch_regs + GBE13_HOST_PORT_OFFSET; |
| 1924 | 2672 | ||
| 1925 | for (i = 0; i < GBE13_NUM_HW_STATS_MOD; i++) { | 2673 | for (i = 0; i < gbe_dev->max_num_slaves; i++) { |
| 1926 | gbe_dev->hw_stats_regs[i] = | 2674 | gbe_dev->hw_stats_regs[i] = |
| 1927 | gbe_dev->switch_regs + GBE13_HW_STATS_OFFSET + | 2675 | gbe_dev->switch_regs + GBE13_HW_STATS_OFFSET + |
| 1928 | (GBE_HW_STATS_REG_MAP_SZ * i); | 2676 | (GBE_HW_STATS_REG_MAP_SZ * i); |
| 1929 | } | 2677 | } |
| 1930 | 2678 | ||
| 1931 | gbe_dev->ale_reg = gbe_dev->switch_regs + GBE13_ALE_OFFSET; | 2679 | gbe_dev->ale_reg = gbe_dev->switch_regs + GBE13_ALE_OFFSET; |
| 1932 | gbe_dev->ale_ports = GBE13_NUM_ALE_PORTS; | 2680 | gbe_dev->ale_ports = gbe_dev->max_num_ports; |
| 1933 | gbe_dev->host_port = GBE13_HOST_PORT_NUM; | 2681 | gbe_dev->host_port = GBE13_HOST_PORT_NUM; |
| 1934 | gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES; | 2682 | gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES; |
| 1935 | gbe_dev->et_stats = gbe13_et_stats; | 2683 | gbe_dev->et_stats = gbe13_et_stats; |
| 1936 | gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats); | 2684 | gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats); |
| 2685 | gbe_dev->stats_en_mask = GBE13_REG_VAL_STAT_ENABLE_ALL; | ||
| 1937 | 2686 | ||
| 1938 | /* Subsystem registers */ | 2687 | /* Subsystem registers */ |
| 1939 | GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver); | 2688 | GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver); |
| @@ -1952,6 +2701,80 @@ static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev, | |||
| 1952 | return 0; | 2701 | return 0; |
| 1953 | } | 2702 | } |
| 1954 | 2703 | ||
| 2704 | static int set_gbenu_ethss_priv(struct gbe_priv *gbe_dev, | ||
| 2705 | struct device_node *node) | ||
| 2706 | { | ||
| 2707 | struct resource res; | ||
| 2708 | void __iomem *regs; | ||
| 2709 | int i, ret; | ||
| 2710 | |||
| 2711 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, | ||
| 2712 | GBENU_NUM_HW_STAT_ENTRIES * | ||
| 2713 | (gbe_dev->max_num_ports) * sizeof(u64), | ||
| 2714 | GFP_KERNEL); | ||
| 2715 | if (!gbe_dev->hw_stats) { | ||
| 2716 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); | ||
| 2717 | return -ENOMEM; | ||
| 2718 | } | ||
| 2719 | |||
| 2720 | ret = of_address_to_resource(node, GBENU_SM_REG_INDEX, &res); | ||
| 2721 | if (ret) { | ||
| 2722 | dev_err(gbe_dev->dev, | ||
| 2723 | "Can't translate of gbenu node(%s) addr at index %d\n", | ||
| 2724 | node->name, GBENU_SM_REG_INDEX); | ||
| 2725 | return ret; | ||
| 2726 | } | ||
| 2727 | |||
| 2728 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | ||
| 2729 | if (IS_ERR(regs)) { | ||
| 2730 | dev_err(gbe_dev->dev, | ||
| 2731 | "Failed to map gbenu switch module register base\n"); | ||
| 2732 | return PTR_ERR(regs); | ||
| 2733 | } | ||
| 2734 | gbe_dev->switch_regs = regs; | ||
| 2735 | |||
| 2736 | gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET; | ||
| 2737 | gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET; | ||
| 2738 | |||
| 2739 | for (i = 0; i < (gbe_dev->max_num_ports); i++) | ||
| 2740 | gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs + | ||
| 2741 | GBENU_HW_STATS_OFFSET + (GBENU_HW_STATS_REG_MAP_SZ * i); | ||
| 2742 | |||
| 2743 | gbe_dev->ale_reg = gbe_dev->switch_regs + GBENU_ALE_OFFSET; | ||
| 2744 | gbe_dev->ale_ports = gbe_dev->max_num_ports; | ||
| 2745 | gbe_dev->host_port = GBENU_HOST_PORT_NUM; | ||
| 2746 | gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES; | ||
| 2747 | gbe_dev->et_stats = gbenu_et_stats; | ||
| 2748 | gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1; | ||
| 2749 | |||
| 2750 | if (IS_SS_ID_NU(gbe_dev)) | ||
| 2751 | gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE + | ||
| 2752 | (gbe_dev->max_num_slaves * GBENU_ET_STATS_PORT_SIZE); | ||
| 2753 | else | ||
| 2754 | gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE + | ||
| 2755 | GBENU_ET_STATS_PORT_SIZE; | ||
| 2756 | |||
| 2757 | /* Subsystem registers */ | ||
| 2758 | GBENU_SET_REG_OFS(gbe_dev, ss_regs, id_ver); | ||
| 2759 | |||
| 2760 | /* Switch module registers */ | ||
| 2761 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, id_ver); | ||
| 2762 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, control); | ||
| 2763 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en); | ||
| 2764 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, ptype); | ||
| 2765 | |||
| 2766 | /* Host port registers */ | ||
| 2767 | GBENU_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan); | ||
| 2768 | GBENU_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen); | ||
| 2769 | |||
| 2770 | /* For NU only. 2U does not need tx_pri_map. | ||
| 2771 | * NU cppi port 0 tx pkt streaming interface has (n-1)*8 egress threads | ||
| 2772 | * while 2U has only 1 such thread | ||
| 2773 | */ | ||
| 2774 | GBENU_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map); | ||
| 2775 | return 0; | ||
| 2776 | } | ||
| 2777 | |||
| 1955 | static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, | 2778 | static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, |
| 1956 | struct device_node *node, void **inst_priv) | 2779 | struct device_node *node, void **inst_priv) |
| 1957 | { | 2780 | { |
| @@ -1971,6 +2794,21 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, | |||
| 1971 | if (!gbe_dev) | 2794 | if (!gbe_dev) |
| 1972 | return -ENOMEM; | 2795 | return -ENOMEM; |
| 1973 | 2796 | ||
| 2797 | if (of_device_is_compatible(node, "ti,netcp-gbe-5") || | ||
| 2798 | of_device_is_compatible(node, "ti,netcp-gbe")) { | ||
| 2799 | gbe_dev->max_num_slaves = 4; | ||
| 2800 | } else if (of_device_is_compatible(node, "ti,netcp-gbe-9")) { | ||
| 2801 | gbe_dev->max_num_slaves = 8; | ||
| 2802 | } else if (of_device_is_compatible(node, "ti,netcp-gbe-2")) { | ||
| 2803 | gbe_dev->max_num_slaves = 1; | ||
| 2804 | } else if (of_device_is_compatible(node, "ti,netcp-xgbe")) { | ||
| 2805 | gbe_dev->max_num_slaves = 2; | ||
| 2806 | } else { | ||
| 2807 | dev_err(dev, "device tree node for unknown device\n"); | ||
| 2808 | return -EINVAL; | ||
| 2809 | } | ||
| 2810 | gbe_dev->max_num_ports = gbe_dev->max_num_slaves + 1; | ||
| 2811 | |||
| 1974 | gbe_dev->dev = dev; | 2812 | gbe_dev->dev = dev; |
| 1975 | gbe_dev->netcp_device = netcp_device; | 2813 | gbe_dev->netcp_device = netcp_device; |
| 1976 | gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE; | 2814 | gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE; |
| @@ -2006,7 +2844,15 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, | |||
| 2006 | if (ret) | 2844 | if (ret) |
| 2007 | goto quit; | 2845 | goto quit; |
| 2008 | 2846 | ||
| 2009 | ret = set_gbe_ethss14_priv(gbe_dev, node); | 2847 | dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version); |
| 2848 | |||
| 2849 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) | ||
| 2850 | ret = set_gbe_ethss14_priv(gbe_dev, node); | ||
| 2851 | else if (IS_SS_ID_MU(gbe_dev)) | ||
| 2852 | ret = set_gbenu_ethss_priv(gbe_dev, node); | ||
| 2853 | else | ||
| 2854 | ret = -ENODEV; | ||
| 2855 | |||
| 2010 | if (ret) | 2856 | if (ret) |
| 2011 | goto quit; | 2857 | goto quit; |
| 2012 | } else if (!strcmp(node->name, "xgbe")) { | 2858 | } else if (!strcmp(node->name, "xgbe")) { |
| @@ -2046,6 +2892,8 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, | |||
| 2046 | continue; | 2892 | continue; |
| 2047 | } | 2893 | } |
| 2048 | gbe_dev->num_slaves++; | 2894 | gbe_dev->num_slaves++; |
| 2895 | if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) | ||
| 2896 | break; | ||
| 2049 | } | 2897 | } |
| 2050 | 2898 | ||
| 2051 | if (!gbe_dev->num_slaves) | 2899 | if (!gbe_dev->num_slaves) |
| @@ -2054,7 +2902,7 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, | |||
| 2054 | /* Initialize Secondary slave ports */ | 2902 | /* Initialize Secondary slave ports */ |
| 2055 | secondary_ports = of_get_child_by_name(node, "secondary-slave-ports"); | 2903 | secondary_ports = of_get_child_by_name(node, "secondary-slave-ports"); |
| 2056 | INIT_LIST_HEAD(&gbe_dev->secondary_slaves); | 2904 | INIT_LIST_HEAD(&gbe_dev->secondary_slaves); |
| 2057 | if (secondary_ports) | 2905 | if (secondary_ports && (gbe_dev->num_slaves < gbe_dev->max_num_slaves)) |
| 2058 | init_secondary_ports(gbe_dev, secondary_ports); | 2906 | init_secondary_ports(gbe_dev, secondary_ports); |
| 2059 | of_node_put(secondary_ports); | 2907 | of_node_put(secondary_ports); |
| 2060 | 2908 | ||