diff options
-rw-r--r-- | arch/arm/mach-at91/Kconfig | 8 | ||||
-rw-r--r-- | arch/arm/mach-at91/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9261.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9263.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9_alt_reset.S | 40 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9g45.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9g45_reset.S | 45 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9rl.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-at91/generic.h | 2 |
10 files changed, 0 insertions, 102 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 6aa7ab47205e..6eb3c658761d 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -33,14 +33,6 @@ config OLD_IRQ_AT91 | |||
33 | select MULTI_IRQ_HANDLER | 33 | select MULTI_IRQ_HANDLER |
34 | select SPARSE_IRQ | 34 | select SPARSE_IRQ |
35 | 35 | ||
36 | config AT91_SAM9_ALT_RESET | ||
37 | bool | ||
38 | default !ARCH_AT91X40 | ||
39 | |||
40 | config AT91_SAM9G45_RESET | ||
41 | bool | ||
42 | default !ARCH_AT91X40 | ||
43 | |||
44 | config AT91_SAM9_TIME | 36 | config AT91_SAM9_TIME |
45 | bool | 37 | bool |
46 | 38 | ||
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index d972fd67de83..306c82b3d45c 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
@@ -9,8 +9,6 @@ obj- := | |||
9 | 9 | ||
10 | obj-$(CONFIG_OLD_IRQ_AT91) += irq.o | 10 | obj-$(CONFIG_OLD_IRQ_AT91) += irq.o |
11 | obj-$(CONFIG_OLD_CLK_AT91) += clock.o | 11 | obj-$(CONFIG_OLD_CLK_AT91) += clock.o |
12 | obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o | ||
13 | obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o | ||
14 | obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o | 12 | obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o |
15 | obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o | 13 | obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o |
16 | 14 | ||
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index fd6b45a85966..00e4e5bb452f 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -355,7 +355,6 @@ static void __init at91sam9260_ioremap_registers(void) | |||
355 | static void __init at91sam9260_initialize(void) | 355 | static void __init at91sam9260_initialize(void) |
356 | { | 356 | { |
357 | arm_pm_idle = at91sam9_idle; | 357 | arm_pm_idle = at91sam9_idle; |
358 | arm_pm_restart = at91sam9_alt_restart; | ||
359 | 358 | ||
360 | at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); | 359 | at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); |
361 | 360 | ||
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 09c031676229..43db1bdf885d 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -314,7 +314,6 @@ static void __init at91sam9261_ioremap_registers(void) | |||
314 | static void __init at91sam9261_initialize(void) | 314 | static void __init at91sam9261_initialize(void) |
315 | { | 315 | { |
316 | arm_pm_idle = at91sam9_idle; | 316 | arm_pm_idle = at91sam9_idle; |
317 | arm_pm_restart = at91sam9_alt_restart; | ||
318 | 317 | ||
319 | at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); | 318 | at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); |
320 | 319 | ||
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index e34ce7af5d0a..358e762f0c07 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -336,7 +336,6 @@ static void __init at91sam9263_ioremap_registers(void) | |||
336 | static void __init at91sam9263_initialize(void) | 336 | static void __init at91sam9263_initialize(void) |
337 | { | 337 | { |
338 | arm_pm_idle = at91sam9_idle; | 338 | arm_pm_idle = at91sam9_idle; |
339 | arm_pm_restart = at91sam9_alt_restart; | ||
340 | 339 | ||
341 | at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); | 340 | at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); |
342 | at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); | 341 | at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); |
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S deleted file mode 100644 index f039538d3bdb..000000000000 --- a/arch/arm/mach-at91/at91sam9_alt_reset.S +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* | ||
2 | * reset AT91SAM9G20 as per errata | ||
3 | * | ||
4 | * (C) BitBox Ltd 2010 | ||
5 | * | ||
6 | * unless the SDRAM is cleanly shutdown before we hit the | ||
7 | * reset register it can be left driving the data bus and | ||
8 | * killing the chance of a subsequent boot from NAND | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/linkage.h> | ||
17 | #include <mach/hardware.h> | ||
18 | #include <mach/at91_ramc.h> | ||
19 | #include "at91_rstc.h" | ||
20 | |||
21 | .arm | ||
22 | |||
23 | .globl at91sam9_alt_restart | ||
24 | |||
25 | at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants | ||
26 | ldr r0, [r0] | ||
27 | ldr r4, =at91_rstc_base | ||
28 | ldr r1, [r4] | ||
29 | |||
30 | mov r2, #1 | ||
31 | mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN | ||
32 | ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST | ||
33 | |||
34 | .balign 32 @ align to cache line | ||
35 | |||
36 | str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access | ||
37 | str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM | ||
38 | str r4, [r1, #AT91_RSTC_CR] @ reset processor | ||
39 | |||
40 | b . | ||
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index cc79f201abbc..9b55b7dc12c2 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -385,7 +385,6 @@ static void __init at91sam9g45_ioremap_registers(void) | |||
385 | static void __init at91sam9g45_initialize(void) | 385 | static void __init at91sam9g45_initialize(void) |
386 | { | 386 | { |
387 | arm_pm_idle = at91sam9_idle; | 387 | arm_pm_idle = at91sam9_idle; |
388 | arm_pm_restart = at91sam9g45_restart; | ||
389 | 388 | ||
390 | at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); | 389 | at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); |
391 | at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); | 390 | at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); |
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S deleted file mode 100644 index c40c1e2ef80f..000000000000 --- a/arch/arm/mach-at91/at91sam9g45_reset.S +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* | ||
2 | * reset AT91SAM9G45 as per errata | ||
3 | * | ||
4 | * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com> | ||
5 | * | ||
6 | * unless the SDRAM is cleanly shutdown before we hit the | ||
7 | * reset register it can be left driving the data bus and | ||
8 | * killing the chance of a subsequent boot from NAND | ||
9 | * | ||
10 | * GPLv2 Only | ||
11 | */ | ||
12 | |||
13 | #include <linux/linkage.h> | ||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/at91_ramc.h> | ||
16 | #include "at91_rstc.h" | ||
17 | .arm | ||
18 | |||
19 | /* | ||
20 | * at91_ramc_base is an array void* | ||
21 | * init at NULL if only one DDR controler is present in or DT | ||
22 | */ | ||
23 | .globl at91sam9g45_restart | ||
24 | |||
25 | at91sam9g45_restart: | ||
26 | ldr r5, =at91_ramc_base @ preload constants | ||
27 | ldr r0, [r5] | ||
28 | ldr r5, [r5, #4] @ ddr1 | ||
29 | cmp r5, #0 | ||
30 | ldr r4, =at91_rstc_base | ||
31 | ldr r1, [r4] | ||
32 | |||
33 | mov r2, #1 | ||
34 | mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN | ||
35 | ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST | ||
36 | |||
37 | .balign 32 @ align to cache line | ||
38 | |||
39 | strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access | ||
40 | strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1 | ||
41 | str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access | ||
42 | str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0 | ||
43 | str r4, [r1, #AT91_RSTC_CR] @ reset processor | ||
44 | |||
45 | b . | ||
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index b03053e9b440..d43d28ee8eaf 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -324,7 +324,6 @@ static void __init at91sam9rl_ioremap_registers(void) | |||
324 | static void __init at91sam9rl_initialize(void) | 324 | static void __init at91sam9rl_initialize(void) |
325 | { | 325 | { |
326 | arm_pm_idle = at91sam9_idle; | 326 | arm_pm_idle = at91sam9_idle; |
327 | arm_pm_restart = at91sam9_alt_restart; | ||
328 | 327 | ||
329 | at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); | 328 | at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); |
330 | at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); | 329 | at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 4c2c96195a50..5d5e55237c41 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -66,8 +66,6 @@ extern void at91sam9_idle(void); | |||
66 | 66 | ||
67 | /* reset */ | 67 | /* reset */ |
68 | extern void at91_ioremap_rstc(u32 base_addr); | 68 | extern void at91_ioremap_rstc(u32 base_addr); |
69 | extern void at91sam9_alt_restart(enum reboot_mode, const char *); | ||
70 | extern void at91sam9g45_restart(enum reboot_mode, const char *); | ||
71 | 69 | ||
72 | /* shutdown */ | 70 | /* shutdown */ |
73 | extern void at91_ioremap_shdwc(u32 base_addr); | 71 | extern void at91_ioremap_shdwc(u32 base_addr); |