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-rw-r--r--arch/powerpc/Kconfig1
-rw-r--r--arch/powerpc/mm/tlb_low_64e.S3
-rw-r--r--arch/powerpc/mm/tlb_nohash.c2
3 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index fa395179ddd6..ad912d59313c 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -526,6 +526,7 @@ config PPC_16K_PAGES
526 526
527config PPC_64K_PAGES 527config PPC_64K_PAGES
528 bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64 528 bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64
529 depends on !PPC_FSL_BOOK3E
529 select PPC_HAS_HASH_64K if PPC_STD_MMU_64 530 select PPC_HAS_HASH_64K if PPC_STD_MMU_64
530 531
531config PPC_256K_PAGES 532config PPC_256K_PAGES
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index 16250b162375..c95eb323e9ae 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -240,6 +240,7 @@ itlb_miss_fault_bolted:
240 beq tlb_miss_common_bolted 240 beq tlb_miss_common_bolted
241 b itlb_miss_kernel_bolted 241 b itlb_miss_kernel_bolted
242 242
243#ifdef CONFIG_PPC_FSL_BOOK3E
243/* 244/*
244 * TLB miss handling for e6500 and derivatives, using hardware tablewalk. 245 * TLB miss handling for e6500 and derivatives, using hardware tablewalk.
245 * 246 *
@@ -409,7 +410,7 @@ itlb_miss_fault_e6500:
409 TLB_MISS_STATS_I(MMSTAT_TLB_MISS_NORM_FAULT) 410 TLB_MISS_STATS_I(MMSTAT_TLB_MISS_NORM_FAULT)
410 tlb_epilog_bolted 411 tlb_epilog_bolted
411 b exc_instruction_storage_book3e 412 b exc_instruction_storage_book3e
412 413#endif /* CONFIG_PPC_FSL_BOOK3E */
413 414
414/********************************************************************** 415/**********************************************************************
415 * * 416 * *
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 735839b74dc5..b37a58e1c92d 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -557,10 +557,12 @@ static void setup_mmu_htw(void)
557 patch_exception(0x1c0, exc_data_tlb_miss_htw_book3e); 557 patch_exception(0x1c0, exc_data_tlb_miss_htw_book3e);
558 patch_exception(0x1e0, exc_instruction_tlb_miss_htw_book3e); 558 patch_exception(0x1e0, exc_instruction_tlb_miss_htw_book3e);
559 break; 559 break;
560#ifdef CONFIG_PPC_FSL_BOOK3E
560 case PPC_HTW_E6500: 561 case PPC_HTW_E6500:
561 patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e); 562 patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e);
562 patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e); 563 patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e);
563 break; 564 break;
565#endif
564 } 566 }
565 pr_info("MMU: Book3E HW tablewalk %s\n", 567 pr_info("MMU: Book3E HW tablewalk %s\n",
566 book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported"); 568 book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported");