diff options
-rw-r--r-- | arch/arm/mach-omap2/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-rx51.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm2xxx_3xxx.c | 17 | ||||
-rw-r--r-- | arch/arm/mach-omap2/control.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_l3_smx.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/voltage.c | 1 |
12 files changed, 56 insertions, 18 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index a45cd6409686..512b15204450 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -68,7 +68,7 @@ obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o | |||
68 | obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o | 68 | obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o |
69 | 69 | ||
70 | AFLAGS_sleep24xx.o :=-Wa,-march=armv6 | 70 | AFLAGS_sleep24xx.o :=-Wa,-march=armv6 |
71 | AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a | 71 | AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec) |
72 | 72 | ||
73 | ifeq ($(CONFIG_PM_VERBOSE),y) | 73 | ifeq ($(CONFIG_PM_VERBOSE),y) |
74 | CFLAGS_pm_bus.o += -DDEBUG | 74 | CFLAGS_pm_bus.o += -DDEBUG |
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index e964895b80e8..f8ba20a14e62 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
@@ -141,14 +141,19 @@ static void __init rx51_init(void) | |||
141 | static void __init rx51_map_io(void) | 141 | static void __init rx51_map_io(void) |
142 | { | 142 | { |
143 | omap2_set_globals_3xxx(); | 143 | omap2_set_globals_3xxx(); |
144 | rx51_video_mem_init(); | ||
145 | omap34xx_map_common_io(); | 144 | omap34xx_map_common_io(); |
146 | } | 145 | } |
147 | 146 | ||
147 | static void __init rx51_reserve(void) | ||
148 | { | ||
149 | rx51_video_mem_init(); | ||
150 | omap_reserve(); | ||
151 | } | ||
152 | |||
148 | MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") | 153 | MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") |
149 | /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ | 154 | /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ |
150 | .boot_params = 0x80000100, | 155 | .boot_params = 0x80000100, |
151 | .reserve = omap_reserve, | 156 | .reserve = rx51_reserve, |
152 | .map_io = rx51_map_io, | 157 | .map_io = rx51_map_io, |
153 | .init_early = rx51_init_early, | 158 | .init_early = rx51_init_early, |
154 | .init_irq = omap_init_irq, | 159 | .init_irq = omap_init_irq, |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 276992d3b7fb..8c965671b4d4 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3116,14 +3116,9 @@ static struct omap_clk omap44xx_clks[] = { | |||
3116 | CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), | 3116 | CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), |
3117 | CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), | 3117 | CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), |
3118 | CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), | 3118 | CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), |
3119 | CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X), | ||
3120 | CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), | 3119 | CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), |
3121 | CLK("omapdss_dss", "fck", &dss_fck, CK_443X), | 3120 | CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), |
3122 | /* | 3121 | CLK("omapdss_dss", "ick", &dss_fck, CK_443X), |
3123 | * On OMAP4, DSS ick is a dummy clock; this is needed for compatibility | ||
3124 | * with OMAP2/3. | ||
3125 | */ | ||
3126 | CLK("omapdss_dss", "ick", &dummy_ck, CK_443X), | ||
3127 | CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), | 3122 | CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), |
3128 | CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), | 3123 | CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), |
3129 | CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), | 3124 | CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), |
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c index 9d0dec806e92..38830d8d4783 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c | |||
@@ -247,6 +247,7 @@ struct omap3_cm_regs { | |||
247 | u32 per_cm_clksel; | 247 | u32 per_cm_clksel; |
248 | u32 emu_cm_clksel; | 248 | u32 emu_cm_clksel; |
249 | u32 emu_cm_clkstctrl; | 249 | u32 emu_cm_clkstctrl; |
250 | u32 pll_cm_autoidle; | ||
250 | u32 pll_cm_autoidle2; | 251 | u32 pll_cm_autoidle2; |
251 | u32 pll_cm_clksel4; | 252 | u32 pll_cm_clksel4; |
252 | u32 pll_cm_clksel5; | 253 | u32 pll_cm_clksel5; |
@@ -319,6 +320,15 @@ void omap3_cm_save_context(void) | |||
319 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); | 320 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); |
320 | cm_context.emu_cm_clkstctrl = | 321 | cm_context.emu_cm_clkstctrl = |
321 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL); | 322 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL); |
323 | /* | ||
324 | * As per erratum i671, ROM code does not respect the PER DPLL | ||
325 | * programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1. | ||
326 | * In this case, even though this register has been saved in | ||
327 | * scratchpad contents, we need to restore AUTO_PERIPH_DPLL | ||
328 | * by ourselves. So, we need to save it anyway. | ||
329 | */ | ||
330 | cm_context.pll_cm_autoidle = | ||
331 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); | ||
322 | cm_context.pll_cm_autoidle2 = | 332 | cm_context.pll_cm_autoidle2 = |
323 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); | 333 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); |
324 | cm_context.pll_cm_clksel4 = | 334 | cm_context.pll_cm_clksel4 = |
@@ -441,6 +451,13 @@ void omap3_cm_restore_context(void) | |||
441 | CM_CLKSEL1); | 451 | CM_CLKSEL1); |
442 | omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, | 452 | omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, |
443 | OMAP2_CM_CLKSTCTRL); | 453 | OMAP2_CM_CLKSTCTRL); |
454 | /* | ||
455 | * As per erratum i671, ROM code does not respect the PER DPLL | ||
456 | * programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1. | ||
457 | * In this case, we need to restore AUTO_PERIPH_DPLL by ourselves. | ||
458 | */ | ||
459 | omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle, PLL_MOD, | ||
460 | CM_AUTOIDLE); | ||
444 | omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD, | 461 | omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD, |
445 | CM_AUTOIDLE2); | 462 | CM_AUTOIDLE2); |
446 | omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD, | 463 | omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD, |
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 695279419020..da53ba3917ca 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -316,8 +316,14 @@ void omap3_save_scratchpad_contents(void) | |||
316 | omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | 316 | omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); |
317 | prcm_block_contents.cm_clken_pll = | 317 | prcm_block_contents.cm_clken_pll = |
318 | omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); | 318 | omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); |
319 | /* | ||
320 | * As per erratum i671, ROM code does not respect the PER DPLL | ||
321 | * programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1. | ||
322 | * Then, in anycase, clear these bits to avoid extra latencies. | ||
323 | */ | ||
319 | prcm_block_contents.cm_autoidle_pll = | 324 | prcm_block_contents.cm_autoidle_pll = |
320 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL); | 325 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) & |
326 | ~OMAP3430_AUTO_PERIPH_DPLL_MASK; | ||
321 | prcm_block_contents.cm_clksel1_pll = | 327 | prcm_block_contents.cm_clksel1_pll = |
322 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); | 328 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); |
323 | prcm_block_contents.cm_clksel2_pll = | 329 | prcm_block_contents.cm_clksel2_pll = |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 8eb3ce1bbfbe..c4d0ae87d62a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -1639,6 +1639,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | |||
1639 | 1639 | ||
1640 | static struct omap_hwmod omap2420_gpio1_hwmod = { | 1640 | static struct omap_hwmod omap2420_gpio1_hwmod = { |
1641 | .name = "gpio1", | 1641 | .name = "gpio1", |
1642 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1642 | .mpu_irqs = omap242x_gpio1_irqs, | 1643 | .mpu_irqs = omap242x_gpio1_irqs, |
1643 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), | 1644 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), |
1644 | .main_clk = "gpios_fck", | 1645 | .main_clk = "gpios_fck", |
@@ -1669,6 +1670,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { | |||
1669 | 1670 | ||
1670 | static struct omap_hwmod omap2420_gpio2_hwmod = { | 1671 | static struct omap_hwmod omap2420_gpio2_hwmod = { |
1671 | .name = "gpio2", | 1672 | .name = "gpio2", |
1673 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1672 | .mpu_irqs = omap242x_gpio2_irqs, | 1674 | .mpu_irqs = omap242x_gpio2_irqs, |
1673 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), | 1675 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), |
1674 | .main_clk = "gpios_fck", | 1676 | .main_clk = "gpios_fck", |
@@ -1699,6 +1701,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { | |||
1699 | 1701 | ||
1700 | static struct omap_hwmod omap2420_gpio3_hwmod = { | 1702 | static struct omap_hwmod omap2420_gpio3_hwmod = { |
1701 | .name = "gpio3", | 1703 | .name = "gpio3", |
1704 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1702 | .mpu_irqs = omap242x_gpio3_irqs, | 1705 | .mpu_irqs = omap242x_gpio3_irqs, |
1703 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), | 1706 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), |
1704 | .main_clk = "gpios_fck", | 1707 | .main_clk = "gpios_fck", |
@@ -1729,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { | |||
1729 | 1732 | ||
1730 | static struct omap_hwmod omap2420_gpio4_hwmod = { | 1733 | static struct omap_hwmod omap2420_gpio4_hwmod = { |
1731 | .name = "gpio4", | 1734 | .name = "gpio4", |
1735 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1732 | .mpu_irqs = omap242x_gpio4_irqs, | 1736 | .mpu_irqs = omap242x_gpio4_irqs, |
1733 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), | 1737 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), |
1734 | .main_clk = "gpios_fck", | 1738 | .main_clk = "gpios_fck", |
@@ -1782,7 +1786,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { | |||
1782 | static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { | 1786 | static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { |
1783 | { | 1787 | { |
1784 | .pa_start = 0x48056000, | 1788 | .pa_start = 0x48056000, |
1785 | .pa_end = 0x4a0560ff, | 1789 | .pa_end = 0x48056fff, |
1786 | .flags = ADDR_TYPE_RT | 1790 | .flags = ADDR_TYPE_RT |
1787 | }, | 1791 | }, |
1788 | }; | 1792 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index e6e3810db77f..9682dd519f8d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -1742,6 +1742,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | |||
1742 | 1742 | ||
1743 | static struct omap_hwmod omap2430_gpio1_hwmod = { | 1743 | static struct omap_hwmod omap2430_gpio1_hwmod = { |
1744 | .name = "gpio1", | 1744 | .name = "gpio1", |
1745 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1745 | .mpu_irqs = omap243x_gpio1_irqs, | 1746 | .mpu_irqs = omap243x_gpio1_irqs, |
1746 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), | 1747 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), |
1747 | .main_clk = "gpios_fck", | 1748 | .main_clk = "gpios_fck", |
@@ -1772,6 +1773,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | |||
1772 | 1773 | ||
1773 | static struct omap_hwmod omap2430_gpio2_hwmod = { | 1774 | static struct omap_hwmod omap2430_gpio2_hwmod = { |
1774 | .name = "gpio2", | 1775 | .name = "gpio2", |
1776 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1775 | .mpu_irqs = omap243x_gpio2_irqs, | 1777 | .mpu_irqs = omap243x_gpio2_irqs, |
1776 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), | 1778 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), |
1777 | .main_clk = "gpios_fck", | 1779 | .main_clk = "gpios_fck", |
@@ -1802,6 +1804,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | |||
1802 | 1804 | ||
1803 | static struct omap_hwmod omap2430_gpio3_hwmod = { | 1805 | static struct omap_hwmod omap2430_gpio3_hwmod = { |
1804 | .name = "gpio3", | 1806 | .name = "gpio3", |
1807 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1805 | .mpu_irqs = omap243x_gpio3_irqs, | 1808 | .mpu_irqs = omap243x_gpio3_irqs, |
1806 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), | 1809 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), |
1807 | .main_clk = "gpios_fck", | 1810 | .main_clk = "gpios_fck", |
@@ -1832,6 +1835,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | |||
1832 | 1835 | ||
1833 | static struct omap_hwmod omap2430_gpio4_hwmod = { | 1836 | static struct omap_hwmod omap2430_gpio4_hwmod = { |
1834 | .name = "gpio4", | 1837 | .name = "gpio4", |
1838 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1835 | .mpu_irqs = omap243x_gpio4_irqs, | 1839 | .mpu_irqs = omap243x_gpio4_irqs, |
1836 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), | 1840 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), |
1837 | .main_clk = "gpios_fck", | 1841 | .main_clk = "gpios_fck", |
@@ -1862,6 +1866,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { | |||
1862 | 1866 | ||
1863 | static struct omap_hwmod omap2430_gpio5_hwmod = { | 1867 | static struct omap_hwmod omap2430_gpio5_hwmod = { |
1864 | .name = "gpio5", | 1868 | .name = "gpio5", |
1869 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1865 | .mpu_irqs = omap243x_gpio5_irqs, | 1870 | .mpu_irqs = omap243x_gpio5_irqs, |
1866 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), | 1871 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), |
1867 | .main_clk = "gpio5_fck", | 1872 | .main_clk = "gpio5_fck", |
@@ -1915,7 +1920,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | |||
1915 | static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { | 1920 | static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { |
1916 | { | 1921 | { |
1917 | .pa_start = 0x48056000, | 1922 | .pa_start = 0x48056000, |
1918 | .pa_end = 0x4a0560ff, | 1923 | .pa_end = 0x48056fff, |
1919 | .flags = ADDR_TYPE_RT | 1924 | .flags = ADDR_TYPE_RT |
1920 | }, | 1925 | }, |
1921 | }; | 1926 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index b98e2dfcba28..909a84de6682 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -2141,6 +2141,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = { | |||
2141 | 2141 | ||
2142 | static struct omap_hwmod omap3xxx_gpio1_hwmod = { | 2142 | static struct omap_hwmod omap3xxx_gpio1_hwmod = { |
2143 | .name = "gpio1", | 2143 | .name = "gpio1", |
2144 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2144 | .mpu_irqs = omap3xxx_gpio1_irqs, | 2145 | .mpu_irqs = omap3xxx_gpio1_irqs, |
2145 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), | 2146 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), |
2146 | .main_clk = "gpio1_ick", | 2147 | .main_clk = "gpio1_ick", |
@@ -2177,6 +2178,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = { | |||
2177 | 2178 | ||
2178 | static struct omap_hwmod omap3xxx_gpio2_hwmod = { | 2179 | static struct omap_hwmod omap3xxx_gpio2_hwmod = { |
2179 | .name = "gpio2", | 2180 | .name = "gpio2", |
2181 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2180 | .mpu_irqs = omap3xxx_gpio2_irqs, | 2182 | .mpu_irqs = omap3xxx_gpio2_irqs, |
2181 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), | 2183 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), |
2182 | .main_clk = "gpio2_ick", | 2184 | .main_clk = "gpio2_ick", |
@@ -2213,6 +2215,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = { | |||
2213 | 2215 | ||
2214 | static struct omap_hwmod omap3xxx_gpio3_hwmod = { | 2216 | static struct omap_hwmod omap3xxx_gpio3_hwmod = { |
2215 | .name = "gpio3", | 2217 | .name = "gpio3", |
2218 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2216 | .mpu_irqs = omap3xxx_gpio3_irqs, | 2219 | .mpu_irqs = omap3xxx_gpio3_irqs, |
2217 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), | 2220 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), |
2218 | .main_clk = "gpio3_ick", | 2221 | .main_clk = "gpio3_ick", |
@@ -2249,6 +2252,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = { | |||
2249 | 2252 | ||
2250 | static struct omap_hwmod omap3xxx_gpio4_hwmod = { | 2253 | static struct omap_hwmod omap3xxx_gpio4_hwmod = { |
2251 | .name = "gpio4", | 2254 | .name = "gpio4", |
2255 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2252 | .mpu_irqs = omap3xxx_gpio4_irqs, | 2256 | .mpu_irqs = omap3xxx_gpio4_irqs, |
2253 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), | 2257 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), |
2254 | .main_clk = "gpio4_ick", | 2258 | .main_clk = "gpio4_ick", |
@@ -2285,6 +2289,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio5_slaves[] = { | |||
2285 | 2289 | ||
2286 | static struct omap_hwmod omap3xxx_gpio5_hwmod = { | 2290 | static struct omap_hwmod omap3xxx_gpio5_hwmod = { |
2287 | .name = "gpio5", | 2291 | .name = "gpio5", |
2292 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2288 | .mpu_irqs = omap3xxx_gpio5_irqs, | 2293 | .mpu_irqs = omap3xxx_gpio5_irqs, |
2289 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), | 2294 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), |
2290 | .main_clk = "gpio5_ick", | 2295 | .main_clk = "gpio5_ick", |
@@ -2321,6 +2326,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio6_slaves[] = { | |||
2321 | 2326 | ||
2322 | static struct omap_hwmod omap3xxx_gpio6_hwmod = { | 2327 | static struct omap_hwmod omap3xxx_gpio6_hwmod = { |
2323 | .name = "gpio6", | 2328 | .name = "gpio6", |
2329 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2324 | .mpu_irqs = omap3xxx_gpio6_irqs, | 2330 | .mpu_irqs = omap3xxx_gpio6_irqs, |
2325 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), | 2331 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), |
2326 | .main_clk = "gpio6_ick", | 2332 | .main_clk = "gpio6_ick", |
@@ -2386,7 +2392,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { | |||
2386 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { | 2392 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { |
2387 | { | 2393 | { |
2388 | .pa_start = 0x48056000, | 2394 | .pa_start = 0x48056000, |
2389 | .pa_end = 0x4a0560ff, | 2395 | .pa_end = 0x48056fff, |
2390 | .flags = ADDR_TYPE_RT | 2396 | .flags = ADDR_TYPE_RT |
2391 | }, | 2397 | }, |
2392 | }; | 2398 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 3e88dd3f8ef3..abc548a0c98d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -885,7 +885,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = { | |||
885 | static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { | 885 | static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { |
886 | { | 886 | { |
887 | .pa_start = 0x4a056000, | 887 | .pa_start = 0x4a056000, |
888 | .pa_end = 0x4a0560ff, | 888 | .pa_end = 0x4a056fff, |
889 | .flags = ADDR_TYPE_RT | 889 | .flags = ADDR_TYPE_RT |
890 | }, | 890 | }, |
891 | }; | 891 | }; |
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index 5f2da7565b68..4321e7938929 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c | |||
@@ -196,11 +196,11 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) | |||
196 | /* No timeout error for debug sources */ | 196 | /* No timeout error for debug sources */ |
197 | } | 197 | } |
198 | 198 | ||
199 | base = ((l3->rt) + (*(omap3_l3_bases[int_type] + err_source))); | ||
200 | |||
201 | /* identify the error source */ | 199 | /* identify the error source */ |
202 | for (err_source = 0; !(status & (1 << err_source)); err_source++) | 200 | for (err_source = 0; !(status & (1 << err_source)); err_source++) |
203 | ; | 201 | ; |
202 | |||
203 | base = l3->rt + *(omap3_l3_bases[int_type] + err_source); | ||
204 | error = omap3_l3_readll(base, L3_ERROR_LOG); | 204 | error = omap3_l3_readll(base, L3_ERROR_LOG); |
205 | 205 | ||
206 | if (error) { | 206 | if (error) { |
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 30af3351c2d6..49486f522dca 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c | |||
@@ -89,6 +89,7 @@ static void omap2_init_processor_devices(void) | |||
89 | if (cpu_is_omap44xx()) { | 89 | if (cpu_is_omap44xx()) { |
90 | _init_omap_device("l3_main_1", &l3_dev); | 90 | _init_omap_device("l3_main_1", &l3_dev); |
91 | _init_omap_device("dsp", &dsp_dev); | 91 | _init_omap_device("dsp", &dsp_dev); |
92 | _init_omap_device("iva", &iva_dev); | ||
92 | } else { | 93 | } else { |
93 | _init_omap_device("l3_main", &l3_dev); | 94 | _init_omap_device("l3_main", &l3_dev); |
94 | } | 95 | } |
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 6fb520999b6e..0c1552d9d995 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c | |||
@@ -114,7 +114,6 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) | |||
114 | sys_clk_speed /= 1000; | 114 | sys_clk_speed /= 1000; |
115 | 115 | ||
116 | /* Generic voltage parameters */ | 116 | /* Generic voltage parameters */ |
117 | vdd->curr_volt = 1200000; | ||
118 | vdd->volt_scale = vp_forceupdate_scale_voltage; | 117 | vdd->volt_scale = vp_forceupdate_scale_voltage; |
119 | vdd->vp_enabled = false; | 118 | vdd->vp_enabled = false; |
120 | 119 | ||