9 files changed, 276 insertions, 191 deletions

diff --git a/Documentation/devicetree/bindings/arm/spear.txt b/Documentation/devicetree/bindings/arm/spear.txt
new file mode 100644
index 000000000000..f8e54f092328
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spear.txt
@@ -0,0 +1,8 @@
+ST SPEAr Platforms Device Tree Bindings
+---------------------------------------
+
+Boards with the ST SPEAr600 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "st,spear600";
diff --git a/arch/arm/boot/dts/spear600-evb.dts b/arch/arm/boot/dts/spear600-evb.dts
new file mode 100644
index 000000000000..636292e18c90
--- /dev/null
+++ b/arch/arm/boot/dts/spear600-evb.dts
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2012 Stefan Roese <sr@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "spear600.dtsi"
+
+/ {
+        model = "ST SPEAr600 Evaluation Board";
+        compatible = "st,spear600-evb", "st,spear600";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x10000000>;
+        };
+
+        ahb {
+                gmac: ethernet@e0800000 {
+                        phy-mode = "gmii";
+                        status = "okay";
+                };
+
+                apb {
+                        serial@d0000000 {
+                                status = "okay";
+                        };
+
+                        serial@d0080000 {
+                                status = "okay";
+                        };
+
+                        i2c@d0200000 {
+                                clock-frequency = <400000>;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
new file mode 100644
index 000000000000..ebe0885a2b98
--- /dev/null
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -0,0 +1,174 @@
+/*
+ * Copyright 2012 Stefan Roese <sr@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "st,spear600";
+
+        cpus {
+                cpu@0 {
+                        compatible = "arm,arm926ejs";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x40000000>;
+        };
+
+        ahb {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                ranges = <0xd0000000 0xd0000000 0x30000000>;
+
+                vic0: interrupt-controller@f1100000 {
+                        compatible = "arm,pl190-vic";
+                        interrupt-controller;
+                        reg = <0xf1100000 0x1000>;
+                        #interrupt-cells = <1>;
+                };
+
+                vic1: interrupt-controller@f1000000 {
+                        compatible = "arm,pl190-vic";
+                        interrupt-controller;
+                        reg = <0xf1000000 0x1000>;
+                        #interrupt-cells = <1>;
+                };
+
+                gmac: ethernet@e0800000 {
+                        compatible = "st,spear600-gmac";
+                        reg = <0xe0800000 0x8000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <24 23>;
+                        interrupt-names = "macirq", "eth_wake_irq";
+                        status = "disabled";
+                };
+
+                fsmc: flash@d1800000 {
+                        compatible = "st,spear600-fsmc-nand";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0xd1800000 0x1000        /* FSMC Register */
+                               0xd2000000 0x4000>;      /* NAND Base */
+                        reg-names = "fsmc_regs", "nand_data";
+                        st,ale-off = <0x20000>;
+                        st,cle-off = <0x10000>;
+                        status = "disabled";
+                };
+
+                smi: flash@fc000000 {
+                        compatible = "st,spear600-smi";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0xfc000000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <12>;
+                        status = "disabled";
+                };
+
+                ehci@e1800000 {
+                        compatible = "st,spear600-ehci", "usb-ehci";
+                        reg = <0xe1800000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <27>;
+                        status = "disabled";
+                };
+
+                ehci@e2000000 {
+                        compatible = "st,spear600-ehci", "usb-ehci";
+                        reg = <0xe2000000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <29>;
+                        status = "disabled";
+                };
+
+                ohci@e1900000 {
+                        compatible = "st,spear600-ohci", "usb-ohci";
+                        reg = <0xe1900000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <26>;
+                        status = "disabled";
+                };
+
+                ohci@e2100000 {
+                        compatible = "st,spear600-ohci", "usb-ohci";
+                        reg = <0xe2100000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <28>;
+                        status = "disabled";
+                };
+
+                apb {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        ranges = <0xd0000000 0xd0000000 0x30000000>;
+
+                        serial@d0000000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0xd0000000 0x1000>;
+                                interrupt-parent = <&vic0>;
+                                interrupts = <24>;
+                                status = "disabled";
+                        };
+
+                        serial@d0080000 {
+                                compatible = "arm,pl011", "arm,primecell";