diff options
| -rw-r--r-- | drivers/i2c/busses/i2c-omap.c | 75 |
1 files changed, 35 insertions, 40 deletions
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 11e645ab1e79..0195d9969df0 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c | |||
| @@ -210,7 +210,6 @@ struct omap_i2c_dev { | |||
| 210 | u16 pscstate; | 210 | u16 pscstate; |
| 211 | u16 scllstate; | 211 | u16 scllstate; |
| 212 | u16 sclhstate; | 212 | u16 sclhstate; |
| 213 | u16 bufstate; | ||
| 214 | u16 syscstate; | 213 | u16 syscstate; |
| 215 | u16 westate; | 214 | u16 westate; |
| 216 | u16 errata; | 215 | u16 errata; |
| @@ -278,9 +277,34 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) | |||
| 278 | (i2c_dev->regs[reg] << i2c_dev->reg_shift)); | 277 | (i2c_dev->regs[reg] << i2c_dev->reg_shift)); |
| 279 | } | 278 | } |
| 280 | 279 | ||
| 280 | static void __omap_i2c_init(struct omap_i2c_dev *dev) | ||
| 281 | { | ||
| 282 | |||
| 283 | omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); | ||
| 284 | |||
| 285 | /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ | ||
| 286 | omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); | ||
| 287 | |||
| 288 | /* SCL low and high time values */ | ||
| 289 | omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate); | ||
| 290 | omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->sclhstate); | ||
| 291 | if (dev->rev >= OMAP_I2C_REV_ON_3430_3530) | ||
| 292 | omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); | ||
| 293 | |||
| 294 | /* Take the I2C module out of reset: */ | ||
| 295 | omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); | ||
| 296 | |||
| 297 | /* | ||
| 298 | * Don't write to this register if the IE state is 0 as it can | ||
| 299 | * cause deadlock. | ||
| 300 | */ | ||
| 301 | if (dev->iestate) | ||
| 302 | omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); | ||
| 303 | } | ||
| 304 | |||
| 281 | static int omap_i2c_init(struct omap_i2c_dev *dev) | 305 | static int omap_i2c_init(struct omap_i2c_dev *dev) |
| 282 | { | 306 | { |
| 283 | u16 psc = 0, scll = 0, sclh = 0, buf = 0; | 307 | u16 psc = 0, scll = 0, sclh = 0; |
| 284 | u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0; | 308 | u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0; |
| 285 | unsigned long fclk_rate = 12000000; | 309 | unsigned long fclk_rate = 12000000; |
| 286 | unsigned long timeout; | 310 | unsigned long timeout; |
| @@ -330,11 +354,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) | |||
| 330 | * REVISIT: Some wkup sources might not be needed. | 354 | * REVISIT: Some wkup sources might not be needed. |
| 331 | */ | 355 | */ |
| 332 | dev->westate = OMAP_I2C_WE_ALL; | 356 | dev->westate = OMAP_I2C_WE_ALL; |
| 333 | omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, | ||
| 334 | dev->westate); | ||
| 335 | } | 357 | } |
| 336 | } | 358 | } |
| 337 | omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); | ||
| 338 | 359 | ||
| 339 | if (dev->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { | 360 | if (dev->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { |
| 340 | /* | 361 | /* |
| @@ -419,28 +440,17 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) | |||
| 419 | sclh = fclk_rate / (dev->speed * 2) - 7 + psc; | 440 | sclh = fclk_rate / (dev->speed * 2) - 7 + psc; |
| 420 | } | 441 | } |
| 421 | 442 | ||
| 422 | /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ | ||
| 423 | omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, psc); | ||
| 424 | |||
| 425 | /* SCL low and high time values */ | ||
| 426 | omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, scll); | ||
| 427 | omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, sclh); | ||
| 428 | |||
| 429 | /* Take the I2C module out of reset: */ | ||
| 430 | omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); | ||
| 431 | |||
| 432 | /* Enable interrupts */ | ||
| 433 | dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY | | 443 | dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY | |
| 434 | OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK | | 444 | OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK | |
| 435 | OMAP_I2C_IE_AL) | ((dev->fifo_size) ? | 445 | OMAP_I2C_IE_AL) | ((dev->fifo_size) ? |
| 436 | (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0); | 446 | (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0); |
| 437 | omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); | 447 | |
| 438 | if (dev->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { | 448 | dev->pscstate = psc; |
| 439 | dev->pscstate = psc; | 449 | dev->scllstate = scll; |
| 440 | dev->scllstate = scll; | 450 | dev->sclhstate = sclh; |
| 441 | dev->sclhstate = sclh; | 451 | |
| 442 | dev->bufstate = buf; | 452 | __omap_i2c_init(dev); |
| 443 | } | 453 | |
| 444 | return 0; | 454 | return 0; |
| 445 | } | 455 | } |
| 446 | 456 | ||
| @@ -1308,23 +1318,8 @@ static int omap_i2c_runtime_resume(struct device *dev) | |||
| 1308 | if (!_dev->regs) | 1318 | if (!_dev->regs) |
| 1309 | return 0; | 1319 | return 0; |
| 1310 | 1320 | ||
| 1311 | if (_dev->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { | 1321 | if (_dev->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) |
| 1312 | omap_i2c_write_reg(_dev, OMAP_I2C_CON_REG, 0); | 1322 | __omap_i2c_init(_dev); |
| 1313 | omap_i2c_write_reg(_dev, OMAP_I2C_PSC_REG, _dev->pscstate); | ||
| 1314 | omap_i2c_write_reg(_dev, OMAP_I2C_SCLL_REG, _dev->scllstate); | ||
| 1315 | omap_i2c_write_reg(_dev, OMAP_I2C_SCLH_REG, _dev->sclhstate); | ||
| 1316 | omap_i2c_write_reg(_dev, OMAP_I2C_BUF_REG, _dev->bufstate); | ||
| 1317 | omap_i2c_write_reg(_dev, OMAP_I2C_SYSC_REG, _dev->syscstate); | ||
| 1318 | omap_i2c_write_reg(_dev, OMAP_I2C_WE_REG, _dev->westate); | ||
| 1319 | omap_i2c_write_reg(_dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); | ||
| 1320 | } | ||
| 1321 | |||
| 1322 | /* | ||
| 1323 | * Don't write to this register if the IE state is 0 as it can | ||
| 1324 | * cause deadlock. | ||
| 1325 | */ | ||
| 1326 | if (_dev->iestate) | ||
| 1327 | omap_i2c_write_reg(_dev, OMAP_I2C_IE_REG, _dev->iestate); | ||
| 1328 | 1323 | ||
| 1329 | return 0; | 1324 | return 0; |
| 1330 | } | 1325 | } |
