2 files changed, 9 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index a2a30061172f..e91a2403b125 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3494,7 +3494,8 @@ static int cik_cp_gfx_resume(struct radeon_device *rdev)
         int r;
 
         WREG32(CP_SEM_WAIT_TIMER, 0x0);
-        WREG32(CP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);
+        if (rdev->family != CHIP_HAWAII)
+                WREG32(CP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);
 
         /* Set the write pointer delay */
         WREG32(CP_RB_WPTR_DELAY, 0);
@@ -4831,12 +4832,17 @@ void cik_vm_fini(struct radeon_device *rdev)
 static void cik_vm_decode_fault(struct radeon_device *rdev,
                                 u32 status, u32 addr, u32 mc_client)
 {
-        u32 mc_id = (status & MEMORY_CLIENT_ID_MASK) >> MEMORY_CLIENT_ID_SHIFT;
+        u32 mc_id;
         u32 vmid = (status & FAULT_VMID_MASK) >> FAULT_VMID_SHIFT;
         u32 protections = (status & PROTECTIONS_MASK) >> PROTECTIONS_SHIFT;
         char block[5] = { mc_client >> 24, (mc_client >> 16) & 0xff,
                 (mc_client >> 8) & 0xff, mc_client & 0xff, 0 };
 
+        if (rdev->family == CHIP_HAWAII)
+                mc_id = (status & HAWAII_MEMORY_CLIENT_ID_MASK) >> MEMORY_CLIENT_ID_SHIFT;
+        else
+                mc_id = (status & MEMORY_CLIENT_ID_MASK) >> MEMORY_CLIENT_ID_SHIFT;
+
         printk("VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)\n",
                protections, vmid, addr,
                (status & MEMORY_CLIENT_RW_MASK) ? "write" : "read",
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index aeb3d004431d..28cbcc1baa07 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -500,6 +500,7 @@
                  * bit 4: write
                  */
 #define         MEMORY_CLIENT_ID_MASK                   (0xff << 12)
+#define         HAWAII_MEMORY_CLIENT_ID_MASK            (0x1ff << 12)
 #define         MEMORY_CLIENT_ID_SHIFT                  12
 #define         MEMORY_CLIENT_RW_MASK                   (1 << 24)
 #define         MEMORY_CLIENT_RW_SHIFT                  24