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1 | * Device tree bindings for Texas instruments Keystone timer | ||
2 | |||
3 | This document provides bindings for the 64-bit timer in the KeyStone | ||
4 | architecture devices. The timer can be configured as a general-purpose 64-bit | ||
5 | timer, dual general-purpose 32-bit timers. When configured as dual 32-bit | ||
6 | timers, each half can operate in conjunction (chain mode) or independently | ||
7 | (unchained mode) of each other. | ||
8 | |||
9 | It is global timer is a free running up-counter and can generate interrupt | ||
10 | when the counter reaches preset counter values. | ||
11 | |||
12 | Documentation: | ||
13 | http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf | ||
14 | |||
15 | Required properties: | ||
16 | |||
17 | - compatible : should be "ti,keystone-timer". | ||
18 | - reg : specifies base physical address and count of the registers. | ||
19 | - interrupts : interrupt generated by the timer. | ||
20 | - clocks : the clock feeding the timer clock. | ||
21 | |||
22 | Example: | ||
23 | |||
24 | timer@22f0000 { | ||
25 | compatible = "ti,keystone-timer"; | ||
26 | reg = <0x022f0000 0x80>; | ||
27 | interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; | ||
28 | clocks = <&clktimer15>; | ||
29 | }; | ||