diff options
-rw-r--r-- | include/asm-generic/io.h | 445 |
1 files changed, 350 insertions, 95 deletions
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index b8fdc57a7335..fb62c621acf9 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #define __ASM_GENERIC_IO_H | 12 | #define __ASM_GENERIC_IO_H |
13 | 13 | ||
14 | #include <asm/page.h> /* I/O is all done through memory accesses */ | 14 | #include <asm/page.h> /* I/O is all done through memory accesses */ |
15 | #include <linux/string.h> /* for memset() and memcpy() */ | ||
15 | #include <linux/types.h> | 16 | #include <linux/types.h> |
16 | 17 | ||
17 | #ifdef CONFIG_GENERIC_IOMAP | 18 | #ifdef CONFIG_GENERIC_IOMAP |
@@ -24,142 +25,154 @@ | |||
24 | #define mmiowb() do {} while (0) | 25 | #define mmiowb() do {} while (0) |
25 | #endif | 26 | #endif |
26 | 27 | ||
27 | /*****************************************************************************/ | ||
28 | /* | 28 | /* |
29 | * readX/writeX() are used to access memory mapped devices. On some | 29 | * __raw_{read,write}{b,w,l,q}() access memory in native endianness. |
30 | * architectures the memory mapped IO stuff needs to be accessed | 30 | * |
31 | * differently. On the simple architectures, we just read/write the | 31 | * On some architectures memory mapped IO needs to be accessed differently. |
32 | * memory location directly. | 32 | * On the simple architectures, we just read/write the memory location |
33 | * directly. | ||
33 | */ | 34 | */ |
35 | |||
34 | #ifndef __raw_readb | 36 | #ifndef __raw_readb |
37 | #define __raw_readb __raw_readb | ||
35 | static inline u8 __raw_readb(const volatile void __iomem *addr) | 38 | static inline u8 __raw_readb(const volatile void __iomem *addr) |
36 | { | 39 | { |
37 | return *(const volatile u8 __force *) addr; | 40 | return *(const volatile u8 __force *)addr; |
38 | } | 41 | } |
39 | #endif | 42 | #endif |
40 | 43 | ||
41 | #ifndef __raw_readw | 44 | #ifndef __raw_readw |
45 | #define __raw_readw __raw_readw | ||
42 | static inline u16 __raw_readw(const volatile void __iomem *addr) | 46 | static inline u16 __raw_readw(const volatile void __iomem *addr) |
43 | { | 47 | { |
44 | return *(const volatile u16 __force *) addr; | 48 | return *(const volatile u16 __force *)addr; |
45 | } | 49 | } |
46 | #endif | 50 | #endif |
47 | 51 | ||
48 | #ifndef __raw_readl | 52 | #ifndef __raw_readl |
53 | #define __raw_readl __raw_readl | ||
49 | static inline u32 __raw_readl(const volatile void __iomem *addr) | 54 | static inline u32 __raw_readl(const volatile void __iomem *addr) |
50 | { | 55 | { |
51 | return *(const volatile u32 __force *) addr; | 56 | return *(const volatile u32 __force *)addr; |
52 | } | 57 | } |
53 | #endif | 58 | #endif |
54 | 59 | ||
55 | #define readb __raw_readb | 60 | #ifdef CONFIG_64BIT |
56 | 61 | #ifndef __raw_readq | |
57 | #define readw readw | 62 | #define __raw_readq __raw_readq |
58 | static inline u16 readw(const volatile void __iomem *addr) | 63 | static inline u64 __raw_readq(const volatile void __iomem *addr) |
59 | { | ||
60 | return __le16_to_cpu(__raw_readw(addr)); | ||
61 | } | ||
62 | |||
63 | #define readl readl | ||
64 | static inline u32 readl(const volatile void __iomem *addr) | ||
65 | { | 64 | { |
66 | return __le32_to_cpu(__raw_readl(addr)); | 65 | return *(const volatile u64 __force *)addr; |
67 | } | 66 | } |
67 | #endif | ||
68 | #endif /* CONFIG_64BIT */ | ||
68 | 69 | ||
69 | #ifndef __raw_writeb | 70 | #ifndef __raw_writeb |
70 | static inline void __raw_writeb(u8 b, volatile void __iomem *addr) | 71 | #define __raw_writeb __raw_writeb |
72 | static inline void __raw_writeb(u8 value, volatile void __iomem *addr) | ||
71 | { | 73 | { |
72 | *(volatile u8 __force *) addr = b; | 74 | *(volatile u8 __force *)addr = value; |
73 | } | 75 | } |
74 | #endif | 76 | #endif |
75 | 77 | ||
76 | #ifndef __raw_writew | 78 | #ifndef __raw_writew |
77 | static inline void __raw_writew(u16 b, volatile void __iomem *addr) | 79 | #define __raw_writew __raw_writew |
80 | static inline void __raw_writew(u16 value, volatile void __iomem *addr) | ||
78 | { | 81 | { |
79 | *(volatile u16 __force *) addr = b; | 82 | *(volatile u16 __force *)addr = value; |
80 | } | 83 | } |
81 | #endif | 84 | #endif |
82 | 85 | ||
83 | #ifndef __raw_writel | 86 | #ifndef __raw_writel |
84 | static inline void __raw_writel(u32 b, volatile void __iomem *addr) | 87 | #define __raw_writel __raw_writel |
88 | static inline void __raw_writel(u32 value, volatile void __iomem *addr) | ||
85 | { | 89 | { |
86 | *(volatile u32 __force *) addr = b; | 90 | *(volatile u32 __force *)addr = value; |
87 | } | 91 | } |
88 | #endif | 92 | #endif |
89 | 93 | ||
90 | #define writeb __raw_writeb | ||
91 | #define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr) | ||
92 | #define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr) | ||
93 | |||
94 | #ifdef CONFIG_64BIT | 94 | #ifdef CONFIG_64BIT |
95 | #ifndef __raw_readq | 95 | #ifndef __raw_writeq |
96 | static inline u64 __raw_readq(const volatile void __iomem *addr) | 96 | #define __raw_writeq __raw_writeq |
97 | static inline void __raw_writeq(u64 value, volatile void __iomem *addr) | ||
97 | { | 98 | { |
98 | return *(const volatile u64 __force *) addr; | 99 | *(volatile u64 __force *)addr = value; |
99 | } | 100 | } |
100 | #endif | 101 | #endif |
102 | #endif /* CONFIG_64BIT */ | ||
101 | 103 | ||
102 | #define readq readq | 104 | /* |
103 | static inline u64 readq(const volatile void __iomem *addr) | 105 | * {read,write}{b,w,l,q}() access little endian memory and return result in |
104 | { | 106 | * native endianness. |
105 | return __le64_to_cpu(__raw_readq(addr)); | 107 | */ |
106 | } | ||
107 | 108 | ||
108 | #ifndef __raw_writeq | 109 | #ifndef readb |
109 | static inline void __raw_writeq(u64 b, volatile void __iomem *addr) | 110 | #define readb readb |
111 | static inline u8 readb(const volatile void __iomem *addr) | ||
110 | { | 112 | { |
111 | *(volatile u64 __force *) addr = b; | 113 | return __raw_readb(addr); |
112 | } | 114 | } |
113 | #endif | 115 | #endif |
114 | 116 | ||
115 | #define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr) | 117 | #ifndef readw |
116 | #endif /* CONFIG_64BIT */ | 118 | #define readw readw |
117 | 119 | static inline u16 readw(const volatile void __iomem *addr) | |
118 | #ifndef PCI_IOBASE | 120 | { |
119 | #define PCI_IOBASE ((void __iomem *) 0) | 121 | return __le16_to_cpu(__raw_readw(addr)); |
122 | } | ||
120 | #endif | 123 | #endif |
121 | 124 | ||
122 | /*****************************************************************************/ | 125 | #ifndef readl |
123 | /* | 126 | #define readl readl |
124 | * traditional input/output functions | 127 | static inline u32 readl(const volatile void __iomem *addr) |
125 | */ | ||
126 | |||
127 | static inline u8 inb(unsigned long addr) | ||
128 | { | 128 | { |
129 | return readb(addr + PCI_IOBASE); | 129 | return __le32_to_cpu(__raw_readl(addr)); |
130 | } | 130 | } |
131 | #endif | ||
131 | 132 | ||
132 | static inline u16 inw(unsigned long addr) | 133 | #ifdef CONFIG_64BIT |
134 | #ifndef readq | ||
135 | #define readq readq | ||
136 | static inline u64 readq(const volatile void __iomem *addr) | ||
133 | { | 137 | { |
134 | return readw(addr + PCI_IOBASE); | 138 | return __le64_to_cpu(__raw_readq(addr)); |
135 | } | 139 | } |
140 | #endif | ||
141 | #endif /* CONFIG_64BIT */ | ||
136 | 142 | ||
137 | static inline u32 inl(unsigned long addr) | 143 | #ifndef writeb |
144 | #define writeb writeb | ||
145 | static inline void writeb(u8 value, volatile void __iomem *addr) | ||
138 | { | 146 | { |
139 | return readl(addr + PCI_IOBASE); | 147 | __raw_writeb(value, addr); |
140 | } | 148 | } |
149 | #endif | ||
141 | 150 | ||
142 | static inline void outb(u8 b, unsigned long addr) | 151 | #ifndef writew |
152 | #define writew writew | ||
153 | static inline void writew(u16 value, volatile void __iomem *addr) | ||
143 | { | 154 | { |
144 | writeb(b, addr + PCI_IOBASE); | 155 | __raw_writew(cpu_to_le16(value), addr); |
145 | } | 156 | } |
157 | #endif | ||
146 | 158 | ||
147 | static inline void outw(u16 b, unsigned long addr) | 159 | #ifndef writel |
160 | #define writel writel | ||
161 | static inline void writel(u32 value, volatile void __iomem *addr) | ||
148 | { | 162 | { |
149 | writew(b, addr + PCI_IOBASE); | 163 | __raw_writel(__cpu_to_le32(value), addr); |
150 | } | 164 | } |
165 | #endif | ||
151 | 166 | ||
152 | static inline void outl(u32 b, unsigned long addr) | 167 | #ifdef CONFIG_64BIT |
168 | #ifndef writeq | ||
169 | #define writeq writeq | ||
170 | static inline void writeq(u64 value, volatile void __iomem *addr) | ||
153 | { | 171 | { |
154 | writel(b, addr + PCI_IOBASE); | 172 | __raw_writeq(__cpu_to_le64(value), addr); |
155 | } | 173 | } |
156 | 174 | #endif | |
157 | #define inb_p(addr) inb(addr) | 175 | #endif /* CONFIG_64BIT */ |
158 | #define inw_p(addr) inw(addr) | ||
159 | #define inl_p(addr) inl(addr) | ||
160 | #define outb_p(x, addr) outb((x), (addr)) | ||
161 | #define outw_p(x, addr) outw((x), (addr)) | ||
162 | #define outl_p(x, addr) outl((x), (addr)) | ||
163 | 176 | ||
164 | #ifndef insb | 177 | #ifndef insb |
165 | static inline void insb(unsigned long addr, void *buffer, int count) | 178 | static inline void insb(unsigned long addr, void *buffer, int count) |
@@ -237,18 +250,6 @@ static inline void outsl(unsigned long addr, const void *buffer, int count) | |||
237 | #endif | 250 | #endif |
238 | 251 | ||
239 | #ifndef CONFIG_GENERIC_IOMAP | 252 | #ifndef CONFIG_GENERIC_IOMAP |
240 | #define ioread8(addr) readb(addr) | ||
241 | #define ioread16(addr) readw(addr) | ||
242 | #define ioread16be(addr) __be16_to_cpu(__raw_readw(addr)) | ||
243 | #define ioread32(addr) readl(addr) | ||
244 | #define ioread32be(addr) __be32_to_cpu(__raw_readl(addr)) | ||
245 | |||
246 | #define iowrite8(v, addr) writeb((v), (addr)) | ||
247 | #define iowrite16(v, addr) writew((v), (addr)) | ||
248 | #define iowrite16be(v, addr) __raw_writew(__cpu_to_be16(v), addr) | ||
249 | #define iowrite32(v, addr) writel((v), (addr)) | ||
250 | #define iowrite32be(v, addr) __raw_writel(__cpu_to_be32(v), addr) | ||
251 | |||
252 | #define ioread8_rep(p, dst, count) \ | 253 | #define ioread8_rep(p, dst, count) \ |
253 | insb((unsigned long) (p), (dst), (count)) | 254 | insb((unsigned long) (p), (dst), (count)) |
254 | #define ioread16_rep(p, dst, count) \ | 255 | #define ioread16_rep(p, dst, count) \ |
@@ -264,20 +265,209 @@ static inline void outsl(unsigned long addr, const void *buffer, int count) | |||
264 | outsl((unsigned long) (p), (src), (count)) | 265 | outsl((unsigned long) (p), (src), (count)) |
265 | #endif /* CONFIG_GENERIC_IOMAP */ | 266 | #endif /* CONFIG_GENERIC_IOMAP */ |
266 | 267 | ||
268 | #ifndef PCI_IOBASE | ||
269 | #define PCI_IOBASE ((void __iomem *)0) | ||
270 | #endif | ||
271 | |||
267 | #ifndef IO_SPACE_LIMIT | 272 | #ifndef IO_SPACE_LIMIT |
268 | #define IO_SPACE_LIMIT 0xffff | 273 | #define IO_SPACE_LIMIT 0xffff |
269 | #endif | 274 | #endif |
270 | 275 | ||
276 | /* | ||
277 | * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be | ||
278 | * implemented on hardware that needs an additional delay for I/O accesses to | ||
279 | * take effect. | ||
280 | */ | ||
281 | |||
282 | #ifndef inb | ||
283 | #define inb inb | ||
284 | static inline u8 inb(unsigned long addr) | ||
285 | { | ||
286 | return readb(PCI_IOBASE + addr); | ||
287 | } | ||
288 | #endif | ||
289 | |||
290 | #ifndef inw | ||
291 | #define inw inw | ||
292 | static inline u16 inw(unsigned long addr) | ||
293 | { | ||
294 | return readw(PCI_IOBASE + addr); | ||
295 | } | ||
296 | #endif | ||
297 | |||
298 | #ifndef inl | ||
299 | #define inl inl | ||
300 | static inline u32 inl(unsigned long addr) | ||
301 | { | ||
302 | return readl(PCI_IOBASE + addr); | ||
303 | } | ||
304 | #endif | ||
305 | |||
306 | #ifndef outb | ||
307 | #define outb outb | ||
308 | static inline void outb(u8 value, unsigned long addr) | ||
309 | { | ||
310 | writeb(value, PCI_IOBASE + addr); | ||
311 | } | ||
312 | #endif | ||
313 | |||
314 | #ifndef outw | ||
315 | #define outw outw | ||
316 | static inline void outw(u16 value, unsigned long addr) | ||
317 | { | ||
318 | writew(value, PCI_IOBASE + addr); | ||
319 | } | ||
320 | #endif | ||
321 | |||
322 | #ifndef outl | ||
323 | #define outl outl | ||
324 | static inline void outl(u32 value, unsigned long addr) | ||
325 | { | ||
326 | writel(value, PCI_IOBASE + addr); | ||
327 | } | ||
328 | #endif | ||
329 | |||
330 | #ifndef inb_p | ||
331 | #define inb_p inb_p | ||
332 | static inline u8 inb_p(unsigned long addr) | ||
333 | { | ||
334 | return inb(addr); | ||
335 | } | ||
336 | #endif | ||
337 | |||
338 | #ifndef inw_p | ||
339 | #define inw_p inw_p | ||
340 | static inline u16 inw_p(unsigned long addr) | ||
341 | { | ||
342 | return inw(addr); | ||
343 | } | ||
344 | #endif | ||
345 | |||
346 | #ifndef inl_p | ||
347 | #define inl_p inl_p | ||
348 | static inline u32 inl_p(unsigned long addr) | ||
349 | { | ||
350 | return inl(addr); | ||
351 | } | ||
352 | #endif | ||
353 | |||
354 | #ifndef outb_p | ||
355 | #define outb_p outb_p | ||
356 | static inline void outb_p(u8 value, unsigned long addr) | ||
357 | { | ||
358 | outb(value, addr); | ||
359 | } | ||
360 | #endif | ||
361 | |||
362 | #ifndef outw_p | ||
363 | #define outw_p outw_p | ||
364 | static inline void outw_p(u16 value, unsigned long addr) | ||
365 | { | ||
366 | outw(value, addr); | ||
367 | } | ||
368 | #endif | ||
369 | |||
370 | #ifndef outl_p | ||
371 | #define outl_p outl_p | ||
372 | static inline void outl_p(u32 value, unsigned long addr) | ||
373 | { | ||
374 | outl(value, addr); | ||
375 | } | ||
376 | #endif | ||
377 | |||
378 | #ifndef CONFIG_GENERIC_IOMAP | ||
379 | #ifndef ioread8 | ||
380 | #define ioread8 ioread8 | ||
381 | static inline u8 ioread8(const volatile void __iomem *addr) | ||
382 | { | ||
383 | return readb(addr); | ||
384 | } | ||
385 | #endif | ||
386 | |||
387 | #ifndef ioread16 | ||
388 | #define ioread16 ioread16 | ||
389 | static inline u16 ioread16(const volatile void __iomem *addr) | ||
390 | { | ||
391 | return readw(addr); | ||
392 | } | ||
393 | #endif | ||
394 | |||
395 | #ifndef ioread32 | ||
396 | #define ioread32 ioread32 | ||
397 | static inline u32 ioread32(const volatile void __iomem *addr) | ||
398 | { | ||
399 | return readl(addr); | ||
400 | } | ||
401 | #endif | ||
402 | |||
403 | #ifndef iowrite8 | ||
404 | #define iowrite8 iowrite8 | ||
405 | static inline void iowrite8(u8 value, volatile void __iomem *addr) | ||
406 | { | ||
407 | writeb(value, addr); | ||
408 | } | ||
409 | #endif | ||
410 | |||
411 | #ifndef iowrite16 | ||
412 | #define iowrite16 iowrite16 | ||
413 | static inline void iowrite16(u16 value, volatile void __iomem *addr) | ||
414 | { | ||
415 | writew(value, addr); | ||
416 | } | ||
417 | #endif | ||
418 | |||
419 | #ifndef iowrite32 | ||
420 | #define iowrite32 iowrite32 | ||
421 | static inline void iowrite32(u32 value, volatile void __iomem *addr) | ||
422 | { | ||
423 | writel(value, addr); | ||
424 | } | ||
425 | #endif | ||
426 | |||
427 | #ifndef ioread16be | ||
428 | #define ioread16be ioread16be | ||
429 | static inline u16 ioread16be(const volatile void __iomem *addr) | ||
430 | { | ||
431 | return __be16_to_cpu(__raw_readw(addr)); | ||
432 | } | ||
433 | #endif | ||
434 | |||
435 | #ifndef ioread32be | ||
436 | #define ioread32be ioread32be | ||
437 | static inline u32 ioread32be(const volatile void __iomem *addr) | ||
438 | { | ||
439 | return __be32_to_cpu(__raw_readl(addr)); | ||
440 | } | ||
441 | #endif | ||
442 | |||
443 | #ifndef iowrite16be | ||
444 | #define iowrite16be iowrite16be | ||
445 | static inline void iowrite16be(u16 value, void volatile __iomem *addr) | ||
446 | { | ||
447 | __raw_writew(__cpu_to_be16(value), addr); | ||
448 | } | ||
449 | #endif | ||
450 | |||
451 | #ifndef iowrite32be | ||
452 | #define iowrite32be iowrite32be | ||
453 | static inline void iowrite32be(u32 value, volatile void __iomem *addr) | ||
454 | { | ||
455 | __raw_writel(__cpu_to_be32(value), addr); | ||
456 | } | ||
457 | #endif | ||
458 | #endif /* CONFIG_GENERIC_IOMAP */ | ||
459 | |||
271 | #ifdef __KERNEL__ | 460 | #ifdef __KERNEL__ |
272 | 461 | ||
273 | #include <linux/vmalloc.h> | 462 | #include <linux/vmalloc.h> |
274 | #define __io_virt(x) ((void __force *) (x)) | 463 | #define __io_virt(x) ((void __force *)(x)) |
275 | 464 | ||
276 | #ifndef CONFIG_GENERIC_IOMAP | 465 | #ifndef CONFIG_GENERIC_IOMAP |
277 | struct pci_dev; | 466 | struct pci_dev; |
278 | extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); | 467 | extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); |
279 | 468 | ||
280 | #ifndef pci_iounmap | 469 | #ifndef pci_iounmap |
470 | #define pci_iounmap pci_iounmap | ||
281 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) | 471 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) |
282 | { | 472 | { |
283 | } | 473 | } |
@@ -289,11 +479,15 @@ static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) | |||
289 | * These are pretty trivial | 479 | * These are pretty trivial |
290 | */ | 480 | */ |
291 | #ifndef virt_to_phys | 481 | #ifndef virt_to_phys |
482 | #define virt_to_phys virt_to_phys | ||
292 | static inline unsigned long virt_to_phys(volatile void *address) | 483 | static inline unsigned long virt_to_phys(volatile void *address) |
293 | { | 484 | { |
294 | return __pa((unsigned long)address); | 485 | return __pa((unsigned long)address); |
295 | } | 486 | } |
487 | #endif | ||
296 | 488 | ||
489 | #ifndef phys_to_virt | ||
490 | #define phys_to_virt phys_to_virt | ||
297 | static inline void *phys_to_virt(unsigned long address) | 491 | static inline void *phys_to_virt(unsigned long address) |
298 | { | 492 | { |
299 | return __va(address); | 493 | return __va(address); |
@@ -306,37 +500,65 @@ static inline void *phys_to_virt(unsigned long address) | |||
306 | * This implementation is for the no-MMU case only... if you have an MMU | 500 | * This implementation is for the no-MMU case only... if you have an MMU |
307 | * you'll need to provide your own definitions. | 501 | * you'll need to provide your own definitions. |
308 | */ | 502 | */ |
503 | |||
309 | #ifndef CONFIG_MMU | 504 | #ifndef CONFIG_MMU |
310 | static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size) | 505 | #ifndef ioremap |
506 | #define ioremap ioremap | ||
507 | static inline void __iomem *ioremap(phys_addr_t offset, size_t size) | ||
311 | { | 508 | { |
312 | return (void __iomem*) (unsigned long)offset; | 509 | return (void __iomem *)(unsigned long)offset; |
313 | } | 510 | } |
511 | #endif | ||
314 | 512 | ||
315 | #define __ioremap(offset, size, flags) ioremap(offset, size) | 513 | #ifndef __ioremap |
514 | #define __ioremap __ioremap | ||
515 | static inline void __iomem *__ioremap(phys_addr_t offset, size_t size, | ||
516 | unsigned long flags) | ||
517 | { | ||
518 | return ioremap(offset, size); | ||
519 | } | ||
520 | #endif | ||
316 | 521 | ||
317 | #ifndef ioremap_nocache | 522 | #ifndef ioremap_nocache |
318 | #define ioremap_nocache ioremap | 523 | #define ioremap_nocache ioremap_nocache |
524 | static inline void __iomem *ioremap_nocache(phys_addr_t offset, size_t size) | ||
525 | { | ||
526 | return ioremap(offset, size); | ||
527 | } | ||
319 | #endif | 528 | #endif |
320 | 529 | ||
321 | #ifndef ioremap_wc | 530 | #ifndef ioremap_wc |
322 | #define ioremap_wc ioremap_nocache | 531 | #define ioremap_wc ioremap_wc |
532 | static inline void __iomem *ioremap_wc(phys_addr_t offset, size_t size) | ||
533 | { | ||
534 | return ioremap_nocache(offset, size); | ||
535 | } | ||
323 | #endif | 536 | #endif |
324 | 537 | ||
538 | #ifndef iounmap | ||
539 | #define iounmap iounmap | ||
325 | static inline void iounmap(void __iomem *addr) | 540 | static inline void iounmap(void __iomem *addr) |
326 | { | 541 | { |
327 | } | 542 | } |
543 | #endif | ||
328 | #endif /* CONFIG_MMU */ | 544 | #endif /* CONFIG_MMU */ |
329 | 545 | ||
330 | #ifdef CONFIG_HAS_IOPORT_MAP | 546 | #ifdef CONFIG_HAS_IOPORT_MAP |
331 | #ifndef CONFIG_GENERIC_IOMAP | 547 | #ifndef CONFIG_GENERIC_IOMAP |
548 | #ifndef ioport_map | ||
549 | #define ioport_map ioport_map | ||
332 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) | 550 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) |
333 | { | 551 | { |
334 | return PCI_IOBASE + (port & IO_SPACE_LIMIT); | 552 | return PCI_IOBASE + (port & IO_SPACE_LIMIT); |
335 | } | 553 | } |
554 | #endif | ||
336 | 555 | ||
556 | #ifndef ioport_unmap | ||
557 | #define ioport_unmap ioport_unmap | ||
337 | static inline void ioport_unmap(void __iomem *p) | 558 | static inline void ioport_unmap(void __iomem *p) |
338 | { | 559 | { |
339 | } | 560 | } |
561 | #endif | ||
340 | #else /* CONFIG_GENERIC_IOMAP */ | 562 | #else /* CONFIG_GENERIC_IOMAP */ |
341 | extern void __iomem *ioport_map(unsigned long port, unsigned int nr); | 563 | extern void __iomem *ioport_map(unsigned long port, unsigned int nr); |
342 | extern void ioport_unmap(void __iomem *p); | 564 | extern void ioport_unmap(void __iomem *p); |
@@ -344,35 +566,68 @@ extern void ioport_unmap(void __iomem *p); | |||
344 | #endif /* CONFIG_HAS_IOPORT_MAP */ | 566 | #endif /* CONFIG_HAS_IOPORT_MAP */ |
345 | 567 | ||
346 | #ifndef xlate_dev_kmem_ptr | 568 | #ifndef xlate_dev_kmem_ptr |
347 | #define xlate_dev_kmem_ptr(p) p | 569 | #define xlate_dev_kmem_ptr xlate_dev_kmem_ptr |
570 | static inline void *xlate_dev_kmem_ptr(void *addr) | ||
571 | { | ||
572 | return addr; | ||
573 | } | ||
348 | #endif | 574 | #endif |
575 | |||
349 | #ifndef xlate_dev_mem_ptr | 576 | #ifndef xlate_dev_mem_ptr |
350 | #define xlate_dev_mem_ptr(p) __va(p) | 577 | #define xlate_dev_mem_ptr xlate_dev_mem_ptr |
578 | static inline void *xlate_dev_mem_ptr(phys_addr_t addr) | ||
579 | { | ||
580 | return __va(addr); | ||
581 | } | ||
582 | #endif | ||
583 | |||
584 | #ifndef unxlate_dev_mem_ptr | ||
585 | #define unxlate_dev_mem_ptr unxlate_dev_mem_ptr | ||
586 | static inline void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr) | ||
587 | { | ||
588 | } | ||
351 | #endif | 589 | #endif |
352 | 590 | ||
353 | #ifdef CONFIG_VIRT_TO_BUS | 591 | #ifdef CONFIG_VIRT_TO_BUS |
354 | #ifndef virt_to_bus | 592 | #ifndef virt_to_bus |
355 | static inline unsigned long virt_to_bus(volatile void *address) | 593 | static inline unsigned long virt_to_bus(void *address) |
356 | { | 594 | { |
357 | return ((unsigned long) address); | 595 | return (unsigned long)address; |
358 | } | 596 | } |
359 | 597 | ||
360 | static inline void *bus_to_virt(unsigned long address) | 598 | static inline void *bus_to_virt(unsigned long address) |
361 | { | 599 | { |
362 | return (void *) address; | 600 | return (void *)address; |
363 | } | 601 | } |
364 | #endif | 602 | #endif |
365 | #endif | 603 | #endif |
366 | 604 | ||
367 | #ifndef memset_io | 605 | #ifndef memset_io |
368 | #define memset_io(a, b, c) memset(__io_virt(a), (b), (c)) | 606 | #define memset_io memset_io |
607 | static inline void memset_io(volatile void __iomem *addr, int value, | ||
608 | size_t size) | ||
609 | { | ||
610 | memset(__io_virt(addr), value, size); | ||
611 | } | ||
369 | #endif | 612 | #endif |
370 | 613 | ||
371 | #ifndef memcpy_fromio | 614 | #ifndef memcpy_fromio |
372 | #define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c)) | 615 | #define memcpy_fromio memcpy_fromio |
616 | static inline void memcpy_fromio(void *buffer, | ||
617 | const volatile void __iomem *addr, | ||
618 | size_t size) | ||
619 | { | ||
620 | memcpy(buffer, __io_virt(addr), size); | ||
621 | } | ||
373 | #endif | 622 | #endif |
623 | |||
374 | #ifndef memcpy_toio | 624 | #ifndef memcpy_toio |
375 | #define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c)) | 625 | #define memcpy_toio memcpy_toio |
626 | static inline void memcpy_toio(volatile void __iomem *addr, const void *buffer, | ||
627 | size_t size) | ||
628 | { | ||
629 | memcpy(__io_virt(addr), buffer, size); | ||
630 | } | ||
376 | #endif | 631 | #endif |
377 | 632 | ||
378 | #endif /* __KERNEL__ */ | 633 | #endif /* __KERNEL__ */ |