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-rw-r--r--arch/arm/mach-at91rm9200/generic.h7
-rw-r--r--arch/arm/mach-at91rm9200/pm.c225
-rw-r--r--include/asm-arm/arch-at91rm9200/gpio.h5
3 files changed, 237 insertions, 0 deletions
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index 9bd541eba0a0..f0d969d7d874 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -16,3 +16,10 @@ extern struct sys_timer at91rm9200_timer;
16extern void __init at91rm9200_map_io(void); 16extern void __init at91rm9200_map_io(void);
17 17
18extern int __init at91_clock_init(unsigned long main_clock); 18extern int __init at91_clock_init(unsigned long main_clock);
19struct device;
20extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
21
22 /* Power Management */
23extern void at91_irq_suspend(void);
24extern void at91_irq_resume(void);
25
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
new file mode 100644
index 000000000000..47e5480feb7e
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -0,0 +1,225 @@
1/*
2 * arch/arm/mach-at91rm9200/pm.c
3 * AT91 Power Management
4 *
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <linux/pm.h>
14#include <linux/sched.h>
15#include <linux/proc_fs.h>
16#include <linux/pm.h>
17#include <linux/interrupt.h>
18#include <linux/sysfs.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21
22#include <asm/io.h>
23#include <asm/irq.h>
24#include <asm/atomic.h>
25#include <asm/mach/time.h>
26#include <asm/mach/irq.h>
27#include <asm/mach-types.h>
28
29#include <asm/arch/gpio.h>
30
31#include "generic.h"
32
33
34static int at91_pm_valid_state(suspend_state_t state)
35{
36 switch (state) {
37 case PM_SUSPEND_ON:
38 case PM_SUSPEND_STANDBY:
39 case PM_SUSPEND_MEM:
40 return 1;
41
42 default:
43 return 0;
44 }
45}
46
47
48static suspend_state_t target_state;
49
50/*
51 * Called after processes are frozen, but before we shutdown devices.
52 */
53static int at91_pm_prepare(suspend_state_t state)
54{
55 target_state = state;
56 return 0;
57}
58
59/*
60 * Verify that all the clocks are correct before entering
61 * slow-clock mode.
62 */
63static int at91_pm_verify_clocks(void)
64{
65 unsigned long scsr;
66 int i;
67
68 scsr = at91_sys_read(AT91_PMC_SCSR);
69
70 /* USB must not be using PLLB */
71 if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) {
72 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
73 return 0;
74 }
75
76#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
77 /* PCK0..PCK3 must be disabled, or configured to use clk32k */
78 for (i = 0; i < 4; i++) {
79 u32 css;
80
81 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
82 continue;
83
84 css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
85 if (css != AT91_PMC_CSS_SLOW) {
86 pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
87 return 0;
88 }
89 }
90#endif
91
92 return 1;
93}
94
95/*
96 * Call this from platform driver suspend() to see how deeply to suspend.
97 * For example, some controllers (like OHCI) need one of the PLL clocks
98 * in order to act as a wakeup source, and those are not available when
99 * going into slow clock mode.
100 *
101 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
102 * the very same problem (but not using at91 main_clk), and it'd be better
103 * to add one generic API rather than lots of platform-specific ones.
104 */
105int at91_suspend_entering_slow_clock(void)
106{
107 return (target_state == PM_SUSPEND_MEM);
108}
109EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
110
111
112static void (*slow_clock)(void);
113
114
115
116static int at91_pm_enter(suspend_state_t state)
117{
118 at91_gpio_suspend();
119 at91_irq_suspend();
120
121 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
122 /* remember all the always-wake irqs */
123 (at91_sys_read(AT91_PMC_PCSR)
124 | (1 << AT91_ID_FIQ)
125 | (1 << AT91_ID_SYS)
126 | (1 << AT91_ID_IRQ0)
127 | (1 << AT91_ID_IRQ1)
128 | (1 << AT91_ID_IRQ2)
129 | (1 << AT91_ID_IRQ3)
130 | (1 << AT91_ID_IRQ4)
131 | (1 << AT91_ID_IRQ5)
132 | (1 << AT91_ID_IRQ6))
133 & at91_sys_read(AT91_AIC_IMR),
134 state);
135
136 switch (state) {
137 /*
138 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
139 * drivers must suspend more deeply: only the master clock
140 * controller may be using the main oscillator.
141 */
142 case PM_SUSPEND_MEM:
143 /*
144 * Ensure that clocks are in a valid state.
145 */
146 if (!at91_pm_verify_clocks())
147 goto error;
148
149 /*
150 * Enter slow clock mode by switching over to clk32k and
151 * turning off the main oscillator; reverse on wakeup.
152 */
153 if (slow_clock) {
154 slow_clock();
155 break;
156 } else {
157 /* DEVELOPMENT ONLY */
158 pr_info("AT91: PM - no slow clock mode yet ...\n");
159 /* FALLTHROUGH leaving master clock alone */
160 }
161
162 /*
163 * STANDBY mode has *all* drivers suspended; ignores irqs not
164 * marked as 'wakeup' event sources; and reduces DRAM power.
165 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
166 * nothing fancy done with main or cpu clocks.
167 */
168 case PM_SUSPEND_STANDBY:
169 /*
170 * NOTE: the Wait-for-Interrupt instruction needs to be
171 * in icache so the SDRAM stays in self-refresh mode until
172 * the wakeup IRQ occurs.
173 */
174 asm("b 1f; .align 5; 1:");
175 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
176 at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */
177 /* fall though to next state */
178
179 case PM_SUSPEND_ON:
180 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
181 break;
182
183 default:
184 pr_debug("AT91: PM - bogus suspend state %d\n", state);
185 goto error;
186 }
187
188 pr_debug("AT91: PM - wakeup %08x\n",
189 at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
190
191error:
192 target_state = PM_SUSPEND_ON;
193 at91_irq_resume();
194 at91_gpio_resume();
195 return 0;
196}
197
198
199static struct pm_ops at91_pm_ops ={
200 .pm_disk_mode = 0,
201 .valid = at91_pm_valid_state,
202 .prepare = at91_pm_prepare,
203 .enter = at91_pm_enter,
204};
205
206static int __init at91_pm_init(void)
207{
208 printk("AT91: Power Management\n");
209
210#ifdef CONFIG_AT91_PM_SLOW_CLOCK
211 /* REVISIT allocations of SRAM should be dynamically managed.
212 * FIQ handlers and other components will want SRAM/TCM too...
213 */
214 slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
215 memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
216#endif
217
218 /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */
219 at91_sys_write(AT91_SDRAMC_LPR, 0);
220
221 pm_set_ops(&at91_pm_ops);
222
223 return 0;
224}
225arch_initcall(at91_pm_init);
diff --git a/include/asm-arm/arch-at91rm9200/gpio.h b/include/asm-arm/arch-at91rm9200/gpio.h
index 6176ab2dc417..dbde1baaf251 100644
--- a/include/asm-arm/arch-at91rm9200/gpio.h
+++ b/include/asm-arm/arch-at91rm9200/gpio.h
@@ -13,6 +13,8 @@
13#ifndef __ASM_ARCH_AT91RM9200_GPIO_H 13#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
14#define __ASM_ARCH_AT91RM9200_GPIO_H 14#define __ASM_ARCH_AT91RM9200_GPIO_H
15 15
16#include <asm/irq.h>
17
16#define PIN_BASE NR_AIC_IRQS 18#define PIN_BASE NR_AIC_IRQS
17 19
18#define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */ 20#define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */
@@ -188,6 +190,9 @@ extern int at91_set_multi_drive(unsigned pin, int is_on);
188/* callable at any time */ 190/* callable at any time */
189extern int at91_set_gpio_value(unsigned pin, int value); 191extern int at91_set_gpio_value(unsigned pin, int value);
190extern int at91_get_gpio_value(unsigned pin); 192extern int at91_get_gpio_value(unsigned pin);
193
194extern void at91_gpio_suspend(void);
195extern void at91_gpio_resume(void);
191#endif 196#endif
192 197
193#endif 198#endif