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-rw-r--r--Documentation/devicetree/bindings/arm/l2cc.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
index f50e021a0998..7ca52161e7ab 100644
--- a/Documentation/devicetree/bindings/arm/l2cc.txt
+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
@@ -28,6 +28,7 @@ Optional properties:
28- arm,filter-ranges : <start length> Starting address and length of window to 28- arm,filter-ranges : <start length> Starting address and length of window to
29 filter. Addresses in the filter window are directed to the M1 port. Other 29 filter. Addresses in the filter window are directed to the M1 port. Other
30 addresses will go to the M0 port. 30 addresses will go to the M0 port.
31- interrupts : 1 combined interrupt.
31 32
32Example: 33Example:
33 34
@@ -39,4 +40,5 @@ L2: cache-controller {
39 arm,filter-latency = <0x80000000 0x8000000>; 40 arm,filter-latency = <0x80000000 0x8000000>;
40 cache-unified; 41 cache-unified;
41 cache-level = <2>; 42 cache-level = <2>;
43 interrupts = <45>;
42}; 44};