diff options
| -rw-r--r-- | drivers/tty/serial/omap-serial.c | 35 |
1 files changed, 4 insertions, 31 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index ca54f038ab45..1c2426931484 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c | |||
| @@ -46,18 +46,6 @@ | |||
| 46 | 46 | ||
| 47 | #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ | 47 | #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ |
| 48 | 48 | ||
| 49 | /* SCR register bitmasks */ | ||
| 50 | #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) | ||
| 51 | #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) | ||
| 52 | |||
| 53 | /* FCR register bitmasks */ | ||
| 54 | #define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 | ||
| 55 | #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) | ||
| 56 | #define OMAP_UART_FCR_TX_FIFO_TRIG_SHIFT 4 | ||
| 57 | |||
| 58 | /* TLR register bitmasks */ | ||
| 59 | #define OMAP_UART_TLR_TX_FIFO_TRIG_DMA_SHIFT 0 | ||
| 60 | |||
| 61 | static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; | 49 | static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; |
| 62 | 50 | ||
| 63 | /* Forward declaration of functions */ | 51 | /* Forward declaration of functions */ |
| @@ -706,7 +694,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 706 | unsigned char efr = 0; | 694 | unsigned char efr = 0; |
| 707 | unsigned long flags = 0; | 695 | unsigned long flags = 0; |
| 708 | unsigned int baud, quot; | 696 | unsigned int baud, quot; |
| 709 | u32 tlr; | ||
| 710 | 697 | ||
| 711 | switch (termios->c_cflag & CSIZE) { | 698 | switch (termios->c_cflag & CSIZE) { |
| 712 | case CS5: | 699 | case CS5: |
| @@ -824,28 +811,14 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 824 | up->mcr = serial_in(up, UART_MCR); | 811 | up->mcr = serial_in(up, UART_MCR); |
| 825 | serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); | 812 | serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); |
| 826 | /* FIFO ENABLE, DMA MODE */ | 813 | /* FIFO ENABLE, DMA MODE */ |
| 827 | 814 | serial_out(up, UART_FCR, up->fcr); | |
| 828 | up->scr |= OMAP_UART_SCR_TX_TRIG_GRANU1_MASK; | 815 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
| 829 | up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; | ||
| 830 | 816 | ||
| 831 | if (up->use_dma) { | 817 | if (up->use_dma) { |
| 832 | tlr = 0; | 818 | serial_out(up, UART_TI752_TLR, 0); |
| 833 | } else { | 819 | up->scr |= (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8); |
| 834 | up->scr &= ~OMAP_UART_SCR_TX_EMPTY; | ||
| 835 | |||
| 836 | /* Set receive FIFO threshold to 1 */ | ||
| 837 | up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; | ||
| 838 | up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); | ||
| 839 | |||
| 840 | /* Set TX FIFO threshold to "63" (actually 1) */ | ||
| 841 | up->fcr |= (0x3 << OMAP_UART_FCR_TX_FIFO_TRIG_SHIFT); | ||
| 842 | tlr = (0xf << OMAP_UART_TLR_TX_FIFO_TRIG_DMA_SHIFT); | ||
| 843 | } | 820 | } |
| 844 | 821 | ||
| 845 | serial_out(up, UART_TI752_TLR, tlr); | ||
| 846 | serial_out(up, UART_FCR, up->fcr); | ||
| 847 | serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); | ||
| 848 | |||
| 849 | serial_out(up, UART_OMAP_SCR, up->scr); | 822 | serial_out(up, UART_OMAP_SCR, up->scr); |
| 850 | 823 | ||
| 851 | serial_out(up, UART_EFR, up->efr); | 824 | serial_out(up, UART_EFR, up->efr); |
