diff options
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c index 5ad76f74416f..9f4cc2f31994 100644 --- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c +++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c | |||
| @@ -44,21 +44,24 @@ nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng, | |||
| 44 | struct nouveau_dmaobj *dmaobj, | 44 | struct nouveau_dmaobj *dmaobj, |
| 45 | struct nouveau_gpuobj **pgpuobj) | 45 | struct nouveau_gpuobj **pgpuobj) |
| 46 | { | 46 | { |
| 47 | struct nv04_vmmgr_priv *vmm = nv04_vmmgr(dmaeng); | ||
| 47 | struct nouveau_gpuobj *gpuobj; | 48 | struct nouveau_gpuobj *gpuobj; |
| 48 | u32 flags0 = nv_mclass(dmaobj); | 49 | u32 flags0 = nv_mclass(dmaobj); |
| 49 | u32 flags2 = 0x00000000; | 50 | u32 flags2 = 0x00000000; |
| 50 | u32 offset = (dmaobj->start & 0xfffff000); | 51 | u64 offset = dmaobj->start & 0xfffff000; |
| 51 | u32 adjust = (dmaobj->start & 0x00000fff); | 52 | u64 adjust = dmaobj->start & 0x00000fff; |
| 52 | u32 length = dmaobj->limit - dmaobj->start; | 53 | u32 length = dmaobj->limit - dmaobj->start; |
| 53 | int ret; | 54 | int ret; |
| 54 | 55 | ||
| 55 | if (dmaobj->target == NV_MEM_TARGET_VM) { | 56 | if (dmaobj->target == NV_MEM_TARGET_VM) { |
| 56 | gpuobj = nv04_vmmgr(dmaeng)->vm->pgt[0].obj[0]; | 57 | if (nv_object(vmm)->oclass == &nv04_vmmgr_oclass) { |
| 57 | if (dmaobj->start == 0) | 58 | struct nouveau_gpuobj *pgt = vmm->vm->pgt[0].obj[0]; |
| 58 | return nouveau_gpuobj_dup(parent, gpuobj, pgpuobj); | 59 | if (!dmaobj->start) |
| 60 | return nouveau_gpuobj_dup(parent, pgt, pgpuobj); | ||
| 61 | offset = nv_ro32(pgt, 8 + (offset >> 10)); | ||
| 62 | offset &= 0xfffff000; | ||
| 63 | } | ||
| 59 | 64 | ||
| 60 | offset = nv_ro32(gpuobj, 8 + (offset >> 10)); | ||
| 61 | offset &= 0xfffff000; | ||
| 62 | dmaobj->target = NV_MEM_TARGET_PCI; | 65 | dmaobj->target = NV_MEM_TARGET_PCI; |
| 63 | dmaobj->access = NV_MEM_ACCESS_RW; | 66 | dmaobj->access = NV_MEM_ACCESS_RW; |
| 64 | } | 67 | } |
