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-rw-r--r--arch/arm/boot/dts/exynos3250-monk.dts40
-rw-r--r--arch/arm/boot/dts/exynos3250-rinato.dts40
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi74
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi109
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi8
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts211
-rw-r--r--arch/arm/boot/dts/exynos4415.dtsi27
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi2
8 files changed, 458 insertions, 53 deletions
diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
index d9a6dd525791..1d483c1c8b48 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -437,6 +437,46 @@
437 status = "okay"; 437 status = "okay";
438}; 438};
439 439
440&ppmu_dmc0 {
441 status = "okay";
442
443 events {
444 ppmu_dmc0_3: ppmu-event3-dmc0 {
445 event-name = "ppmu-event3-dmc0";
446 };
447 };
448};
449
450&ppmu_dmc1 {
451 status = "okay";
452
453 events {
454 ppmu_dmc1_3: ppmu-event3-dmc1 {
455 event-name = "ppmu-event3-dmc1";
456 };
457 };
458};
459
460&ppmu_leftbus {
461 status = "okay";
462
463 events {
464 ppmu_leftbus_3: ppmu-event3-leftbus {
465 event-name = "ppmu-event3-leftbus";
466 };
467 };
468};
469
470&ppmu_rightbus {
471 status = "okay";
472
473 events {
474 ppmu_rightbus_3: ppmu-event3-rightbus {
475 event-name = "ppmu-event3-rightbus";
476 };
477 };
478};
479
440&xusbxti { 480&xusbxti {
441 clock-frequency = <24000000>; 481 clock-frequency = <24000000>;
442}; 482};
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index af7589efa567..0b9906880c0c 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -610,6 +610,46 @@
610 status = "okay"; 610 status = "okay";
611}; 611};
612 612
613&ppmu_dmc0 {
614 status = "okay";
615
616 events {
617 ppmu_dmc0_3: ppmu-event3-dmc0 {
618 event-name = "ppmu-event3-dmc0";
619 };
620 };
621};
622
623&ppmu_dmc1 {
624 status = "okay";
625
626 events {
627 ppmu_dmc1_3: ppmu-event3-dmc1 {
628 event-name = "ppmu-event3-dmc1";
629 };
630 };
631};
632
633&ppmu_leftbus {
634 status = "okay";
635
636 events {
637 ppmu_leftbus_3: ppmu-event3-leftbus {
638 event-name = "ppmu-event3-leftbus";
639 };
640 };
641};
642
643&ppmu_rightbus {
644 status = "okay";
645
646 events {
647 ppmu_rightbus_3: ppmu-event3-rightbus {
648 event-name = "ppmu-event3-rightbus";
649 };
650 };
651};
652
613&xusbxti { 653&xusbxti {
614 clock-frequency = <24000000>; 654 clock-frequency = <24000000>;
615}; 655};
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index acdf34401015..277b48b0b6f9 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -541,6 +541,80 @@
541 compatible = "arm,cortex-a7-pmu"; 541 compatible = "arm,cortex-a7-pmu";
542 interrupts = <0 18 0>, <0 19 0>; 542 interrupts = <0 18 0>, <0 19 0>;
543 }; 543 };
544
545 ppmu_dmc0: ppmu_dmc0@106a0000 {
546 compatible = "samsung,exynos-ppmu";
547 reg = <0x106a0000 0x2000>;
548 status = "disabled";
549 };
550
551 ppmu_dmc1: ppmu_dmc1@106b0000 {
552 compatible = "samsung,exynos-ppmu";
553 reg = <0x106b0000 0x2000>;
554 status = "disabled";
555 };
556
557 ppmu_cpu: ppmu_cpu@106c0000 {
558 compatible = "samsung,exynos-ppmu";
559 reg = <0x106c0000 0x2000>;
560 status = "disabled";
561 };
562
563 ppmu_rightbus: ppmu_rightbus@112a0000 {
564 compatible = "samsung,exynos-ppmu";
565 reg = <0x112a0000 0x2000>;
566 clocks = <&cmu CLK_PPMURIGHT>;
567 clock-names = "ppmu";
568 status = "disabled";
569 };
570
571 ppmu_leftbus: ppmu_leftbus0@116a0000 {
572 compatible = "samsung,exynos-ppmu";
573 reg = <0x116a0000 0x2000>;
574 clocks = <&cmu CLK_PPMULEFT>;
575 clock-names = "ppmu";
576 status = "disabled";
577 };
578
579 ppmu_camif: ppmu_camif@11ac0000 {
580 compatible = "samsung,exynos-ppmu";
581 reg = <0x11ac0000 0x2000>;
582 clocks = <&cmu CLK_PPMUCAMIF>;
583 clock-names = "ppmu";
584 status = "disabled";
585 };
586
587 ppmu_lcd0: ppmu_lcd0@11e40000 {
588 compatible = "samsung,exynos-ppmu";
589 reg = <0x11e40000 0x2000>;
590 clocks = <&cmu CLK_PPMULCD0>;
591 clock-names = "ppmu";
592 status = "disabled";
593 };
594
595 ppmu_fsys: ppmu_fsys@12630000 {
596 compatible = "samsung,exynos-ppmu";
597 reg = <0x12630000 0x2000>;
598 clocks = <&cmu CLK_PPMUFILE>;
599 clock-names = "ppmu";
600 status = "disabled";
601 };
602
603 ppmu_g3d: ppmu_g3d@13220000 {
604 compatible = "samsung,exynos-ppmu";
605 reg = <0x13220000 0x2000>;
606 clocks = <&cmu CLK_PPMUG3D>;
607 clock-names = "ppmu";
608 status = "disabled";
609 };
610
611 ppmu_mfc: ppmu_mfc@13660000 {
612 compatible = "samsung,exynos-ppmu";
613 reg = <0x13660000 0x2000>;
614 clocks = <&cmu CLK_PPMUMFC_L>;
615 clock-names = "ppmu";
616 status = "disabled";
617 };
544 }; 618 };
545}; 619};
546 620
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index c5dc2efb99ed..d1759bf5202f 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -76,6 +76,7 @@
76 compatible = "samsung,s5pv210-mipi-video-phy"; 76 compatible = "samsung,s5pv210-mipi-video-phy";
77 reg = <0x10020710 8>; 77 reg = <0x10020710 8>;
78 #phy-cells = <1>; 78 #phy-cells = <1>;
79 syscon = <&pmu_system_controller>;
79 }; 80 };
80 81
81 pd_mfc: mfc-power-domain@10023C40 { 82 pd_mfc: mfc-power-domain@10023C40 {
@@ -652,4 +653,112 @@
652 samsung,sysreg = <&sys_reg>; 653 samsung,sysreg = <&sys_reg>;
653 status = "disabled"; 654 status = "disabled";
654 }; 655 };
656
657 ppmu_dmc0: ppmu_dmc0@106a0000 {
658 compatible = "samsung,exynos-ppmu";
659 reg = <0x106a0000 0x2000>;
660 clocks = <&clock CLK_PPMUDMC0>;
661 clock-names = "ppmu";
662 status = "disabled";
663 };
664
665 ppmu_dmc1: ppmu_dmc1@106b0000 {
666 compatible = "samsung,exynos-ppmu";
667 reg = <0x106b0000 0x2000>;
668 clocks = <&clock CLK_PPMUDMC1>;
669 clock-names = "ppmu";
670 status = "disabled";
671 };
672
673 ppmu_cpu: ppmu_cpu@106c0000 {
674 compatible = "samsung,exynos-ppmu";
675 reg = <0x106c0000 0x2000>;
676 clocks = <&clock CLK_PPMUCPU>;
677 clock-names = "ppmu";
678 status = "disabled";
679 };
680
681 ppmu_acp: ppmu_acp@10ae0000 {
682 compatible = "samsung,exynos-ppmu";
683 reg = <0x106e0000 0x2000>;
684 status = "disabled";
685 };
686
687 ppmu_rightbus: ppmu_rightbus@112a0000 {
688 compatible = "samsung,exynos-ppmu";
689 reg = <0x112a0000 0x2000>;
690 clocks = <&clock CLK_PPMURIGHT>;
691 clock-names = "ppmu";
692 status = "disabled";
693 };
694
695 ppmu_leftbus: ppmu_leftbus0@116a0000 {
696 compatible = "samsung,exynos-ppmu";
697 reg = <0x116a0000 0x2000>;
698 clocks = <&clock CLK_PPMULEFT>;
699 clock-names = "ppmu";
700 status = "disabled";
701 };
702
703 ppmu_camif: ppmu_camif@11ac0000 {
704 compatible = "samsung,exynos-ppmu";
705 reg = <0x11ac0000 0x2000>;
706 clocks = <&clock CLK_PPMUCAMIF>;
707 clock-names = "ppmu";
708 status = "disabled";
709 };
710
711 ppmu_lcd0: ppmu_lcd0@11e40000 {
712 compatible = "samsung,exynos-ppmu";
713 reg = <0x11e40000 0x2000>;
714 clocks = <&clock CLK_PPMULCD0>;
715 clock-names = "ppmu";
716 status = "disabled";
717 };
718
719 ppmu_fsys: ppmu_g3d@12630000 {
720 compatible = "samsung,exynos-ppmu";
721 reg = <0x12630000 0x2000>;
722 status = "disabled";
723 };
724
725 ppmu_image: ppmu_image@12aa0000 {
726 compatible = "samsung,exynos-ppmu";
727 reg = <0x12aa0000 0x2000>;
728 clocks = <&clock CLK_PPMUIMAGE>;
729 clock-names = "ppmu";
730 status = "disabled";
731 };
732
733 ppmu_tv: ppmu_tv@12e40000 {
734 compatible = "samsung,exynos-ppmu";
735 reg = <0x12e40000 0x2000>;
736 clocks = <&clock CLK_PPMUTV>;
737 clock-names = "ppmu";
738 status = "disabled";
739 };
740
741 ppmu_g3d: ppmu_g3d@13220000 {
742 compatible = "samsung,exynos-ppmu";
743 reg = <0x13220000 0x2000>;
744 clocks = <&clock CLK_PPMUG3D>;
745 clock-names = "ppmu";
746 status = "disabled";
747 };
748
749 ppmu_mfc_left: ppmu_mfc_left@13660000 {
750 compatible = "samsung,exynos-ppmu";
751 reg = <0x13660000 0x2000>;
752 clocks = <&clock CLK_PPMUMFC_L>;
753 clock-names = "ppmu";
754 status = "disabled";
755 };
756
757 ppmu_mfc_right: ppmu_mfc_right@13670000 {
758 compatible = "samsung,exynos-ppmu";
759 reg = <0x13670000 0x2000>;
760 clocks = <&clock CLK_PPMUMFC_R>;
761 clock-names = "ppmu";
762 status = "disabled";
763 };
655}; 764};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 6728aaa2af9d..7c15880bc8ba 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -193,4 +193,12 @@
193 samsung,lcd-wb; 193 samsung,lcd-wb;
194 }; 194 };
195 }; 195 };
196
197 ppmu_lcd1: ppmu_lcd1@12240000 {
198 compatible = "samsung,exynos-ppmu";
199 reg = <0x12240000 0x2000>;
200 clocks = <&clock CLK_PPMULCD1>;
201 clock-names = "ppmu";
202 status = "disabled";
203 };
196}; 204};
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index c81c4769411d..d3b3f4f4653e 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -15,6 +15,7 @@
15/dts-v1/; 15/dts-v1/;
16#include "exynos4412.dtsi" 16#include "exynos4412.dtsi"
17#include <dt-bindings/gpio/gpio.h> 17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/interrupt-controller/irq.h>
18 19
19/ { 20/ {
20 model = "Samsung Trats 2 based on Exynos4412"; 21 model = "Samsung Trats 2 based on Exynos4412";
@@ -24,6 +25,7 @@
24 i2c9 = &i2c_ak8975; 25 i2c9 = &i2c_ak8975;
25 i2c10 = &i2c_cm36651; 26 i2c10 = &i2c_cm36651;
26 i2c11 = &i2c_max77693; 27 i2c11 = &i2c_max77693;
28 i2c12 = &i2c_max77693_fuel;
27 }; 29 };
28 30
29 memory { 31 memory {
@@ -56,15 +58,6 @@
56 #address-cells = <1>; 58 #address-cells = <1>;
57 #size-cells = <0>; 59 #size-cells = <0>;
58 60
59 vemmc_reg: regulator-0 {
60 compatible = "regulator-fixed";
61 regulator-name = "VMEM_VDD_2.8V";
62 regulator-min-microvolt = <2800000>;
63 regulator-max-microvolt = <2800000>;
64 gpio = <&gpk0 2 0>;
65 enable-active-high;
66 };
67
68 cam_io_reg: voltage-regulator-1 { 61 cam_io_reg: voltage-regulator-1 {
69 compatible = "regulator-fixed"; 62 compatible = "regulator-fixed";
70 regulator-name = "CAM_SENSOR_A"; 63 regulator-name = "CAM_SENSOR_A";
@@ -92,16 +85,6 @@
92 enable-active-high; 85 enable-active-high;
93 }; 86 };
94 87
95 cam_isp_core_reg: voltage-regulator-4 {
96 compatible = "regulator-fixed";
97 regulator-name = "CAM_ISP_CORE_1.2V_EN";
98 regulator-min-microvolt = <1200000>;
99 regulator-max-microvolt = <1200000>;
100 gpio = <&gpm0 3 0>;
101 enable-active-high;
102 regulator-always-on;
103 };
104
105 ps_als_reg: voltage-regulator-5 { 88 ps_als_reg: voltage-regulator-5 {
106 compatible = "regulator-fixed"; 89 compatible = "regulator-fixed";
107 regulator-name = "LED_A_3.0V"; 90 regulator-name = "LED_A_3.0V";
@@ -203,6 +186,25 @@
203 }; 186 };
204 }; 187 };
205 188
189 i2c@138A0000 {
190 samsung,i2c-sda-delay = <100>;
191 samsung,i2c-slave-addr = <0x10>;
192 samsung,i2c-max-bus-freq = <100000>;
193 pinctrl-0 = <&i2c4_bus>;
194 pinctrl-names = "default";
195 status = "okay";
196
197 wm1811: wm1811@1a {
198 compatible = "wlf,wm1811";
199 reg = <0x1a>;
200 clocks = <&pmu_system_controller 0>;
201 clock-names = "MCLK1";
202 DCVDD-supply = <&ldo3_reg>;
203 DBVDD1-supply = <&ldo3_reg>;
204 wlf,ldo1ena = <&gpj0 4 0>;
205 };
206 };
207
206 i2c@138D0000 { 208 i2c@138D0000 {
207 samsung,i2c-sda-delay = <100>; 209 samsung,i2c-sda-delay = <100>;
208 samsung,i2c-slave-addr = <0x10>; 210 samsung,i2c-slave-addr = <0x10>;
@@ -225,7 +227,6 @@
225 regulator-min-microvolt = <1000000>; 227 regulator-min-microvolt = <1000000>;
226 regulator-max-microvolt = <1000000>; 228 regulator-max-microvolt = <1000000>;
227 regulator-always-on; 229 regulator-always-on;
228 regulator-mem-on;
229 }; 230 };
230 231
231 ldo2_reg: ldo2 { 232 ldo2_reg: ldo2 {
@@ -234,7 +235,9 @@
234 regulator-min-microvolt = <1200000>; 235 regulator-min-microvolt = <1200000>;
235 regulator-max-microvolt = <1200000>; 236 regulator-max-microvolt = <1200000>;
236 regulator-always-on; 237 regulator-always-on;
237 regulator-mem-on; 238 regulator-state-mem {
239 regulator-on-in-suspend;
240 };
238 }; 241 };
239 242
240 ldo3_reg: ldo3 { 243 ldo3_reg: ldo3 {
@@ -243,7 +246,6 @@
243 regulator-min-microvolt = <1800000>; 246 regulator-min-microvolt = <1800000>;
244 regulator-max-microvolt = <1800000>; 247 regulator-max-microvolt = <1800000>;
245 regulator-always-on; 248 regulator-always-on;
246 regulator-mem-on;
247 }; 249 };
248 250
249 ldo4_reg: ldo4 { 251 ldo4_reg: ldo4 {
@@ -252,7 +254,6 @@
252 regulator-min-microvolt = <2800000>; 254 regulator-min-microvolt = <2800000>;
253 regulator-max-microvolt = <2800000>; 255 regulator-max-microvolt = <2800000>;
254 regulator-always-on; 256 regulator-always-on;
255 regulator-mem-on;
256 }; 257 };
257 258
258 ldo5_reg: ldo5 { 259 ldo5_reg: ldo5 {
@@ -261,7 +262,6 @@
261 regulator-min-microvolt = <1800000>; 262 regulator-min-microvolt = <1800000>;
262 regulator-max-microvolt = <1800000>; 263 regulator-max-microvolt = <1800000>;
263 regulator-always-on; 264 regulator-always-on;
264 regulator-mem-on;
265 }; 265 };
266 266
267 ldo6_reg: ldo6 { 267 ldo6_reg: ldo6 {
@@ -270,7 +270,9 @@
270 regulator-min-microvolt = <1000000>; 270 regulator-min-microvolt = <1000000>;
271 regulator-max-microvolt = <1000000>; 271 regulator-max-microvolt = <1000000>;
272 regulator-always-on; 272 regulator-always-on;
273 regulator-mem-on; 273 regulator-state-mem {
274 regulator-on-in-suspend;
275 };
274 }; 276 };
275 277
276 ldo7_reg: ldo7 { 278 ldo7_reg: ldo7 {
@@ -279,7 +281,9 @@
279 regulator-min-microvolt = <1000000>; 281 regulator-min-microvolt = <1000000>;
280 regulator-max-microvolt = <1000000>; 282 regulator-max-microvolt = <1000000>;
281 regulator-always-on; 283 regulator-always-on;
282 regulator-mem-on; 284 regulator-state-mem {
285 regulator-on-in-suspend;
286 };
283 }; 287 };
284 288
285 ldo8_reg: ldo8 { 289 ldo8_reg: ldo8 {
@@ -287,7 +291,9 @@
287 regulator-name = "VMIPI_1.0V"; 291 regulator-name = "VMIPI_1.0V";
288 regulator-min-microvolt = <1000000>; 292 regulator-min-microvolt = <1000000>;
289 regulator-max-microvolt = <1000000>; 293 regulator-max-microvolt = <1000000>;
290 regulator-mem-off; 294 regulator-state-mem {
295 regulator-off-in-suspend;
296 };
291 }; 297 };
292 298
293 ldo9_reg: ldo9 { 299 ldo9_reg: ldo9 {
@@ -295,7 +301,6 @@
295 regulator-name = "CAM_ISP_MIPI_1.2V"; 301 regulator-name = "CAM_ISP_MIPI_1.2V";
296 regulator-min-microvolt = <1200000>; 302 regulator-min-microvolt = <1200000>;
297 regulator-max-microvolt = <1200000>; 303 regulator-max-microvolt = <1200000>;
298 regulator-mem-idle;
299 }; 304 };
300 305
301 ldo10_reg: ldo10 { 306 ldo10_reg: ldo10 {
@@ -303,7 +308,9 @@
303 regulator-name = "VMIPI_1.8V"; 308 regulator-name = "VMIPI_1.8V";
304 regulator-min-microvolt = <1800000>; 309 regulator-min-microvolt = <1800000>;
305 regulator-max-microvolt = <1800000>; 310 regulator-max-microvolt = <1800000>;
306 regulator-mem-off; 311 regulator-state-mem {
312 regulator-off-in-suspend;
313 };
307 }; 314 };
308 315
309 ldo11_reg: ldo11 { 316 ldo11_reg: ldo11 {
@@ -312,7 +319,9 @@
312 regulator-min-microvolt = <1950000>; 319 regulator-min-microvolt = <1950000>;
313 regulator-max-microvolt = <1950000>; 320 regulator-max-microvolt = <1950000>;
314 regulator-always-on; 321 regulator-always-on;
315 regulator-mem-off; 322 regulator-state-mem {
323 regulator-off-in-suspend;
324 };
316 }; 325 };
317 326
318 ldo12_reg: ldo12 { 327 ldo12_reg: ldo12 {
@@ -320,7 +329,9 @@
320 regulator-name = "VUOTG_3.0V"; 329 regulator-name = "VUOTG_3.0V";
321 regulator-min-microvolt = <3000000>; 330 regulator-min-microvolt = <3000000>;
322 regulator-max-microvolt = <3000000>; 331 regulator-max-microvolt = <3000000>;
323 regulator-mem-off; 332 regulator-state-mem {
333 regulator-off-in-suspend;
334 };
324 }; 335 };
325 336
326 ldo13_reg: ldo13 { 337 ldo13_reg: ldo13 {
@@ -328,7 +339,6 @@
328 regulator-name = "NFC_AVDD_1.8V"; 339 regulator-name = "NFC_AVDD_1.8V";
329 regulator-min-microvolt = <1800000>; 340 regulator-min-microvolt = <1800000>;
330 regulator-max-microvolt = <1800000>; 341 regulator-max-microvolt = <1800000>;
331 regulator-mem-idle;
332 }; 342 };
333 343
334 ldo14_reg: ldo14 { 344 ldo14_reg: ldo14 {
@@ -337,7 +347,9 @@
337 regulator-min-microvolt = <1950000>; 347 regulator-min-microvolt = <1950000>;
338 regulator-max-microvolt = <1950000>; 348 regulator-max-microvolt = <1950000>;
339 regulator-always-on; 349 regulator-always-on;
340 regulator-mem-off; 350 regulator-state-mem {
351 regulator-off-in-suspend;
352 };
341 }; 353 };
342 354
343 ldo15_reg: ldo15 { 355 ldo15_reg: ldo15 {
@@ -345,7 +357,9 @@
345 regulator-name = "VHSIC_1.0V"; 357 regulator-name = "VHSIC_1.0V";
346 regulator-min-microvolt = <1000000>; 358 regulator-min-microvolt = <1000000>;
347 regulator-max-microvolt = <1000000>; 359 regulator-max-microvolt = <1000000>;
348 regulator-mem-off; 360 regulator-state-mem {
361 regulator-on-in-suspend;
362 };
349 }; 363 };
350 364
351 ldo16_reg: ldo16 { 365 ldo16_reg: ldo16 {
@@ -353,7 +367,9 @@
353 regulator-name = "VHSIC_1.8V"; 367 regulator-name = "VHSIC_1.8V";
354 regulator-min-microvolt = <1800000>; 368 regulator-min-microvolt = <1800000>;
355 regulator-max-microvolt = <1800000>; 369 regulator-max-microvolt = <1800000>;
356 regulator-mem-off; 370 regulator-state-mem {
371 regulator-on-in-suspend;
372 };
357 }; 373 };
358 374
359 ldo17_reg: ldo17 { 375 ldo17_reg: ldo17 {
@@ -361,7 +377,6 @@
361 regulator-name = "CAM_SENSOR_CORE_1.2V"; 377 regulator-name = "CAM_SENSOR_CORE_1.2V";
362 regulator-min-microvolt = <1200000>; 378 regulator-min-microvolt = <1200000>;
363 regulator-max-microvolt = <1200000>; 379 regulator-max-microvolt = <1200000>;
364 regulator-mem-idle;
365 }; 380 };
366 381
367 ldo18_reg: ldo18 { 382 ldo18_reg: ldo18 {
@@ -369,7 +384,6 @@
369 regulator-name = "CAM_ISP_SEN_IO_1.8V"; 384 regulator-name = "CAM_ISP_SEN_IO_1.8V";
370 regulator-min-microvolt = <1800000>; 385 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>; 386 regulator-max-microvolt = <1800000>;
372 regulator-mem-idle;
373 }; 387 };
374 388
375 ldo19_reg: ldo19 { 389 ldo19_reg: ldo19 {
@@ -377,7 +391,6 @@
377 regulator-name = "VT_CAM_1.8V"; 391 regulator-name = "VT_CAM_1.8V";
378 regulator-min-microvolt = <1800000>; 392 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <1800000>; 393 regulator-max-microvolt = <1800000>;
380 regulator-mem-idle;
381 }; 394 };
382 395
383 ldo20_reg: ldo20 { 396 ldo20_reg: ldo20 {
@@ -385,7 +398,6 @@
385 regulator-name = "VDDQ_PRE_1.8V"; 398 regulator-name = "VDDQ_PRE_1.8V";
386 regulator-min-microvolt = <1800000>; 399 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <1800000>; 400 regulator-max-microvolt = <1800000>;
388 regulator-mem-idle;
389 }; 401 };
390 402
391 ldo21_reg: ldo21 { 403 ldo21_reg: ldo21 {
@@ -393,7 +405,7 @@
393 regulator-name = "VTF_2.8V"; 405 regulator-name = "VTF_2.8V";
394 regulator-min-microvolt = <2800000>; 406 regulator-min-microvolt = <2800000>;
395 regulator-max-microvolt = <2800000>; 407 regulator-max-microvolt = <2800000>;
396 regulator-mem-idle; 408 maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
397 }; 409 };
398 410
399 ldo22_reg: ldo22 { 411 ldo22_reg: ldo22 {
@@ -401,6 +413,7 @@
401 regulator-name = "VMEM_VDD_2.8V"; 413 regulator-name = "VMEM_VDD_2.8V";
402 regulator-min-microvolt = <2800000>; 414 regulator-min-microvolt = <2800000>;
403 regulator-max-microvolt = <2800000>; 415 regulator-max-microvolt = <2800000>;
416 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
404 }; 417 };
405 418
406 ldo23_reg: ldo23 { 419 ldo23_reg: ldo23 {
@@ -408,7 +421,6 @@
408 regulator-name = "TSP_AVDD_3.3V"; 421 regulator-name = "TSP_AVDD_3.3V";
409 regulator-min-microvolt = <3300000>; 422 regulator-min-microvolt = <3300000>;
410 regulator-max-microvolt = <3300000>; 423 regulator-max-microvolt = <3300000>;
411 regulator-mem-idle;
412 }; 424 };
413 425
414 ldo24_reg: ldo24 { 426 ldo24_reg: ldo24 {
@@ -416,7 +428,6 @@
416 regulator-name = "TSP_VDD_1.8V"; 428 regulator-name = "TSP_VDD_1.8V";
417 regulator-min-microvolt = <1800000>; 429 regulator-min-microvolt = <1800000>;
418 regulator-max-microvolt = <1800000>; 430 regulator-max-microvolt = <1800000>;
419 regulator-mem-idle;
420 }; 431 };
421 432
422 ldo25_reg: ldo25 { 433 ldo25_reg: ldo25 {
@@ -424,7 +435,6 @@
424 regulator-name = "LCD_VCC_3.3V"; 435 regulator-name = "LCD_VCC_3.3V";
425 regulator-min-microvolt = <2800000>; 436 regulator-min-microvolt = <2800000>;
426 regulator-max-microvolt = <2800000>; 437 regulator-max-microvolt = <2800000>;
427 regulator-mem-idle;
428 }; 438 };
429 439
430 ldo26_reg: ldo26 { 440 ldo26_reg: ldo26 {
@@ -432,7 +442,6 @@
432 regulator-name = "MOTOR_VCC_3.0V"; 442 regulator-name = "MOTOR_VCC_3.0V";
433 regulator-min-microvolt = <3000000>; 443 regulator-min-microvolt = <3000000>;
434 regulator-max-microvolt = <3000000>; 444 regulator-max-microvolt = <3000000>;
435 regulator-mem-idle;
436 }; 445 };
437 446
438 buck1_reg: buck1 { 447 buck1_reg: buck1 {
@@ -442,7 +451,9 @@
442 regulator-max-microvolt = <1100000>; 451 regulator-max-microvolt = <1100000>;
443 regulator-always-on; 452 regulator-always-on;
444 regulator-boot-on; 453 regulator-boot-on;
445 regulator-mem-off; 454 regulator-state-mem {
455 regulator-off-in-suspend;
456 };
446 }; 457 };
447 458
448 buck2_reg: buck2 { 459 buck2_reg: buck2 {
@@ -452,7 +463,9 @@
452 regulator-max-microvolt = <1500000>; 463 regulator-max-microvolt = <1500000>;
453 regulator-always-on; 464 regulator-always-on;
454 regulator-boot-on; 465 regulator-boot-on;
455 regulator-mem-off; 466 regulator-state-mem {
467 regulator-on-in-suspend;
468 };
456 }; 469 };
457 470
458 buck3_reg: buck3 { 471 buck3_reg: buck3 {
@@ -462,7 +475,9 @@
462 regulator-max-microvolt = <1150000>; 475 regulator-max-microvolt = <1150000>;
463 regulator-always-on; 476 regulator-always-on;
464 regulator-boot-on; 477 regulator-boot-on;
465 regulator-mem-off; 478 regulator-state-mem {
479 regulator-off-in-suspend;
480 };
466 }; 481 };
467 482
468 buck4_reg: buck4 { 483 buck4_reg: buck4 {
@@ -471,7 +486,9 @@
471 regulator-min-microvolt = <850000>; 486 regulator-min-microvolt = <850000>;
472 regulator-max-microvolt = <1150000>; 487 regulator-max-microvolt = <1150000>;
473 regulator-boot-on; 488 regulator-boot-on;
474 regulator-mem-off; 489 regulator-state-mem {
490 regulator-off-in-suspend;
491 };
475 }; 492 };
476 493
477 buck5_reg: buck5 { 494 buck5_reg: buck5 {
@@ -503,6 +520,7 @@
503 regulator-name = "VMEM_VDDF_3.0V"; 520 regulator-name = "VMEM_VDDF_3.0V";
504 regulator-min-microvolt = <2850000>; 521 regulator-min-microvolt = <2850000>;
505 regulator-max-microvolt = <2850000>; 522 regulator-max-microvolt = <2850000>;
523 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
506 }; 524 };
507 525
508 buck9_reg: buck9 { 526 buck9_reg: buck9 {
@@ -510,7 +528,7 @@
510 regulator-name = "CAM_ISP_CORE_1.2V"; 528 regulator-name = "CAM_ISP_CORE_1.2V";
511 regulator-min-microvolt = <1000000>; 529 regulator-min-microvolt = <1000000>;
512 regulator-max-microvolt = <1200000>; 530 regulator-max-microvolt = <1200000>;
513 regulator-mem-off; 531 maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
514 }; 532 };
515 }; 533 };
516 }; 534 };
@@ -549,6 +567,32 @@
549 haptic-supply = <&ldo26_reg>; 567 haptic-supply = <&ldo26_reg>;
550 pwms = <&pwm 0 38022 0>; 568 pwms = <&pwm 0 38022 0>;
551 }; 569 };
570
571 charger {
572 compatible = "maxim,max77693-charger";
573
574 maxim,constant-microvolt = <4350000>;
575 maxim,min-system-microvolt = <3600000>;
576 maxim,thermal-regulation-celsius = <100>;
577 maxim,battery-overcurrent-microamp = <3500000>;
578 maxim,charge-input-threshold-microvolt = <4300000>;
579 };
580 };
581 };
582
583 i2c_max77693_fuel: i2c-gpio-3 {
584 compatible = "i2c-gpio";
585 gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>;
586 i2c-gpio,delay-us = <2>;
587 #address-cells = <1>;
588 #size-cells = <0>;
589 status = "okay";
590
591 max77693-fuel-gauge@36 {
592 compatible = "maxim,max17047";
593 interrupt-parent = <&gpx2>;
594 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
595 reg = <0x36>;
552 }; 596 };
553 }; 597 };
554 598
@@ -557,7 +601,7 @@
557 broken-cd; 601 broken-cd;
558 non-removable; 602 non-removable;
559 card-detect-delay = <200>; 603 card-detect-delay = <200>;
560 vmmc-supply = <&vemmc_reg>; 604 vmmc-supply = <&ldo22_reg>;
561 clock-frequency = <400000000>; 605 clock-frequency = <400000000>;
562 samsung,dw-mshc-ciu-div = <0>; 606 samsung,dw-mshc-ciu-div = <0>;
563 samsung,dw-mshc-sdr-timing = <2 3>; 607 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -721,8 +765,8 @@
721 status = "okay"; 765 status = "okay";
722 assigned-clocks = <&clock CLK_MOUT_CAM0>, 766 assigned-clocks = <&clock CLK_MOUT_CAM0>,
723 <&clock CLK_MOUT_CAM1>; 767 <&clock CLK_MOUT_CAM1>;
724 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>, 768 assigned-clock-parents = <&clock CLK_XUSBXTI>,
725 <&clock CLK_MOUT_MPLL_USER_T>; 769 <&clock CLK_XUSBXTI>;
726 770
727 fimc_0: fimc@11800000 { 771 fimc_0: fimc@11800000 {
728 status = "okay"; 772 status = "okay";
@@ -838,6 +882,24 @@
838 }; 882 };
839 }; 883 };
840 884
885 i2s0: i2s@03830000 {
886 pinctrl-0 = <&i2s0_bus>;
887 pinctrl-names = "default";
888 status = "okay";
889 };
890
891 sound {
892 compatible = "samsung,trats2-audio";
893 samsung,i2s-controller = <&i2s0>;
894 samsung,model = "Trats2";
895 samsung,audio-codec = <&wm1811>;
896 samsung,audio-routing =
897 "SPK", "SPKOUTLN",
898 "SPK", "SPKOUTLP",
899 "SPK", "SPKOUTRN",
900 "SPK", "SPKOUTRP";
901 };
902
841 exynos-usbphy@125B0000 { 903 exynos-usbphy@125B0000 {
842 status = "okay"; 904 status = "okay";
843 }; 905 };
@@ -866,6 +928,51 @@
866 }; 928 };
867}; 929};
868 930
931&pmu_system_controller {
932 assigned-clocks = <&pmu_system_controller 0>;
933 assigned-clock-parents = <&clock CLK_XUSBXTI>;
934};
935
936&ppmu_dmc0 {
937 status = "okay";
938
939 events {
940 ppmu_dmc0_3: ppmu-event3-dmc0 {
941 event-name = "ppmu-event3-dmc0";
942 };
943 };
944};
945
946&ppmu_dmc1 {
947 status = "okay";
948
949 events {
950 ppmu_dmc1_3: ppmu-event3-dmc1 {
951 event-name = "ppmu-event3-dmc1";
952 };
953 };
954};
955
956&ppmu_leftbus {
957 status = "okay";
958
959 events {
960 ppmu_leftbus_3: ppmu-event3-leftbus {
961 event-name = "ppmu-event3-leftbus";
962 };
963 };
964};
965
966&ppmu_rightbus {
967 status = "okay";
968
969 events {
970 ppmu_rightbus_3: ppmu-event3-rightbus {
971 event-name = "ppmu-event3-rightbus";
972 };
973 };
974};
975
869&pinctrl_0 { 976&pinctrl_0 {
870 pinctrl-names = "default"; 977 pinctrl-names = "default";
871 pinctrl-0 = <&sleep0>; 978 pinctrl-0 = <&sleep0>;
diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi
index 2007def1ab43..5caea996e090 100644
--- a/arch/arm/boot/dts/exynos4415.dtsi
+++ b/arch/arm/boot/dts/exynos4415.dtsi
@@ -241,6 +241,33 @@
241 interrupts = <0 240 0>; 241 interrupts = <0 240 0>;
242 }; 242 };
243 243
244 fimd: fimd@11C00000 {
245 compatible = "samsung,exynos4415-fimd";
246 reg = <0x11C00000 0x30000>;
247 interrupt-names = "fifo", "vsync", "lcd_sys";
248 interrupts = <0 84 0>, <0 85 0>, <0 86 0>;
249 clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
250 clock-names = "sclk_fimd", "fimd";
251 samsung,power-domain = <&pd_lcd0>;
252 samsung,sysreg = <&sysreg_system_controller>;
253 status = "disabled";
254 };
255
256 dsi_0: dsi@11C80000 {
257 compatible = "samsung,exynos4415-mipi-dsi";
258 reg = <0x11C80000 0x10000>;
259 interrupts = <0 83 0>;
260 samsung,phy-type = <0>;
261 samsung,power-domain = <&pd_lcd0>;
262 phys = <&mipi_phy 1>;
263 phy-names = "dsim";
264 clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>;
265 clock-names = "bus_clk", "pll_clk";
266 #address-cells = <1>;
267 #size-cells = <0>;
268 status = "disabled";
269 };
270
244 hsotg: hsotg@12480000 { 271 hsotg: hsotg@12480000 {
245 compatible = "samsung,s3c6400-hsotg"; 272 compatible = "samsung,s3c6400-hsotg";
246 reg = <0x12480000 0x20000>; 273 reg = <0x12480000 0x20000>;
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index da8734e25f50..af59cab53bd9 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -226,7 +226,7 @@
226 <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>, 226 <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>,
227 <&clock CLK_DIV_MCUISP0>, 227 <&clock CLK_DIV_MCUISP0>,
228 <&clock CLK_DIV_MCUISP1>, 228 <&clock CLK_DIV_MCUISP1>,
229 <&clock CLK_SCLK_UART_ISP>, 229 <&clock CLK_UART_ISP_SCLK>,
230 <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>, 230 <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>,
231 <&clock CLK_ACLK400_MCUISP>, 231 <&clock CLK_ACLK400_MCUISP>,
232 <&clock CLK_DIV_ACLK400_MCUISP>; 232 <&clock CLK_DIV_ACLK400_MCUISP>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-06 11:39:53 -0500