diff options
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 20 | ||||
-rw-r--r-- | include/asm-powerpc/mpic.h | 10 |
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 7dcdfcb3c984..bffe50d02c99 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -829,7 +829,27 @@ void __init mpic_init(struct mpic *mpic) | |||
829 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0); | 829 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0); |
830 | } | 830 | } |
831 | 831 | ||
832 | void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio) | ||
833 | { | ||
834 | u32 v; | ||
835 | |||
836 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); | ||
837 | v &= ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK; | ||
838 | v |= MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(clock_ratio); | ||
839 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); | ||
840 | } | ||
832 | 841 | ||
842 | void __init mpic_set_serial_int(struct mpic *mpic, int enable) | ||
843 | { | ||
844 | u32 v; | ||
845 | |||
846 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); | ||
847 | if (enable) | ||
848 | v |= MPIC_GREG_GLOBAL_CONF_1_SIE; | ||
849 | else | ||
850 | v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE; | ||
851 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); | ||
852 | } | ||
833 | 853 | ||
834 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | 854 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) |
835 | { | 855 | { |
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index 6b9e78142f4f..f0d22ac34b96 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h | |||
@@ -22,6 +22,10 @@ | |||
22 | #define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 | 22 | #define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 |
23 | #define MPIC_GREG_GCONF_BASE_MASK 0x000fffff | 23 | #define MPIC_GREG_GCONF_BASE_MASK 0x000fffff |
24 | #define MPIC_GREG_GLOBAL_CONF_1 0x00030 | 24 | #define MPIC_GREG_GLOBAL_CONF_1 0x00030 |
25 | #define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000 | ||
26 | #define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000 | ||
27 | #define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r) \ | ||
28 | (((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK) | ||
25 | #define MPIC_GREG_VENDOR_0 0x00040 | 29 | #define MPIC_GREG_VENDOR_0 0x00040 |
26 | #define MPIC_GREG_VENDOR_1 0x00050 | 30 | #define MPIC_GREG_VENDOR_1 0x00050 |
27 | #define MPIC_GREG_VENDOR_2 0x00060 | 31 | #define MPIC_GREG_VENDOR_2 0x00060 |
@@ -284,6 +288,12 @@ extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs); | |||
284 | /* This one gets to the primary mpic */ | 288 | /* This one gets to the primary mpic */ |
285 | extern int mpic_get_irq(struct pt_regs *regs); | 289 | extern int mpic_get_irq(struct pt_regs *regs); |
286 | 290 | ||
291 | /* Set the EPIC clock ratio */ | ||
292 | void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio); | ||
293 | |||
294 | /* Enable/Disable EPIC serial interrupt mode */ | ||
295 | void mpic_set_serial_int(struct mpic *mpic, int enable); | ||
296 | |||
287 | /* global mpic for pSeries */ | 297 | /* global mpic for pSeries */ |
288 | extern struct mpic *pSeries_mpic; | 298 | extern struct mpic *pSeries_mpic; |
289 | 299 | ||