2 files changed, 6 insertions, 5 deletions

diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index ea57f39e6736..56ebc7f2bede 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -126,12 +126,13 @@ int rtc_mips_set_mmss(unsigned long nowtime)
 void __init plat_time_init(void)
 {
         u32 start, end;
-        int i = HZ / 10;
+        int i = HZ / 8;
 
         /* Set up the rate of periodic DS1287 interrupts. */
         ds1287_set_base_clock(HZ);
 
         if (cpu_has_counter) {
+                ds1287_timer_state();
                 while (!ds1287_timer_state())
                         ;
 
@@ -143,7 +144,7 @@ void __init plat_time_init(void)
 
                 end = read_c0_count();
 
-                mips_hpt_frequency = (end - start) * 10;
+                mips_hpt_frequency = (end - start) * 8;
                 printk(KERN_INFO "MIPS counter frequency %dHz\n",
                         mips_hpt_frequency);
         } else if (IOASIC)
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c
index 0654bff9b69c..87e88feb4a25 100644
--- a/arch/mips/kernel/csrc-ioasic.c
+++ b/arch/mips/kernel/csrc-ioasic.c
@@ -41,9 +41,9 @@ void __init dec_ioasic_clocksource_init(void)
 {
         unsigned int freq;
         u32 start, end;
-        int i = HZ / 10;
-
+        int i = HZ / 8;
 
+        ds1287_timer_state();
         while (!ds1287_timer_state())
                 ;
 
@@ -55,7 +55,7 @@ void __init dec_ioasic_clocksource_init(void)
 
         end = dec_ioasic_hpt_read(&clocksource_dec);
 
-        freq = (end - start) * 10;
+        freq = (end - start) * 8;
         printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq);
 
         clocksource_dec.rating = 200 + freq / 10000000;