aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/dts/imx23.dtsi5
-rw-r--r--arch/arm/boot/dts/imx28.dtsi5
-rw-r--r--arch/arm/mach-mxs/icoll.c63
-rw-r--r--arch/arm/mach-mxs/include/mach/common.h3
-rw-r--r--arch/arm/mach-mxs/include/mach/entry-macro.S35
-rw-r--r--arch/arm/mach-mxs/include/mach/irqs.h32
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c39
-rw-r--r--arch/arm/mach-mxs/timer.c13
-rw-r--r--drivers/clk/mxs/clk-imx23.c2
-rw-r--r--drivers/clk/mxs/clk-imx28.c2
-rw-r--r--drivers/gpio/gpio-mxs.c48
12 files changed, 112 insertions, 137 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0e8e536029b5..ad790fc25ed4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -485,7 +485,9 @@ config ARCH_MXS
485 select CLKSRC_MMIO 485 select CLKSRC_MMIO
486 select COMMON_CLK 486 select COMMON_CLK
487 select HAVE_CLK_PREPARE 487 select HAVE_CLK_PREPARE
488 select MULTI_IRQ_HANDLER
488 select PINCTRL 489 select PINCTRL
490 select SPARSE_IRQ
489 select USE_OF 491 select USE_OF
490 help 492 help
491 Support for Freescale MXS-based family of processors 493 Support for Freescale MXS-based family of processors
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 3f3b6fc229b3..9ca4ca70c1bc 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -43,7 +43,7 @@
43 ranges; 43 ranges;
44 44
45 icoll: interrupt-controller@80000000 { 45 icoll: interrupt-controller@80000000 {
46 compatible = "fsl,imx23-icoll", "fsl,mxs-icoll"; 46 compatible = "fsl,imx23-icoll", "fsl,icoll";
47 interrupt-controller; 47 interrupt-controller;
48 #interrupt-cells = <1>; 48 #interrupt-cells = <1>;
49 reg = <0x80000000 0x2000>; 49 reg = <0x80000000 0x2000>;
@@ -407,8 +407,9 @@
407 }; 407 };
408 408
409 timrot@80068000 { 409 timrot@80068000 {
410 compatible = "fsl,imx23-timrot", "fsl,timrot";
410 reg = <0x80068000 0x2000>; 411 reg = <0x80068000 0x2000>;
411 status = "disabled"; 412 interrupts = <28 29 30 31>;
412 }; 413 };
413 414
414 auart0: serial@8006c000 { 415 auart0: serial@8006c000 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 724147eab84b..59fbfba23df8 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -52,7 +52,7 @@
52 ranges; 52 ranges;
53 53
54 icoll: interrupt-controller@80000000 { 54 icoll: interrupt-controller@80000000 {
55 compatible = "fsl,imx28-icoll", "fsl,mxs-icoll"; 55 compatible = "fsl,imx28-icoll", "fsl,icoll";
56 interrupt-controller; 56 interrupt-controller;
57 #interrupt-cells = <1>; 57 #interrupt-cells = <1>;
58 reg = <0x80000000 0x2000>; 58 reg = <0x80000000 0x2000>;
@@ -787,8 +787,9 @@
787 }; 787 };
788 788
789 timrot@80068000 { 789 timrot@80068000 {
790 compatible = "fsl,imx28-timrot", "fsl,timrot";
790 reg = <0x80068000 0x2000>; 791 reg = <0x80068000 0x2000>;
791 status = "disabled"; 792 interrupts = <48 49 50 51>;
792 }; 793 };
793 794
794 auart0: serial@8006a000 { 795 auart0: serial@8006a000 {
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c
index 23ca9d083b2c..8fb23af154b3 100644
--- a/arch/arm/mach-mxs/icoll.c
+++ b/arch/arm/mach-mxs/icoll.c
@@ -19,20 +19,27 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/irqdomain.h>
22#include <linux/io.h> 23#include <linux/io.h>
23 24#include <linux/of.h>
25#include <linux/of_irq.h>
26#include <asm/exception.h>
24#include <mach/mxs.h> 27#include <mach/mxs.h>
25#include <mach/common.h> 28#include <mach/common.h>
26 29
27#define HW_ICOLL_VECTOR 0x0000 30#define HW_ICOLL_VECTOR 0x0000
28#define HW_ICOLL_LEVELACK 0x0010 31#define HW_ICOLL_LEVELACK 0x0010
29#define HW_ICOLL_CTRL 0x0020 32#define HW_ICOLL_CTRL 0x0020
33#define HW_ICOLL_STAT_OFFSET 0x0070
30#define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10) 34#define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10)
31#define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10) 35#define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10)
32#define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 36#define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004
33#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1 37#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1
34 38
39#define ICOLL_NUM_IRQS 128
40
35static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); 41static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR);
42static struct irq_domain *icoll_domain;
36 43
37static void icoll_ack_irq(struct irq_data *d) 44static void icoll_ack_irq(struct irq_data *d)
38{ 45{
@@ -48,13 +55,13 @@ static void icoll_ack_irq(struct irq_data *d)
48static void icoll_mask_irq(struct irq_data *d) 55static void icoll_mask_irq(struct irq_data *d)
49{ 56{
50 __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, 57 __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
51 icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq)); 58 icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->hwirq));
52} 59}
53 60
54static void icoll_unmask_irq(struct irq_data *d) 61static void icoll_unmask_irq(struct irq_data *d)
55{ 62{
56 __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, 63 __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
57 icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq)); 64 icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq));
58} 65}
59 66
60static struct irq_chip mxs_icoll_chip = { 67static struct irq_chip mxs_icoll_chip = {
@@ -63,18 +70,56 @@ static struct irq_chip mxs_icoll_chip = {
63 .irq_unmask = icoll_unmask_irq, 70 .irq_unmask = icoll_unmask_irq,
64}; 71};
65 72
66void __init icoll_init_irq(void) 73asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
67{ 74{
68 int i; 75 u32 irqnr;
76
77 do {
78 irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);
79 if (irqnr != 0x7f) {
80 __raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);
81 irqnr = irq_find_mapping(icoll_domain, irqnr);
82 handle_IRQ(irqnr, regs);
83 continue;
84 }
85 break;
86 } while (1);
87}
88
89static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,
90 irq_hw_number_t hw)
91{
92 irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq);
93 set_irq_flags(virq, IRQF_VALID);
94
95 return 0;
96}
69 97
98static struct irq_domain_ops icoll_irq_domain_ops = {
99 .map = icoll_irq_domain_map,
100 .xlate = irq_domain_xlate_onecell,
101};
102
103void __init icoll_of_init(struct device_node *np,
104 struct device_node *interrupt_parent)
105{
70 /* 106 /*
71 * Interrupt Collector reset, which initializes the priority 107 * Interrupt Collector reset, which initializes the priority
72 * for each irq to level 0. 108 * for each irq to level 0.
73 */ 109 */
74 mxs_reset_block(icoll_base + HW_ICOLL_CTRL); 110 mxs_reset_block(icoll_base + HW_ICOLL_CTRL);
75 111
76 for (i = 0; i < MXS_INTERNAL_IRQS; i++) { 112 icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS,
77 irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq); 113 &icoll_irq_domain_ops, NULL);
78 set_irq_flags(i, IRQF_VALID); 114 WARN_ON(!icoll_domain);
79 } 115}
116
117static const struct of_device_id icoll_of_match[] __initconst = {
118 {.compatible = "fsl,icoll", .data = icoll_of_init},
119 { /* sentinel */ }
120};
121
122void __init icoll_init_irq(void)
123{
124 of_irq_init(icoll_of_match);
80} 125}
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 4dec79563f19..be5a9c93cb2a 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -13,7 +13,7 @@
13 13
14extern const u32 *mxs_get_ocotp(void); 14extern const u32 *mxs_get_ocotp(void);
15extern int mxs_reset_block(void __iomem *); 15extern int mxs_reset_block(void __iomem *);
16extern void mxs_timer_init(int); 16extern void mxs_timer_init(void);
17extern void mxs_restart(char, const char *); 17extern void mxs_restart(char, const char *);
18extern int mxs_saif_clkmux_select(unsigned int clkmux); 18extern int mxs_saif_clkmux_select(unsigned int clkmux);
19 19
@@ -24,5 +24,6 @@ extern int mx28_clocks_init(void);
24extern void mx28_map_io(void); 24extern void mx28_map_io(void);
25 25
26extern void icoll_init_irq(void); 26extern void icoll_init_irq(void);
27extern void icoll_handle_irq(struct pt_regs *);
27 28
28#endif /* __MACH_MXS_COMMON_H__ */ 29#endif /* __MACH_MXS_COMMON_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S
deleted file mode 100644
index 0c14259705b9..000000000000
--- a/arch/arm/mach-mxs/include/mach/entry-macro.S
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * Low-level IRQ helper macros for Freescale MXS-based
3 *
4 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <mach/mxs.h>
22
23#define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR)
24#define HW_ICOLL_STAT_OFFSET 0x70
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET]
28 cmp \irqnr, #0x7F
29 strne \irqnr, [\base]
30 moveqs \irqnr, #0
31 .endm
32
33 .macro get_irqnr_preamble, base, tmp
34 ldr \base, =MXS_ICOLL_VBASE
35 .endm
diff --git a/arch/arm/mach-mxs/include/mach/irqs.h b/arch/arm/mach-mxs/include/mach/irqs.h
deleted file mode 100644
index f771039b814a..000000000000
--- a/arch/arm/mach-mxs/include/mach/irqs.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __MACH_MXS_IRQS_H__
12#define __MACH_MXS_IRQS_H__
13
14#define MXS_INTERNAL_IRQS 128
15
16#define MXS_GPIO_IRQ_START MXS_INTERNAL_IRQS
17
18/* the maximum for MXS-based */
19#define MXS_GPIO_IRQS (32 * 5)
20
21/*
22 * The next 16 interrupts are for board specific purposes. Since
23 * the kernel can only run on one machine at a time, we can re-use
24 * these. If you need more, increase MXS_BOARD_IRQS, but keep it
25 * within sensible limits.
26 */
27#define MXS_BOARD_IRQ_START (MXS_GPIO_IRQ_START + MXS_GPIO_IRQS)
28#define MXS_BOARD_IRQS 16
29
30#define NR_IRQS (MXS_BOARD_IRQ_START + MXS_BOARD_IRQS)
31
32#endif /* __MACH_MXS_IRQS_H__ */
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index cf43e5effb91..4748ec551a68 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -17,10 +17,8 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/irqdomain.h>
21#include <linux/micrel_phy.h> 20#include <linux/micrel_phy.h>
22#include <linux/mxsfb.h> 21#include <linux/mxsfb.h>
23#include <linux/of_irq.h>
24#include <linux/of_platform.h> 22#include <linux/of_platform.h>
25#include <linux/phy.h> 23#include <linux/phy.h>
26#include <linux/pinctrl/consumer.h> 24#include <linux/pinctrl/consumer.h>
@@ -141,37 +139,6 @@ static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
141 { /* sentinel */ } 139 { /* sentinel */ }
142}; 140};
143 141
144static int __init mxs_icoll_add_irq_domain(struct device_node *np,
145 struct device_node *interrupt_parent)
146{
147 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
148
149 return 0;
150}
151
152static int __init mxs_gpio_add_irq_domain(struct device_node *np,
153 struct device_node *interrupt_parent)
154{
155 static int gpio_irq_base = MXS_GPIO_IRQ_START;
156
157 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
158 gpio_irq_base += 32;
159
160 return 0;
161}
162
163static const struct of_device_id mxs_irq_match[] __initconst = {
164 { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },
165 { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },
166 { /* sentinel */ }
167};
168
169static void __init mxs_dt_init_irq(void)
170{
171 icoll_init_irq();
172 of_irq_init(mxs_irq_match);
173}
174
175static void __init imx23_timer_init(void) 142static void __init imx23_timer_init(void)
176{ 143{
177 mx23_clocks_init(); 144 mx23_clocks_init();
@@ -421,7 +388,8 @@ static const char *imx28_dt_compat[] __initdata = {
421 388
422DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") 389DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
423 .map_io = mx23_map_io, 390 .map_io = mx23_map_io,
424 .init_irq = mxs_dt_init_irq, 391 .init_irq = icoll_init_irq,
392 .handle_irq = icoll_handle_irq,
425 .timer = &imx23_timer, 393 .timer = &imx23_timer,
426 .init_machine = mxs_machine_init, 394 .init_machine = mxs_machine_init,
427 .dt_compat = imx23_dt_compat, 395 .dt_compat = imx23_dt_compat,
@@ -430,7 +398,8 @@ MACHINE_END
430 398
431DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") 399DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
432 .map_io = mx28_map_io, 400 .map_io = mx28_map_io,
433 .init_irq = mxs_dt_init_irq, 401 .init_irq = icoll_init_irq,
402 .handle_irq = icoll_handle_irq,
434 .timer = &imx28_timer, 403 .timer = &imx28_timer,
435 .init_machine = mxs_machine_init, 404 .init_machine = mxs_machine_init,
436 .dt_compat = imx28_dt_compat, 405 .dt_compat = imx28_dt_compat,
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 02d36de9c4e8..7c3792613392 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -25,6 +25,8 @@
25#include <linux/irq.h> 25#include <linux/irq.h>
26#include <linux/clockchips.h> 26#include <linux/clockchips.h>
27#include <linux/clk.h> 27#include <linux/clk.h>
28#include <linux/of.h>
29#include <linux/of_irq.h>
28 30
29#include <asm/mach/time.h> 31#include <asm/mach/time.h>
30#include <mach/mxs.h> 32#include <mach/mxs.h>
@@ -244,9 +246,17 @@ static int __init mxs_clocksource_init(struct clk *timer_clk)
244 return 0; 246 return 0;
245} 247}
246 248
247void __init mxs_timer_init(int irq) 249void __init mxs_timer_init(void)
248{ 250{
251 struct device_node *np;
249 struct clk *timer_clk; 252 struct clk *timer_clk;
253 int irq;
254
255 np = of_find_compatible_node(NULL, NULL, "fsl,timrot");
256 if (!np) {
257 pr_err("%s: failed find timrot node\n", __func__);
258 return;
259 }
250 260
251 timer_clk = clk_get_sys("timrot", NULL); 261 timer_clk = clk_get_sys("timrot", NULL);
252 if (IS_ERR(timer_clk)) { 262 if (IS_ERR(timer_clk)) {
@@ -295,5 +305,6 @@ void __init mxs_timer_init(int irq)
295 mxs_clockevent_init(timer_clk); 305 mxs_clockevent_init(timer_clk);
296 306
297 /* Make irqs happen */ 307 /* Make irqs happen */
308 irq = irq_of_parse_and_map(np, 0);
298 setup_irq(irq, &mxs_timer_irq); 309 setup_irq(irq, &mxs_timer_irq);
299} 310}
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index 9f6d15546cbe..f00dffb9ad60 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -165,7 +165,7 @@ int __init mx23_clocks_init(void)
165 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) 165 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
166 clk_prepare_enable(clks[clks_init_on[i]]); 166 clk_prepare_enable(clks[clks_init_on[i]]);
167 167
168 mxs_timer_init(MX23_INT_TIMER0); 168 mxs_timer_init();
169 169
170 return 0; 170 return 0;
171} 171}
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 613e76f3758e..42978f1b4bd2 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -244,7 +244,7 @@ int __init mx28_clocks_init(void)
244 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) 244 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
245 clk_prepare_enable(clks[clks_init_on[i]]); 245 clk_prepare_enable(clks[clks_init_on[i]]);
246 246
247 mxs_timer_init(MX28_INT_TIMER0); 247 mxs_timer_init();
248 248
249 return 0; 249 return 0;
250} 250}
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index 39e495669961..796fb13e4815 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -24,6 +24,7 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/irqdomain.h>
27#include <linux/gpio.h> 28#include <linux/gpio.h>
28#include <linux/of.h> 29#include <linux/of.h>
29#include <linux/of_address.h> 30#include <linux/of_address.h>
@@ -52,8 +53,6 @@
52#define GPIO_INT_LEV_MASK (1 << 0) 53#define GPIO_INT_LEV_MASK (1 << 0)
53#define GPIO_INT_POL_MASK (1 << 1) 54#define GPIO_INT_POL_MASK (1 << 1)
54 55
55#define irq_to_gpio(irq) ((irq) - MXS_GPIO_IRQ_START)
56
57enum mxs_gpio_id { 56enum mxs_gpio_id {
58 IMX23_GPIO, 57 IMX23_GPIO,
59 IMX28_GPIO, 58 IMX28_GPIO,
@@ -63,7 +62,7 @@ struct mxs_gpio_port {
63 void __iomem *base; 62 void __iomem *base;
64 int id; 63 int id;
65 int irq; 64 int irq;
66 int virtual_irq_start; 65 struct irq_domain *domain;
67 struct bgpio_chip bgc; 66 struct bgpio_chip bgc;
68 enum mxs_gpio_id devid; 67 enum mxs_gpio_id devid;
69}; 68};
@@ -82,8 +81,7 @@ static inline int is_imx28_gpio(struct mxs_gpio_port *port)
82 81
83static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) 82static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
84{ 83{
85 u32 gpio = irq_to_gpio(d->irq); 84 u32 pin_mask = 1 << d->hwirq;
86 u32 pin_mask = 1 << (gpio & 31);
87 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 85 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
88 struct mxs_gpio_port *port = gc->private; 86 struct mxs_gpio_port *port = gc->private;
89 void __iomem *pin_addr; 87 void __iomem *pin_addr;
@@ -120,7 +118,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
120 else 118 else
121 writel(pin_mask, pin_addr + MXS_CLR); 119 writel(pin_mask, pin_addr + MXS_CLR);
122 120
123 writel(1 << (gpio & 0x1f), 121 writel(pin_mask,
124 port->base + PINCTRL_IRQSTAT(port) + MXS_CLR); 122 port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
125 123
126 return 0; 124 return 0;
@@ -131,7 +129,6 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
131{ 129{
132 u32 irq_stat; 130 u32 irq_stat;
133 struct mxs_gpio_port *port = irq_get_handler_data(irq); 131 struct mxs_gpio_port *port = irq_get_handler_data(irq);
134 u32 gpio_irq_no_base = port->virtual_irq_start;
135 132
136 desc->irq_data.chip->irq_ack(&desc->irq_data); 133 desc->irq_data.chip->irq_ack(&desc->irq_data);
137 134
@@ -140,7 +137,7 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
140 137
141 while (irq_stat != 0) { 138 while (irq_stat != 0) {
142 int irqoffset = fls(irq_stat) - 1; 139 int irqoffset = fls(irq_stat) - 1;
143 generic_handle_irq(gpio_irq_no_base + irqoffset); 140 generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
144 irq_stat &= ~(1 << irqoffset); 141 irq_stat &= ~(1 << irqoffset);
145 } 142 }
146} 143}
@@ -167,12 +164,12 @@ static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
167 return 0; 164 return 0;
168} 165}
169 166
170static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port) 167static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base)
171{ 168{
172 struct irq_chip_generic *gc; 169 struct irq_chip_generic *gc;
173 struct irq_chip_type *ct; 170 struct irq_chip_type *ct;
174 171
175 gc = irq_alloc_generic_chip("gpio-mxs", 1, port->virtual_irq_start, 172 gc = irq_alloc_generic_chip("gpio-mxs", 1, irq_base,
176 port->base, handle_level_irq); 173 port->base, handle_level_irq);
177 gc->private = port; 174 gc->private = port;
178 175
@@ -194,7 +191,7 @@ static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
194 struct mxs_gpio_port *port = 191 struct mxs_gpio_port *port =
195 container_of(bgc, struct mxs_gpio_port, bgc); 192 container_of(bgc, struct mxs_gpio_port, bgc);
196 193
197 return port->virtual_irq_start + offset; 194 return irq_find_mapping(port->domain, offset);
198} 195}
199 196
200static struct platform_device_id mxs_gpio_ids[] = { 197static struct platform_device_id mxs_gpio_ids[] = {
@@ -226,6 +223,7 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
226 static void __iomem *base; 223 static void __iomem *base;
227 struct mxs_gpio_port *port; 224 struct mxs_gpio_port *port;
228 struct resource *iores = NULL; 225 struct resource *iores = NULL;
226 int irq_base;
229 int err; 227 int err;
230 228
231 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); 229 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
@@ -241,7 +239,6 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
241 port->id = pdev->id; 239 port->id = pdev->id;
242 port->devid = pdev->id_entry->driver_data; 240 port->devid = pdev->id_entry->driver_data;
243 } 241 }
244 port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32;
245 242
246 port->irq = platform_get_irq(pdev, 0); 243 port->irq = platform_get_irq(pdev, 0);
247 if (port->irq < 0) 244 if (port->irq < 0)
@@ -275,8 +272,19 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
275 /* clear address has to be used to clear IRQSTAT bits */ 272 /* clear address has to be used to clear IRQSTAT bits */
276 writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR); 273 writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
277 274
275 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
276 if (irq_base < 0)
277 return irq_base;
278
279 port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
280 &irq_domain_simple_ops, NULL);
281 if (!port->domain) {
282 err = -ENODEV;
283 goto out_irqdesc_free;
284 }
285
278 /* gpio-mxs can be a generic irq chip */ 286 /* gpio-mxs can be a generic irq chip */
279 mxs_gpio_init_gc(port); 287 mxs_gpio_init_gc(port, irq_base);
280 288
281 /* setup one handler for each entry */ 289 /* setup one handler for each entry */
282 irq_set_chained_handler(port->irq, mxs_gpio_irq_handler); 290 irq_set_chained_handler(port->irq, mxs_gpio_irq_handler);
@@ -287,18 +295,22 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
287 port->base + PINCTRL_DOUT(port), NULL, 295 port->base + PINCTRL_DOUT(port), NULL,
288 port->base + PINCTRL_DOE(port), NULL, 0); 296 port->base + PINCTRL_DOE(port), NULL, 0);
289 if (err) 297 if (err)
290 return err; 298 goto out_irqdesc_free;
291 299
292 port->bgc.gc.to_irq = mxs_gpio_to_irq; 300 port->bgc.gc.to_irq = mxs_gpio_to_irq;
293 port->bgc.gc.base = port->id * 32; 301 port->bgc.gc.base = port->id * 32;
294 302
295 err = gpiochip_add(&port->bgc.gc); 303 err = gpiochip_add(&port->bgc.gc);
296 if (err) { 304 if (err)
297 bgpio_remove(&port->bgc); 305 goto out_bgpio_remove;
298 return err;
299 }
300 306
301 return 0; 307 return 0;
308
309out_bgpio_remove:
310 bgpio_remove(&port->bgc);
311out_irqdesc_free:
312 irq_free_descs(irq_base, 32);
313 return err;
302} 314}
303 315
304static struct platform_driver mxs_gpio_driver = { 316static struct platform_driver mxs_gpio_driver = {