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-rw-r--r--include/asm-x86_64/hypertransport.h43
-rw-r--r--include/asm-x86_64/msidef.h48
2 files changed, 2 insertions, 89 deletions
diff --git a/include/asm-x86_64/hypertransport.h b/include/asm-x86_64/hypertransport.h
index c16c6ff4bdd7..5cbf9fa5e0b5 100644
--- a/include/asm-x86_64/hypertransport.h
+++ b/include/asm-x86_64/hypertransport.h
@@ -1,42 +1 @@
1#ifndef ASM_HYPERTRANSPORT_H #include <asm-i386/hypertransport.h>
2#define ASM_HYPERTRANSPORT_H
3
4/*
5 * Constants for x86 Hypertransport Interrupts.
6 */
7
8#define HT_IRQ_LOW_BASE 0xf8000000
9
10#define HT_IRQ_LOW_VECTOR_SHIFT 16
11#define HT_IRQ_LOW_VECTOR_MASK 0x00ff0000
12#define HT_IRQ_LOW_VECTOR(v) (((v) << HT_IRQ_LOW_VECTOR_SHIFT) & HT_IRQ_LOW_VECTOR_MASK)
13
14#define HT_IRQ_LOW_DEST_ID_SHIFT 8
15#define HT_IRQ_LOW_DEST_ID_MASK 0x0000ff00
16#define HT_IRQ_LOW_DEST_ID(v) (((v) << HT_IRQ_LOW_DEST_ID_SHIFT) & HT_IRQ_LOW_DEST_ID_MASK)
17
18#define HT_IRQ_LOW_DM_PHYSICAL 0x0000000
19#define HT_IRQ_LOW_DM_LOGICAL 0x0000040
20
21#define HT_IRQ_LOW_RQEOI_EDGE 0x0000000
22#define HT_IRQ_LOW_RQEOI_LEVEL 0x0000020
23
24
25#define HT_IRQ_LOW_MT_FIXED 0x0000000
26#define HT_IRQ_LOW_MT_ARBITRATED 0x0000004
27#define HT_IRQ_LOW_MT_SMI 0x0000008
28#define HT_IRQ_LOW_MT_NMI 0x000000c
29#define HT_IRQ_LOW_MT_INIT 0x0000010
30#define HT_IRQ_LOW_MT_STARTUP 0x0000014
31#define HT_IRQ_LOW_MT_EXTINT 0x0000018
32#define HT_IRQ_LOW_MT_LINT1 0x000008c
33#define HT_IRQ_LOW_MT_LINT0 0x0000098
34
35#define HT_IRQ_LOW_IRQ_MASKED 0x0000001
36
37
38#define HT_IRQ_HIGH_DEST_ID_SHIFT 0
39#define HT_IRQ_HIGH_DEST_ID_MASK 0x00ffffff
40#define HT_IRQ_HIGH_DEST_ID(v) ((((v) >> 8) << HT_IRQ_HIGH_DEST_ID_SHIFT) & HT_IRQ_HIGH_DEST_ID_MASK)
41
42#endif /* ASM_HYPERTRANSPORT_H */
diff --git a/include/asm-x86_64/msidef.h b/include/asm-x86_64/msidef.h
index 5b8acddb70fb..083ad5827e48 100644
--- a/include/asm-x86_64/msidef.h
+++ b/include/asm-x86_64/msidef.h
@@ -1,47 +1 @@
1#ifndef ASM_MSIDEF_H #include <asm-i386/msidef.h>
2#define ASM_MSIDEF_H
3
4/*
5 * Constants for Intel APIC based MSI messages.
6 */
7
8/*
9 * Shifts for MSI data
10 */
11
12#define MSI_DATA_VECTOR_SHIFT 0
13#define MSI_DATA_VECTOR_MASK 0x000000ff
14#define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & MSI_DATA_VECTOR_MASK)
15
16#define MSI_DATA_DELIVERY_MODE_SHIFT 8
17#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
18#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
19
20#define MSI_DATA_LEVEL_SHIFT 14
21#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
22#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
23
24#define MSI_DATA_TRIGGER_SHIFT 15
25#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
26#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
27
28/*
29 * Shift/mask fields for msi address
30 */
31
32#define MSI_ADDR_BASE_HI 0
33#define MSI_ADDR_BASE_LO 0xfee00000
34
35#define MSI_ADDR_DEST_MODE_SHIFT 2
36#define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT)
37#define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT)
38
39#define MSI_ADDR_REDIRECTION_SHIFT 3
40#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) /* dedicated cpu */
41#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) /* lowest priority */
42
43#define MSI_ADDR_DEST_ID_SHIFT 12
44#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
45#define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK)
46
47#endif /* ASM_MSIDEF_H */