diff options
-rw-r--r-- | arch/arm/mach-mvebu/coherency.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/headsmp-a9.S | 9 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/pmsu.c | 10 |
3 files changed, 18 insertions, 7 deletions
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c index 477202fd39cc..2bdc3233abe2 100644 --- a/arch/arm/mach-mvebu/coherency.c +++ b/arch/arm/mach-mvebu/coherency.c | |||
@@ -292,6 +292,10 @@ static struct notifier_block mvebu_hwcc_nb = { | |||
292 | .notifier_call = mvebu_hwcc_notifier, | 292 | .notifier_call = mvebu_hwcc_notifier, |
293 | }; | 293 | }; |
294 | 294 | ||
295 | static struct notifier_block mvebu_hwcc_pci_nb = { | ||
296 | .notifier_call = mvebu_hwcc_notifier, | ||
297 | }; | ||
298 | |||
295 | static void __init armada_370_coherency_init(struct device_node *np) | 299 | static void __init armada_370_coherency_init(struct device_node *np) |
296 | { | 300 | { |
297 | struct resource res; | 301 | struct resource res; |
@@ -427,7 +431,7 @@ static int __init coherency_pci_init(void) | |||
427 | { | 431 | { |
428 | if (coherency_available()) | 432 | if (coherency_available()) |
429 | bus_register_notifier(&pci_bus_type, | 433 | bus_register_notifier(&pci_bus_type, |
430 | &mvebu_hwcc_nb); | 434 | &mvebu_hwcc_pci_nb); |
431 | return 0; | 435 | return 0; |
432 | } | 436 | } |
433 | 437 | ||
diff --git a/arch/arm/mach-mvebu/headsmp-a9.S b/arch/arm/mach-mvebu/headsmp-a9.S index 5925366bc03c..da5bb292b91c 100644 --- a/arch/arm/mach-mvebu/headsmp-a9.S +++ b/arch/arm/mach-mvebu/headsmp-a9.S | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/linkage.h> | 15 | #include <linux/linkage.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | 17 | ||
18 | #include <asm/assembler.h> | ||
19 | |||
18 | __CPUINIT | 20 | __CPUINIT |
19 | #define CPU_RESUME_ADDR_REG 0xf10182d4 | 21 | #define CPU_RESUME_ADDR_REG 0xf10182d4 |
20 | 22 | ||
@@ -22,13 +24,18 @@ | |||
22 | .global armada_375_smp_cpu1_enable_code_end | 24 | .global armada_375_smp_cpu1_enable_code_end |
23 | 25 | ||
24 | armada_375_smp_cpu1_enable_code_start: | 26 | armada_375_smp_cpu1_enable_code_start: |
25 | ldr r0, [pc, #4] | 27 | ARM_BE8(setend be) |
28 | adr r0, 1f | ||
29 | ldr r0, [r0] | ||
26 | ldr r1, [r0] | 30 | ldr r1, [r0] |
31 | ARM_BE8(rev r1, r1) | ||
27 | mov pc, r1 | 32 | mov pc, r1 |
33 | 1: | ||
28 | .word CPU_RESUME_ADDR_REG | 34 | .word CPU_RESUME_ADDR_REG |
29 | armada_375_smp_cpu1_enable_code_end: | 35 | armada_375_smp_cpu1_enable_code_end: |
30 | 36 | ||
31 | ENTRY(mvebu_cortex_a9_secondary_startup) | 37 | ENTRY(mvebu_cortex_a9_secondary_startup) |
38 | ARM_BE8(setend be) | ||
32 | bl v7_invalidate_l1 | 39 | bl v7_invalidate_l1 |
33 | b secondary_startup | 40 | b secondary_startup |
34 | ENDPROC(mvebu_cortex_a9_secondary_startup) | 41 | ENDPROC(mvebu_cortex_a9_secondary_startup) |
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index a1d407c0febe..25aa8237d668 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c | |||
@@ -201,12 +201,12 @@ static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle) | |||
201 | 201 | ||
202 | /* Test the CR_C bit and set it if it was cleared */ | 202 | /* Test the CR_C bit and set it if it was cleared */ |
203 | asm volatile( | 203 | asm volatile( |
204 | "mrc p15, 0, %0, c1, c0, 0 \n\t" | 204 | "mrc p15, 0, r0, c1, c0, 0 \n\t" |
205 | "tst %0, #(1 << 2) \n\t" | 205 | "tst r0, #(1 << 2) \n\t" |
206 | "orreq %0, %0, #(1 << 2) \n\t" | 206 | "orreq r0, r0, #(1 << 2) \n\t" |
207 | "mcreq p15, 0, %0, c1, c0, 0 \n\t" | 207 | "mcreq p15, 0, r0, c1, c0, 0 \n\t" |
208 | "isb " | 208 | "isb " |
209 | : : "r" (0)); | 209 | : : : "r0"); |
210 | 210 | ||
211 | pr_warn("Failed to suspend the system\n"); | 211 | pr_warn("Failed to suspend the system\n"); |
212 | 212 | ||