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-rw-r--r--Documentation/arm/Marvell/README232
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/dts/dove-cm-a510.dts38
-rw-r--r--arch/arm/boot/dts/dove-cubox.dts42
-rw-r--r--arch/arm/boot/dts/dove-dove-db.dts38
-rw-r--r--arch/arm/boot/dts/dove.dtsi143
-rw-r--r--arch/arm/boot/dts/kirkwood-dockstar.dts57
-rw-r--r--arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts105
-rw-r--r--arch/arm/boot/dts/kirkwood-km_kirkwood.dts29
-rw-r--r--arch/arm/mach-dove/Kconfig7
-rw-r--r--arch/arm/mach-dove/Makefile4
-rw-r--r--arch/arm/mach-dove/Makefile.boot4
-rw-r--r--arch/arm/mach-dove/common.c153
-rw-r--r--arch/arm/mach-dove/common.h4
-rw-r--r--arch/arm/mach-dove/include/mach/pm.h54
-rw-r--r--arch/arm/mach-kirkwood/Kconfig21
-rw-r--r--arch/arm/mach-kirkwood/Makefile3
-rw-r--r--arch/arm/mach-kirkwood/Makefile.boot4
-rw-r--r--arch/arm/mach-kirkwood/board-dockstar.c61
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c12
-rw-r--r--arch/arm/mach-kirkwood/board-iomega_ix2_200.c57
-rw-r--r--arch/arm/mach-kirkwood/board-km_kirkwood.c57
-rw-r--r--arch/arm/mach-kirkwood/common.h18
23 files changed, 1113 insertions, 33 deletions
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
new file mode 100644
index 000000000000..8f08a86e03b7
--- /dev/null
+++ b/Documentation/arm/Marvell/README
@@ -0,0 +1,232 @@
1ARM Marvell SoCs
2================
3
4This document lists all the ARM Marvell SoCs that are currently
5supported in mainline by the Linux kernel. As the Marvell families of
6SoCs are large and complex, it is hard to understand where the support
7for a particular SoC is available in the Linux kernel. This document
8tries to help in understanding where those SoCs are supported, and to
9match them with their corresponding public datasheet, when available.
10
11Orion family
12------------
13
14 Flavors:
15 88F5082
16 88F5181
17 88F5181L
18 88F5182
19 Datasheet : http://www.embeddedarm.com/documentation/third-party/MV88F5182-datasheet.pdf
20 Programmer's User Guide : http://www.embeddedarm.com/documentation/third-party/MV88F5182-opensource-manual.pdf
21 User Manual : http://www.embeddedarm.com/documentation/third-party/MV88F5182-usermanual.pdf
22 88F5281
23 Datasheet : http://www.ocmodshop.com/images/reviews/networking/qnap_ts409u/marvel_88f5281_data_sheet.pdf
24 88F6183
25 Core: Feroceon ARMv5 compatible
26 Linux kernel mach directory: arch/arm/mach-orion5x
27 Linux kernel plat directory: arch/arm/plat-orion
28
29Kirkwood family
30---------------
31
32 Flavors:
33 88F6282 a.k.a Armada 300
34 Product Brief : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf
35 88F6283 a.k.a Armada 310
36 Product Brief : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf
37 88F6190
38 Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6190-003_WEB.pdf
39 Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
40 Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
41 88F6192
42 Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6192-003_ver1.pdf
43 Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
44 Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
45 88F6182
46 88F6180
47 Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6180-003_ver1.pdf
48 Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf
49 Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
50 88F6281
51 Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6281-004_ver1.pdf
52 Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
53 Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
54 Homepage: http://www.marvell.com/embedded-processors/kirkwood/
55 Core: Feroceon ARMv5 compatible
56 Linux kernel mach directory: arch/arm/mach-kirkwood
57 Linux kernel plat directory: arch/arm/plat-orion
58
59Discovery family
60----------------
61
62 Flavors:
63 MV78100
64 Product Brief : http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78100-003_WEB.pdf
65 Hardware Spec : http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78100_OpenSource.pdf
66 Functional Spec: http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf
67 MV78200
68 Product Brief : http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78200-002_WEB.pdf
69 Hardware Spec : http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78200_OpenSource.pdf
70 Functional Spec: http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf
71 MV76100
72 Not supported by the Linux kernel.
73
74 Core: Feroceon ARMv5 compatible
75
76 Linux kernel mach directory: arch/arm/mach-mv78xx0
77 Linux kernel plat directory: arch/arm/plat-orion
78
79EBU Armada family
80-----------------
81
82 Armada 370 Flavors:
83 88F6710
84 88F6707
85 88F6W11
86
87 Armada XP Flavors:
88 MV78230
89 MV78260
90 MV78460
91
92 Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
93 No public datasheet available.
94
95 Core: Sheeva ARMv7 compatible
96
97 Linux kernel mach directory: arch/arm/mach-mvebu
98 Linux kernel plat directory: none
99
100Avanta family
101-------------
102
103 Flavors:
104 88F6510
105 88F6530P
106 88F6550
107 88F6560
108 Homepage : http://www.marvell.com/broadband/
109 Product Brief: http://www.marvell.com/broadband/assets/Marvell_Avanta_88F6510_305_060-001_product_brief.pdf
110 No public datasheet available.
111
112 Core: ARMv5 compatible
113
114 Linux kernel mach directory: no code in mainline yet, planned for the future
115 Linux kernel plat directory: no code in mainline yet, planned for the future
116
117Dove family (application processor)
118-----------------------------------
119
120 Flavors:
121 88AP510 a.k.a Armada 510
122 Product Brief : http://www.marvell.com/application-processors/armada-500/assets/Marvell_Armada510_SoC.pdf
123 Hardware Spec : http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Hardware-Spec.pdf
124 Functional Spec : http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Functional-Spec.pdf
125 Homepage: http://www.marvell.com/application-processors/armada-500/
126 Core: ARMv7 compatible
127 Directory: arch/arm/mach-dove
128
129PXA 2xx/3xx/93x/95x family
130--------------------------
131
132 Flavors:
133 PXA21x, PXA25x, PXA26x
134 Application processor only
135 Core: ARMv5 XScale core
136 PXA270, PXA271, PXA272
137 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_pb.pdf
138 Design guide : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_design_guide.pdf
139 Developers manual : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_dev_man.pdf
140 Specification : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_emts.pdf
141 Specification update : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_spec_update.pdf
142 Application processor only
143 Core: ARMv5 XScale core
144 PXA300, PXA310, PXA320
145 PXA 300 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA300_PB_R4.pdf
146 PXA 310 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA310_PB_R4.pdf
147 PXA 320 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA320_PB_R4.pdf
148 Design guide : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Design_Guide.pdf
149 Developers manual : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Developers_Manual.zip
150 Specifications : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_EMTS.pdf
151 Specification Update : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Spec_Update.zip
152 Reference Manual : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_TavorP_BootROM_Ref_Manual.pdf
153 Application processor only
154 Core: ARMv5 XScale core
155 PXA930, PXA935
156 Application processor with Communication processor
157 Core: ARMv5 XScale core
158 PXA955
159 Application processor with Communication processor
160 Core: ARMv7 compatible Sheeva PJ4 core
161
162 Comments:
163
164 * This line of SoCs originates from the XScale family developed by
165 Intel and acquired by Marvell in ~2006. The PXA21x, PXA25x,
166 PXA26x, PXA27x, PXA3xx and PXA93x were developed by Intel, while
167 the later PXA95x were developed by Marvell.
168
169 * Due to their XScale origin, these SoCs have virtually nothing in
170 common with the other (Kirkwood, Dove, etc.) families of Marvell
171 SoCs, except with the MMP/MMP2 family of SoCs.
172
173 Linux kernel mach directory: arch/arm/mach-pxa
174 Linux kernel plat directory: arch/arm/plat-pxa
175
176MMP/MMP2 family (communication processor)
177-----------------------------------------
178
179 Flavors:
180 PXA168, a.k.a Armada 168
181 Homepage : http://www.marvell.com/application-processors/armada-100/armada-168.jsp
182 Product brief : http://www.marvell.com/application-processors/armada-100/assets/pxa_168_pb.pdf
183 Hardware manual : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_datasheet.pdf
184 Software manual : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_software_manual.pdf
185 Specification update : http://www.marvell.com/application-processors/armada-100/assets/ARMADA16x_Spec_update.pdf
186 Boot ROM manual : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_ref_manual.pdf
187 App node package : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_app_note_package.pdf
188 Application processor only
189 Core: ARMv5 compatible Marvell PJ1 (Mohawk)
190 PXA910
191 Homepage : http://www.marvell.com/communication-processors/pxa910/
192 Product Brief : http://www.marvell.com/communication-processors/pxa910/assets/Marvell_PXA910_Platform-001_PB_final.pdf
193 Application processor with Communication processor
194 Core: ARMv5 compatible Marvell PJ1 (Mohawk)
195 MMP2, a.k.a Armada 610
196 Product Brief : http://www.marvell.com/application-processors/armada-600/assets/armada610_pb.pdf
197 Application processor only
198 Core: ARMv7 compatible Sheeva PJ4 core
199
200 Comments:
201
202 * This line of SoCs originates from the XScale family developed by
203 Intel and acquired by Marvell in ~2006. All the processors of
204 this MMP/MMP2 family were developed by Marvell.
205
206 * Due to their XScale origin, these SoCs have virtually nothing in
207 common with the other (Kirkwood, Dove, etc.) families of Marvell
208 SoCs, except with the PXA family of SoCs listed above.
209
210 Linux kernel mach directory: arch/arm/mach-mmp
211 Linux kernel plat directory: arch/arm/plat-pxa
212
213Long-term plans
214---------------
215
216 * Unify the mach-dove/, mach-mv78xx0/, mach-orion5x/ and
217 mach-kirkwood/ into the mach-mvebu/ to support all SoCs from the
218 Marvell EBU (Engineering Business Unit) in a single mach-<foo>
219 directory. The plat-orion/ would therefore disappear.
220
221 * Unify the mach-mmp/ and mach-pxa/ into the same mach-pxa
222 directory. The plat-pxa/ would therefore disappear.
223
224Credits
225-------
226
227 Maen Suleiman <maen@marvell.com>
228 Lior Amsalem <alior@marvell.com>
229 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
230 Andrew Lunn <andrew@lunn.ch>
231 Nicolas Pitre <nico@fluxnic.net>
232 Eric Miao <eric.y.miao@gmail.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f416422ddb0e..5876aef72dfe 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -537,10 +537,11 @@ config ARCH_IXP4XX
537config ARCH_DOVE 537config ARCH_DOVE
538 bool "Marvell Dove" 538 bool "Marvell Dove"
539 select CPU_V7 539 select CPU_V7
540 select PCI
541 select ARCH_REQUIRE_GPIOLIB 540 select ARCH_REQUIRE_GPIOLIB
542 select GENERIC_CLOCKEVENTS 541 select GENERIC_CLOCKEVENTS
542 select MIGHT_HAVE_PCI
543 select PLAT_ORION 543 select PLAT_ORION
544 select USB_ARCH_HAS_EHCI
544 help 545 help
545 Support for the Marvell Dove SoC 88AP510 546 Support for the Marvell Dove SoC 88AP510
546 547
diff --git a/arch/arm/boot/dts/dove-cm-a510.dts b/arch/arm/boot/dts/dove-cm-a510.dts
new file mode 100644
index 000000000000..61a8062e56de
--- /dev/null
+++ b/arch/arm/boot/dts/dove-cm-a510.dts
@@ -0,0 +1,38 @@
1/dts-v1/;
2
3/include/ "dove.dtsi"
4
5/ {
6 model = "Compulab CM-A510";
7 compatible = "compulab,cm-a510", "marvell,dove";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x40000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200n8 earlyprintk";
16 };
17};
18
19&uart0 { status = "okay"; };
20&uart1 { status = "okay"; };
21&sdio0 { status = "okay"; };
22&sdio1 { status = "okay"; };
23&sata0 { status = "okay"; };
24
25&spi0 {
26 status = "okay";
27
28 /* spi0.0: 4M Flash Winbond W25Q32BV */
29 spi-flash@0 {
30 compatible = "st,w25q32";
31 spi-max-frequency = <20000000>;
32 reg = <0>;
33 };
34};
35
36&i2c0 {
37 status = "okay";
38};
diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts
new file mode 100644
index 000000000000..0adbd5a38095
--- /dev/null
+++ b/arch/arm/boot/dts/dove-cubox.dts
@@ -0,0 +1,42 @@
1/dts-v1/;
2
3/include/ "dove.dtsi"
4
5/ {
6 model = "SolidRun CuBox";
7 compatible = "solidrun,cubox", "marvell,dove";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x40000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200n8 earlyprintk";
16 };
17
18 leds {
19 compatible = "gpio-leds";
20 power {
21 label = "Power";
22 gpios = <&gpio0 18 1>;
23 linux,default-trigger = "default-on";
24 };
25 };
26};
27
28&uart0 { status = "okay"; };
29&sdio0 { status = "okay"; };
30&sata0 { status = "okay"; };
31&i2c0 { status = "okay"; };
32
33&spi0 {
34 status = "okay";
35
36 /* spi0.0: 4M Flash Winbond W25Q32BV */
37 spi-flash@0 {
38 compatible = "st,w25q32";
39 spi-max-frequency = <20000000>;
40 reg = <0>;
41 };
42};
diff --git a/arch/arm/boot/dts/dove-dove-db.dts b/arch/arm/boot/dts/dove-dove-db.dts
new file mode 100644
index 000000000000..e5a920beab45
--- /dev/null
+++ b/arch/arm/boot/dts/dove-dove-db.dts
@@ -0,0 +1,38 @@
1/dts-v1/;
2
3/include/ "dove.dtsi"
4
5/ {
6 model = "Marvell DB-MV88AP510-BP Development Board";
7 compatible = "marvell,dove-db", "marvell,dove";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x40000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200n8 earlyprintk";
16 };
17};
18
19&uart0 { status = "okay"; };
20&uart1 { status = "okay"; };
21&sdio0 { status = "okay"; };
22&sdio1 { status = "okay"; };
23&sata0 { status = "okay"; };
24
25&spi0 {
26 status = "okay";
27
28 /* spi0.0: 4M Flash ST-M25P32-VMF6P */
29 spi-flash@0 {
30 compatible = "st,m25p32";
31 spi-max-frequency = <20000000>;
32 reg = <0>;
33 };
34};
35
36&i2c0 {
37 status = "okay";
38};
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
new file mode 100644
index 000000000000..96fb824b5e6e
--- /dev/null
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -0,0 +1,143 @@
1/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "marvell,dove";
5 model = "Marvell Armada 88AP510 SoC";
6
7 interrupt-parent = <&intc>;
8
9 intc: interrupt-controller {
10 compatible = "marvell,orion-intc";
11 interrupt-controller;
12 #interrupt-cells = <1>;
13 reg = <0xf1020204 0x04>,
14 <0xf1020214 0x04>;
15 };
16
17 mbus@f1000000 {
18 compatible = "simple-bus";
19 ranges = <0 0xf1000000 0x4000000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 uart0: serial@12000 {
24 compatible = "ns16550a";
25 reg = <0x12000 0x100>;
26 reg-shift = <2>;
27 interrupts = <7>;
28 clock-frequency = <166666667>;
29 status = "disabled";
30 };
31
32 uart1: serial@12100 {
33 compatible = "ns16550a";
34 reg = <0x12100 0x100>;
35 reg-shift = <2>;
36 interrupts = <8>;
37 clock-frequency = <166666667>;
38 status = "disabled";
39 };
40
41 uart2: serial@12200 {
42 compatible = "ns16550a";
43 reg = <0x12000 0x100>;
44 reg-shift = <2>;
45 interrupts = <9>;
46 clock-frequency = <166666667>;
47 status = "disabled";
48 };
49
50 uart3: serial@12300 {
51 compatible = "ns16550a";
52 reg = <0x12100 0x100>;
53 reg-shift = <2>;
54 interrupts = <10>;
55 clock-frequency = <166666667>;
56 status = "disabled";
57 };
58
59 wdt: wdt@20300 {
60 compatible = "marvell,orion-wdt";
61 reg = <0x20300 0x28>;
62 };
63
64 gpio0: gpio@d0400 {
65 compatible = "marvell,orion-gpio";
66 #gpio-cells = <2>;
67 gpio-controller;
68 reg = <0xd0400 0x20>;
69 ngpio = <32>;
70 interrupts = <12>, <13>, <14>, <60>;
71 };
72
73 gpio1: gpio@d0420 {
74 compatible = "marvell,orion-gpio";
75 #gpio-cells = <2>;
76 gpio-controller;
77 reg = <0xd0420 0x20>;
78 ngpio = <32>;
79 interrupts = <61>;
80 };
81
82 gpio2: gpio@e8400 {
83 compatible = "marvell,orion-gpio";
84 #gpio-cells = <2>;
85 gpio-controller;
86 reg = <0xe8400 0x0c>;
87 ngpio = <8>;
88 };
89
90 spi0: spi@10600 {
91 compatible = "marvell,orion-spi";
92 #address-cells = <1>;
93 #size-cells = <0>;
94 cell-index = <0>;
95 interrupts = <6>;
96 reg = <0x10600 0x28>;
97 status = "disabled";
98 };
99
100 spi1: spi@14600 {
101 compatible = "marvell,orion-spi";
102 #address-cells = <1>;
103 #size-cells = <0>;
104 cell-index = <1>;
105 interrupts = <5>;
106 reg = <0x14600 0x28>;
107 status = "disabled";
108 };
109
110 i2c0: i2c@11000 {
111 compatible = "marvell,mv64xxx-i2c";
112 reg = <0x11000 0x20>;
113 #address-cells = <1>;
114 #size-cells = <0>;
115 interrupts = <11>;
116 clock-frequency = <400000>;
117 timeout-ms = <1000>;
118 status = "disabled";
119 };
120
121 sdio0: sdio@92000 {
122 compatible = "marvell,dove-sdhci";
123 reg = <0x92000 0x100>;
124 interrupts = <35>, <37>;
125 status = "disabled";
126 };
127
128 sdio1: sdio@90000 {
129 compatible = "marvell,dove-sdhci";
130 reg = <0x90000 0x100>;
131 interrupts = <36>, <38>;
132 status = "disabled";
133 };
134
135 sata0: sata@a0000 {
136 compatible = "marvell,orion-sata";
137 reg = <0xa0000 0x2400>;
138 interrupts = <62>;
139 nr-ports = <1>;
140 status = "disabled";
141 };
142 };
143};
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts
new file mode 100644
index 000000000000..08a582414b88
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -0,0 +1,57 @@
1/dts-v1/;
2
3/include/ "kirkwood.dtsi"
4
5/ {
6 model = "Seagate FreeAgent Dockstar";
7 compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x8000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
16 };
17
18 ocp@f1000000 {
19 serial@12000 {
20 clock-frequency = <200000000>;
21 status = "ok";
22 };
23
24 nand@3000000 {
25 status = "okay";
26
27 partition@0 {
28 label = "u-boot";
29 reg = <0x0000000 0x100000>;
30 read-only;
31 };
32
33 partition@100000 {
34 label = "uImage";
35 reg = <0x0100000 0x400000>;
36 };
37
38 partition@500000 {
39 label = "data";
40 reg = <0x0500000 0xfb00000>;
41 };
42 };
43 };
44 gpio-leds {
45 compatible = "gpio-leds";
46
47 health {
48 label = "status:green:health";
49 gpios = <&gpio1 14 1>;
50 linux,default-trigger = "default-on";
51 };
52 fault {
53 label = "status:orange:fault";
54 gpios = <&gpio1 15 1>;
55 };
56 };
57};
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
new file mode 100644
index 000000000000..865aeec40a26
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -0,0 +1,105 @@
1/dts-v1/;
2
3/include/ "kirkwood.dtsi"
4
5/ {
6 model = "Iomega StorCenter ix2-200";
7 compatible = "iom,ix2-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200n8 earlyprintk";
16 };
17
18 ocp@f1000000 {
19 i2c@11000 {
20 status = "okay";
21
22 lm63: lm63@4c {
23 compatible = "national,lm63";
24 reg = <0x4c>;
25 };
26 };
27
28 serial@12000 {
29 clock-frequency = <200000000>;
30 status = "ok";
31 };
32
33 nand@3000000 {
34 status = "okay";
35
36 partition@0 {
37 label = "u-boot";
38 reg = <0x0000000 0x100000>;
39 read-only;
40 };
41
42 partition@a0000 {
43 label = "env";
44 reg = <0xa0000 0x20000>;
45 read-only;
46 };
47
48 partition@100000 {
49 label = "uImage";
50 reg = <0x100000 0x300000>;
51 };
52
53 partition@400000 {
54 label = "uInitrd";
55 reg = <0x540000 0x1000000>;
56 };
57 };
58 sata@80000 {
59 status = "okay";
60 nr-ports = <2>;
61 };
62
63 };
64 gpio-leds {
65 compatible = "gpio-leds";
66
67 power_led {
68 label = "status:white:power_led";
69 gpios = <&gpio0 16 0>;
70 linux,default-trigger = "default-on";
71 };
72 health_led1 {
73 label = "status:red:health_led";
74 gpios = <&gpio1 5 0>;
75 };
76 health_led2 {
77 label = "status:white:health_led";
78 gpios = <&gpio1 4 0>;
79 };
80 backup_led {
81 label = "status:blue:backup_led";
82 gpios = <&gpio0 15 0>;
83 };
84 };
85 gpio-keys {
86 compatible = "gpio-keys";
87 #address-cells = <1>;
88 #size-cells = <0>;
89 Power {
90 label = "Power Button";
91 linux,code = <116>;
92 gpios = <&gpio0 14 1>;
93 };
94 Reset {
95 label = "Reset Button";
96 linux,code = <0x198>;
97 gpios = <&gpio0 12 1>;
98 };
99 OTB {
100 label = "OTB Button";
101 linux,code = <133>;
102 gpios = <&gpio1 3 1>;
103 };
104 };
105};
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
new file mode 100644
index 000000000000..75bdb93fed26
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -0,0 +1,29 @@
1/dts-v1/;
2
3/include/ "kirkwood.dtsi"
4
5/ {
6 model = "Keymile Kirkwood Reference Design";
7 compatible = "keymile,km_kirkwood", "marvell,kirkwood-98DX4122", "marvell,kirkwood";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x08000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200n8 earlyprintk";
16 };
17
18 ocp@f1000000 {
19 serial@12000 {
20 clock-frequency = <200000000>;
21 status = "ok";
22 };
23
24 nand@3000000 {
25 status = "ok";
26 chip-delay = <25>;
27 };
28 };
29};
diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig
index dd937c526a45..00154e74ce6b 100644
--- a/arch/arm/mach-dove/Kconfig
+++ b/arch/arm/mach-dove/Kconfig
@@ -15,6 +15,13 @@ config MACH_CM_A510
15 Say 'Y' here if you want your kernel to support the 15 Say 'Y' here if you want your kernel to support the
16 CompuLab CM-A510 Board. 16 CompuLab CM-A510 Board.
17 17
18config MACH_DOVE_DT
19 bool "Marvell Dove Flattened Device Tree"
20 select USE_OF
21 help
22 Say 'Y' here if you want your kernel to support the
23 Marvell Dove using flattened device tree.
24
18endmenu 25endmenu
19 26
20endif 27endif
diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile
index fa0f01856060..5e683baf96cf 100644
--- a/arch/arm/mach-dove/Makefile
+++ b/arch/arm/mach-dove/Makefile
@@ -1,4 +1,4 @@
1obj-y += common.o addr-map.o irq.o pcie.o mpp.o 1obj-y += common.o addr-map.o irq.o mpp.o
2 2obj-$(CONFIG_PCI) += pcie.o
3obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o 3obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o
4obj-$(CONFIG_MACH_CM_A510) += cm-a510.o 4obj-$(CONFIG_MACH_CM_A510) += cm-a510.o
diff --git a/arch/arm/mach-dove/Makefile.boot b/arch/arm/mach-dove/Makefile.boot
index 760a0efe7580..cfac9c5157cc 100644
--- a/arch/arm/mach-dove/Makefile.boot
+++ b/arch/arm/mach-dove/Makefile.boot
@@ -1,3 +1,7 @@
1 zreladdr-y += 0x00008000 1 zreladdr-y += 0x00008000
2params_phys-y := 0x00000100 2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000 3initrd_phys-y := 0x00800000
4
5dtb-$(CONFIG_MACH_DOVE_DT) += dove-dove-db.dtb
6dtb-$(CONFIG_MACH_DOVE_DT) += dove-cm-a510.dtb
7dtb-$(CONFIG_MACH_DOVE_DT) += dove-cubox.dtb
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 950ad9533d19..28475bb7d36f 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -16,6 +16,8 @@
16#include <linux/clk-provider.h> 16#include <linux/clk-provider.h>
17#include <linux/ata_platform.h> 17#include <linux/ata_platform.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
20#include <linux/of_platform.h>
19#include <asm/page.h> 21#include <asm/page.h>
20#include <asm/setup.h> 22#include <asm/setup.h>
21#include <asm/timex.h> 23#include <asm/timex.h>
@@ -24,6 +26,7 @@
24#include <asm/mach/time.h> 26#include <asm/mach/time.h>
25#include <asm/mach/pci.h> 27#include <asm/mach/pci.h>
26#include <mach/dove.h> 28#include <mach/dove.h>
29#include <mach/pm.h>
27#include <mach/bridge-regs.h> 30#include <mach/bridge-regs.h>
28#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
29#include <linux/irq.h> 32#include <linux/irq.h>
@@ -33,8 +36,6 @@
33#include <plat/addr-map.h> 36#include <plat/addr-map.h>
34#include "common.h" 37#include "common.h"
35 38
36static int get_tclk(void);
37
38/***************************************************************************** 39/*****************************************************************************
39 * I/O Address Mapping 40 * I/O Address Mapping
40 ****************************************************************************/ 41 ****************************************************************************/
@@ -60,14 +61,69 @@ void __init dove_map_io(void)
60/***************************************************************************** 61/*****************************************************************************
61 * CLK tree 62 * CLK tree
62 ****************************************************************************/ 63 ****************************************************************************/
64static int dove_tclk;
65
66static DEFINE_SPINLOCK(gating_lock);
63static struct clk *tclk; 67static struct clk *tclk;
64 68
65static void __init clk_init(void) 69static struct clk __init *dove_register_gate(const char *name,
70 const char *parent, u8 bit_idx)
66{ 71{
67 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT, 72 return clk_register_gate(NULL, name, parent, 0,
68 get_tclk()); 73 (void __iomem *)CLOCK_GATING_CONTROL,
74 bit_idx, 0, &gating_lock);
75}
76
77static void __init dove_clk_init(void)
78{
79 struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
80 struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
81 struct clk *xor0, *xor1, *ge, *gephy;
69 82
70 orion_clkdev_init(tclk); 83 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
84 dove_tclk);
85
86 usb0 = dove_register_gate("usb0", "tclk", CLOCK_GATING_BIT_USB0);
87 usb1 = dove_register_gate("usb1", "tclk", CLOCK_GATING_BIT_USB1);
88 sata = dove_register_gate("sata", "tclk", CLOCK_GATING_BIT_SATA);
89 pex0 = dove_register_gate("pex0", "tclk", CLOCK_GATING_BIT_PCIE0);
90 pex1 = dove_register_gate("pex1", "tclk", CLOCK_GATING_BIT_PCIE1);
91 sdio0 = dove_register_gate("sdio0", "tclk", CLOCK_GATING_BIT_SDIO0);
92 sdio1 = dove_register_gate("sdio1", "tclk", CLOCK_GATING_BIT_SDIO1);
93 nand = dove_register_gate("nand", "tclk", CLOCK_GATING_BIT_NAND);
94 camera = dove_register_gate("camera", "tclk", CLOCK_GATING_BIT_CAMERA);
95 i2s0 = dove_register_gate("i2s0", "tclk", CLOCK_GATING_BIT_I2S0);
96 i2s1 = dove_register_gate("i2s1", "tclk", CLOCK_GATING_BIT_I2S1);
97 crypto = dove_register_gate("crypto", "tclk", CLOCK_GATING_BIT_CRYPTO);
98 ac97 = dove_register_gate("ac97", "tclk", CLOCK_GATING_BIT_AC97);
99 pdma = dove_register_gate("pdma", "tclk", CLOCK_GATING_BIT_PDMA);
100 xor0 = dove_register_gate("xor0", "tclk", CLOCK_GATING_BIT_XOR0);
101 xor1 = dove_register_gate("xor1", "tclk", CLOCK_GATING_BIT_XOR1);
102 gephy = dove_register_gate("gephy", "tclk", CLOCK_GATING_BIT_GIGA_PHY);
103 ge = dove_register_gate("ge", "gephy", CLOCK_GATING_BIT_GBE);
104
105 orion_clkdev_add(NULL, "orion_spi.0", tclk);
106 orion_clkdev_add(NULL, "orion_spi.1", tclk);
107 orion_clkdev_add(NULL, "orion_wdt", tclk);
108 orion_clkdev_add(NULL, "mv64xxx_i2c.0", tclk);
109
110 orion_clkdev_add(NULL, "orion-ehci.0", usb0);
111 orion_clkdev_add(NULL, "orion-ehci.1", usb1);
112 orion_clkdev_add(NULL, "mv643xx_eth.0", ge);
113 orion_clkdev_add("0", "sata_mv.0", sata);
114 orion_clkdev_add("0", "pcie", pex0);
115 orion_clkdev_add("1", "pcie", pex1);
116 orion_clkdev_add(NULL, "sdhci-dove.0", sdio0);
117 orion_clkdev_add(NULL, "sdhci-dove.1", sdio1);
118 orion_clkdev_add(NULL, "orion_nand", nand);
119 orion_clkdev_add(NULL, "cafe1000-ccic.0", camera);
120 orion_clkdev_add(NULL, "kirkwood-i2s.0", i2s0);
121 orion_clkdev_add(NULL, "kirkwood-i2s.1", i2s1);
122 orion_clkdev_add(NULL, "mv_crypto", crypto);
123 orion_clkdev_add(NULL, "dove-ac97", ac97);
124 orion_clkdev_add(NULL, "dove-pdma", pdma);
125 orion_clkdev_add(NULL, "mv_xor_shared.0", xor0);
126 orion_clkdev_add(NULL, "mv_xor_shared.1", xor1);
71} 127}
72 128
73/***************************************************************************** 129/*****************************************************************************
@@ -178,16 +234,16 @@ void __init dove_init_early(void)
178 orion_time_set_base(TIMER_VIRT_BASE); 234 orion_time_set_base(TIMER_VIRT_BASE);
179} 235}
180 236
181static int get_tclk(void) 237static int __init dove_find_tclk(void)
182{ 238{
183 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
184 return 166666667; 239 return 166666667;
185} 240}
186 241
187static void __init dove_timer_init(void) 242static void __init dove_timer_init(void)
188{ 243{
244 dove_tclk = dove_find_tclk();
189 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, 245 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
190 IRQ_DOVE_BRIDGE, get_tclk()); 246 IRQ_DOVE_BRIDGE, dove_tclk);
191} 247}
192 248
193struct sys_timer dove_timer = { 249struct sys_timer dove_timer = {
@@ -195,6 +251,15 @@ struct sys_timer dove_timer = {
195}; 251};
196 252
197/***************************************************************************** 253/*****************************************************************************
254 * Cryptographic Engines and Security Accelerator (CESA)
255 ****************************************************************************/
256void __init dove_crypto_init(void)
257{
258 orion_crypto_init(DOVE_CRYPT_PHYS_BASE, DOVE_CESA_PHYS_BASE,
259 DOVE_CESA_SIZE, IRQ_DOVE_CRYPTO);
260}
261
262/*****************************************************************************
198 * XOR 0 263 * XOR 0
199 ****************************************************************************/ 264 ****************************************************************************/
200void __init dove_xor0_init(void) 265void __init dove_xor0_init(void)
@@ -275,8 +340,8 @@ void __init dove_sdio1_init(void)
275 340
276void __init dove_init(void) 341void __init dove_init(void)
277{ 342{
278 printk(KERN_INFO "Dove 88AP510 SoC, "); 343 pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
279 printk(KERN_INFO "TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000); 344 (dove_tclk + 499999) / 1000000);
280 345
281#ifdef CONFIG_CACHE_TAUROS2 346#ifdef CONFIG_CACHE_TAUROS2
282 tauros2_init(0); 347 tauros2_init(0);
@@ -284,7 +349,7 @@ void __init dove_init(void)
284 dove_setup_cpu_mbus(); 349 dove_setup_cpu_mbus();
285 350
286 /* Setup root of clk tree */ 351 /* Setup root of clk tree */
287 clk_init(); 352 dove_clk_init();
288 353
289 /* internal devices that every board has */ 354 /* internal devices that every board has */
290 dove_rtc_init(); 355 dove_rtc_init();
@@ -307,3 +372,67 @@ void dove_restart(char mode, const char *cmd)
307 while (1) 372 while (1)
308 ; 373 ;
309} 374}
375
376#if defined(CONFIG_MACH_DOVE_DT)
377/*
378 * Auxdata required until real OF clock provider
379 */
380struct of_dev_auxdata dove_auxdata_lookup[] __initdata = {
381 OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
382 OF_DEV_AUXDATA("marvell,orion-spi", 0xf1014600, "orion_spi.1", NULL),
383 OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
384 OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
385 NULL),
386 OF_DEV_AUXDATA("marvell,orion-sata", 0xf10a0000, "sata_mv.0", NULL),
387 OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1092000, "sdhci-dove.0", NULL),
388 OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1090000, "sdhci-dove.1", NULL),
389 {},
390};
391
392static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
393 .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
394};
395
396static void __init dove_dt_init(void)
397{
398 pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
399 (dove_tclk + 499999) / 1000000);
400
401#ifdef CONFIG_CACHE_TAUROS2
402 tauros2_init();
403#endif
404 dove_setup_cpu_mbus();
405
406 /* Setup root of clk tree */
407 dove_clk_init();
408
409 /* Internal devices not ported to DT yet */
410 dove_rtc_init();
411 dove_xor0_init();
412 dove_xor1_init();
413
414 dove_ge00_init(&dove_dt_ge00_data);
415 dove_ehci0_init();
416 dove_ehci1_init();
417 dove_pcie_init(1, 1);
418 dove_crypto_init();
419
420 of_platform_populate(NULL, of_default_bus_match_table,
421 dove_auxdata_lookup, NULL);
422}
423
424static const char * const dove_dt_board_compat[] = {
425 "marvell,dove",
426 NULL
427};
428
429DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
430 .map_io = dove_map_io,
431 .init_early = dove_init_early,
432 .init_irq = orion_dt_init_irq,
433 .timer = &dove_timer,
434 .init_machine = dove_dt_init,
435 .restart = dove_restart,
436 .dt_compat = dove_dt_board_compat,
437MACHINE_END
438#endif
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 6432a3ba864b..1a233404b735 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -26,7 +26,11 @@ void dove_init_irq(void);
26void dove_setup_cpu_mbus(void); 26void dove_setup_cpu_mbus(void);
27void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data); 27void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data);
28void dove_sata_init(struct mv_sata_platform_data *sata_data); 28void dove_sata_init(struct mv_sata_platform_data *sata_data);
29#ifdef CONFIG_PCI
29void dove_pcie_init(int init_port0, int init_port1); 30void dove_pcie_init(int init_port0, int init_port1);
31#else
32static inline void dove_pcie_init(int init_port0, int init_port1) { }
33#endif
30void dove_ehci0_init(void); 34void dove_ehci0_init(void);
31void dove_ehci1_init(void); 35void dove_ehci1_init(void);
32void dove_uart0_init(void); 36void dove_uart0_init(void);
diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h
index 3ad9f946a9e8..7bcd0dfce4b1 100644
--- a/arch/arm/mach-dove/include/mach/pm.h
+++ b/arch/arm/mach-dove/include/mach/pm.h
@@ -13,24 +13,42 @@
13#include <mach/irqs.h> 13#include <mach/irqs.h>
14 14
15#define CLOCK_GATING_CONTROL (DOVE_PMU_VIRT_BASE + 0x38) 15#define CLOCK_GATING_CONTROL (DOVE_PMU_VIRT_BASE + 0x38)
16#define CLOCK_GATING_USB0_MASK (1 << 0) 16#define CLOCK_GATING_BIT_USB0 0
17#define CLOCK_GATING_USB1_MASK (1 << 1) 17#define CLOCK_GATING_BIT_USB1 1
18#define CLOCK_GATING_GBE_MASK (1 << 2) 18#define CLOCK_GATING_BIT_GBE 2
19#define CLOCK_GATING_SATA_MASK (1 << 3) 19#define CLOCK_GATING_BIT_SATA 3
20#define CLOCK_GATING_PCIE0_MASK (1 << 4) 20#define CLOCK_GATING_BIT_PCIE0 4
21#define CLOCK_GATING_PCIE1_MASK (1 << 5) 21#define CLOCK_GATING_BIT_PCIE1 5
22#define CLOCK_GATING_SDIO0_MASK (1 << 8) 22#define CLOCK_GATING_BIT_SDIO0 8
23#define CLOCK_GATING_SDIO1_MASK (1 << 9) 23#define CLOCK_GATING_BIT_SDIO1 9
24#define CLOCK_GATING_NAND_MASK (1 << 10) 24#define CLOCK_GATING_BIT_NAND 10
25#define CLOCK_GATING_CAMERA_MASK (1 << 11) 25#define CLOCK_GATING_BIT_CAMERA 11
26#define CLOCK_GATING_I2S0_MASK (1 << 12) 26#define CLOCK_GATING_BIT_I2S0 12
27#define CLOCK_GATING_I2S1_MASK (1 << 13) 27#define CLOCK_GATING_BIT_I2S1 13
28#define CLOCK_GATING_CRYPTO_MASK (1 << 15) 28#define CLOCK_GATING_BIT_CRYPTO 15
29#define CLOCK_GATING_AC97_MASK (1 << 21) 29#define CLOCK_GATING_BIT_AC97 21
30#define CLOCK_GATING_PDMA_MASK (1 << 22) 30#define CLOCK_GATING_BIT_PDMA 22
31#define CLOCK_GATING_XOR0_MASK (1 << 23) 31#define CLOCK_GATING_BIT_XOR0 23
32#define CLOCK_GATING_XOR1_MASK (1 << 24) 32#define CLOCK_GATING_BIT_XOR1 24
33#define CLOCK_GATING_GIGA_PHY_MASK (1 << 30) 33#define CLOCK_GATING_BIT_GIGA_PHY 30
34#define CLOCK_GATING_USB0_MASK (1 << CLOCK_GATING_BIT_USB0)
35#define CLOCK_GATING_USB1_MASK (1 << CLOCK_GATING_BIT_USB1)
36#define CLOCK_GATING_GBE_MASK (1 << CLOCK_GATING_BIT_GBE)
37#define CLOCK_GATING_SATA_MASK (1 << CLOCK_GATING_BIT_SATA)
38#define CLOCK_GATING_PCIE0_MASK (1 << CLOCK_GATING_BIT_PCIE0)
39#define CLOCK_GATING_PCIE1_MASK (1 << CLOCK_GATING_BIT_PCIE1)
40#define CLOCK_GATING_SDIO0_MASK (1 << CLOCK_GATING_BIT_SDIO0)
41#define CLOCK_GATING_SDIO1_MASK (1 << CLOCK_GATING_BIT_SDIO1)
42#define CLOCK_GATING_NAND_MASK (1 << CLOCK_GATING_BIT_NAND)
43#define CLOCK_GATING_CAMERA_MASK (1 << CLOCK_GATING_BIT_CAMERA)
44#define CLOCK_GATING_I2S0_MASK (1 << CLOCK_GATING_BIT_I2S0)
45#define CLOCK_GATING_I2S1_MASK (1 << CLOCK_GATING_BIT_I2S1)
46#define CLOCK_GATING_CRYPTO_MASK (1 << CLOCK_GATING_BIT_CRYPTO)
47#define CLOCK_GATING_AC97_MASK (1 << CLOCK_GATING_BIT_AC97)
48#define CLOCK_GATING_PDMA_MASK (1 << CLOCK_GATING_BIT_PDMA)
49#define CLOCK_GATING_XOR0_MASK (1 << CLOCK_GATING_BIT_XOR0)
50#define CLOCK_GATING_XOR1_MASK (1 << CLOCK_GATING_BIT_XOR1)
51#define CLOCK_GATING_GIGA_PHY_MASK (1 << CLOCK_GATING_BIT_GIGA_PHY)
34 52
35#define PMU_INTERRUPT_CAUSE (DOVE_PMU_VIRT_BASE + 0x50) 53#define PMU_INTERRUPT_CAUSE (DOVE_PMU_VIRT_BASE + 0x50)
36#define PMU_INTERRUPT_MASK (DOVE_PMU_VIRT_BASE + 0x54) 54#define PMU_INTERRUPT_MASK (DOVE_PMU_VIRT_BASE + 0x54)
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index ca5c15a4e626..50bca5032b7e 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -94,6 +94,13 @@ config MACH_TS219_DT
94 or MV6282. If you have the wrong one, the buttons will not 94 or MV6282. If you have the wrong one, the buttons will not
95 work. 95 work.
96 96
97config MACH_DOCKSTAR_DT
98 bool "Seagate FreeAgent Dockstar (Flattened Device Tree)"
99 select ARCH_KIRKWOOD_DT
100 help
101 Say 'Y' here if you want your kernel to support the
102 Seagate FreeAgent Dockstar (Flattened Device Tree).
103
97config MACH_GOFLEXNET_DT 104config MACH_GOFLEXNET_DT
98 bool "Seagate GoFlex Net (Flattened Device Tree)" 105 bool "Seagate GoFlex Net (Flattened Device Tree)"
99 select ARCH_KIRKWOOD_DT 106 select ARCH_KIRKWOOD_DT
@@ -109,6 +116,20 @@ config MACH_LSXL_DT
109 Buffalo Linkstation LS-XHL & LS-CHLv2 devices, using 116 Buffalo Linkstation LS-XHL & LS-CHLv2 devices, using
110 Flattened Device Tree. 117 Flattened Device Tree.
111 118
119config MACH_IOMEGA_IX2_200_DT
120 bool "Iomega StorCenter ix2-200 (Flattened Device Tree)"
121 select ARCH_KIRKWOOD_DT
122 help
123 Say 'Y' here if you want your kernel to support the
124 Iomega StorCenter ix2-200 (Flattened Device Tree).
125
126config MACH_KM_KIRKWOOD_DT
127 bool "Keymile Kirkwood Reference Design (Flattened Device Tree)"
128 select ARCH_KIRKWOOD_DT
129 help
130 Say 'Y' here if you want your kernel to support the
131 Keymile Kirkwood Reference Desgin, using Flattened Device Tree.
132
112config MACH_TS219 133config MACH_TS219
113 bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" 134 bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"
114 help 135 help
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 055c85a1cc46..294779f892d9 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -26,5 +26,8 @@ obj-$(CONFIG_MACH_ICONNECT_DT) += board-iconnect.o
26obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o 26obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o
27obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o 27obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o
28obj-$(CONFIG_MACH_TS219_DT) += board-ts219.o tsx1x-common.o 28obj-$(CONFIG_MACH_TS219_DT) += board-ts219.o tsx1x-common.o
29obj-$(CONFIG_MACH_DOCKSTAR_DT) += board-dockstar.o
29obj-$(CONFIG_MACH_GOFLEXNET_DT) += board-goflexnet.o 30obj-$(CONFIG_MACH_GOFLEXNET_DT) += board-goflexnet.o
30obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o 31obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o
32obj-$(CONFIG_MACH_IOMEGA_IX2_200_DT) += board-iomega_ix2_200.o
33obj-$(CONFIG_MACH_KM_KIRKWOOD_DT) += board-km_kirkwood.o
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot
index 760a0efe7580..d90b3cb0209e 100644
--- a/arch/arm/mach-kirkwood/Makefile.boot
+++ b/arch/arm/mach-kirkwood/Makefile.boot
@@ -1,3 +1,7 @@
1 zreladdr-y += 0x00008000 1 zreladdr-y += 0x00008000
2params_phys-y := 0x00000100 2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000 3initrd_phys-y := 0x00800000
4
5dtb-$(CONFIG_MACH_IOMEGA_IX2_200_DT) += kirkwood-iomega_ix2_200.dtb
6dtb-$(CONFIG_MACH_DOCKSTAR_DT) += kirkwood-dockstar.dtb
7dtb-$(CONFIG_MACH_KM_KIRKWOOD_DT) += kirkwood-km_kirkwood.dtb
diff --git a/arch/arm/mach-kirkwood/board-dockstar.c b/arch/arm/mach-kirkwood/board-dockstar.c
new file mode 100644
index 000000000000..6beff21b4a0d
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-dockstar.c
@@ -0,0 +1,61 @@
1/*
2 * arch/arm/mach-kirkwood/board-dockstar.c
3 *
4 * Seagate FreeAgent Dockstar Board Init for drivers not converted to
5 * flattened device tree yet.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 *
11 * Copied and modified for Seagate GoFlex Net support by
12 * Joshua Coombs <josh.coombs@gmail.com> based on ArchLinux ARM's
13 * GoFlex kernel patches.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/ata_platform.h>
21#include <linux/mv643xx_eth.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
24#include <linux/of_fdt.h>
25#include <linux/of_irq.h>
26#include <linux/of_platform.h>
27#include <linux/gpio.h>
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <mach/kirkwood.h>
32#include <mach/bridge-regs.h>
33#include <plat/mvsdio.h>
34#include "common.h"
35#include "mpp.h"
36
37static struct mv643xx_eth_platform_data dockstar_ge00_data = {
38 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
39};
40
41static unsigned int dockstar_mpp_config[] __initdata = {
42 MPP29_GPIO, /* USB Power Enable */
43 MPP46_GPIO, /* LED green */
44 MPP47_GPIO, /* LED orange */
45 0
46};
47
48void __init dockstar_dt_init(void)
49{
50 /*
51 * Basic setup. Needs to be called early.
52 */
53 kirkwood_mpp_conf(dockstar_mpp_config);
54
55 if (gpio_request(29, "USB Power Enable") != 0 ||
56 gpio_direction_output(29, 1) != 0)
57 pr_err("can't setup GPIO 29 (USB Power Enable)\n");
58 kirkwood_ehci_init();
59
60 kirkwood_ge00_init(&dockstar_ge00_data);
61}
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index e4eb450de301..496554664e08 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -81,12 +81,21 @@ static void __init kirkwood_dt_init(void)
81 if (of_machine_is_compatible("qnap,ts219")) 81 if (of_machine_is_compatible("qnap,ts219"))
82 qnap_dt_ts219_init(); 82 qnap_dt_ts219_init();
83 83
84 if (of_machine_is_compatible("seagate,dockstar"))
85 dockstar_dt_init();
86
84 if (of_machine_is_compatible("seagate,goflexnet")) 87 if (of_machine_is_compatible("seagate,goflexnet"))
85 goflexnet_init(); 88 goflexnet_init();
86 89
87 if (of_machine_is_compatible("buffalo,lsxl")) 90 if (of_machine_is_compatible("buffalo,lsxl"))
88 lsxl_init(); 91 lsxl_init();
89 92
93 if (of_machine_is_compatible("iom,ix2-200"))
94 iomega_ix2_200_init();
95
96 if (of_machine_is_compatible("keymile,km_kirkwood"))
97 km_kirkwood_init();
98
90 of_platform_populate(NULL, kirkwood_dt_match_table, 99 of_platform_populate(NULL, kirkwood_dt_match_table,
91 kirkwood_auxdata_lookup, NULL); 100 kirkwood_auxdata_lookup, NULL);
92} 101}
@@ -98,8 +107,11 @@ static const char *kirkwood_dt_board_compat[] = {
98 "iom,iconnect", 107 "iom,iconnect",
99 "raidsonic,ib-nas62x0", 108 "raidsonic,ib-nas62x0",
100 "qnap,ts219", 109 "qnap,ts219",
110 "seagate,dockstar",
101 "seagate,goflexnet", 111 "seagate,goflexnet",
102 "buffalo,lsxl", 112 "buffalo,lsxl",
113 "iom,ix2-200",
114 "keymile,km_kirkwood",
103 NULL 115 NULL
104}; 116};
105 117
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
new file mode 100644
index 000000000000..158fb97d0397
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -0,0 +1,57 @@
1/*
2 * arch/arm/mach-kirkwood/board-iomega_ix2_200.c
3 *
4 * Iomega StorCenter ix2-200
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/mv643xx_eth.h>
15#include <linux/ethtool.h>
16#include <mach/kirkwood.h>
17#include "common.h"
18#include "mpp.h"
19
20static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
21 .phy_addr = MV643XX_ETH_PHY_NONE,
22 .speed = SPEED_1000,
23 .duplex = DUPLEX_FULL,
24};
25
26static unsigned int iomega_ix2_200_mpp_config[] __initdata = {
27 MPP12_GPIO, /* Reset Button */
28 MPP14_GPIO, /* Power Button */
29 MPP15_GPIO, /* Backup LED (blue) */
30 MPP16_GPIO, /* Power LED (white) */
31 MPP35_GPIO, /* OTB Button */
32 MPP36_GPIO, /* Rebuild LED (white) */
33 MPP37_GPIO, /* Health LED (red) */
34 MPP38_GPIO, /* SATA LED brightness control 1 */
35 MPP39_GPIO, /* SATA LED brightness control 2 */
36 MPP40_GPIO, /* Backup LED brightness control 1 */
37 MPP41_GPIO, /* Backup LED brightness control 2 */
38 MPP42_GPIO, /* Power LED brightness control 1 */
39 MPP43_GPIO, /* Power LED brightness control 2 */
40 MPP44_GPIO, /* Health LED brightness control 1 */
41 MPP45_GPIO, /* Health LED brightness control 2 */
42 MPP46_GPIO, /* Rebuild LED brightness control 1 */
43 MPP47_GPIO, /* Rebuild LED brightness control 2 */
44 0
45};
46
47void __init iomega_ix2_200_init(void)
48{
49 /*
50 * Basic setup. Needs to be called early.
51 */
52 kirkwood_mpp_conf(iomega_ix2_200_mpp_config);
53
54 kirkwood_ehci_init();
55
56 kirkwood_ge01_init(&iomega_ix2_200_ge00_data);
57}
diff --git a/arch/arm/mach-kirkwood/board-km_kirkwood.c b/arch/arm/mach-kirkwood/board-km_kirkwood.c
new file mode 100644
index 000000000000..f7d32834b757
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-km_kirkwood.c
@@ -0,0 +1,57 @@
1/*
2 * Copyright 2012 2012 KEYMILE AG, CH-3097 Bern
3 * Valentin Longchamp <valentin.longchamp@keymile.com>
4 *
5 * arch/arm/mach-kirkwood/board-km_kirkwood.c
6 *
7 * Keymile km_kirkwood Reference Desing Init for drivers not converted to
8 * flattened device tree yet.
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/mv643xx_eth.h>
18#include <linux/clk.h>
19#include <linux/clk-private.h>
20#include "common.h"
21#include "mpp.h"
22
23static struct mv643xx_eth_platform_data km_kirkwood_ge00_data = {
24 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
25};
26
27static unsigned int km_kirkwood_mpp_config[] __initdata = {
28 MPP8_GPIO, /* I2C SDA */
29 MPP9_GPIO, /* I2C SCL */
30 0
31};
32
33void __init km_kirkwood_init(void)
34{
35 struct clk *sata_clk;
36 /*
37 * Basic setup. Needs to be called early.
38 */
39 kirkwood_mpp_conf(km_kirkwood_mpp_config);
40
41 /*
42 * Our variant of kirkwood (integrated in the Bobcat) hangs on accessing
43 * SATA bits (14-15) of the Clock Gating Control Register. Since these
44 * devices are also not present in this variant, their clocks get
45 * disabled because unused when clk_disable_unused() gets called.
46 * That's why we change the flags to these clocks to CLK_IGNORE_UNUSED
47 */
48 sata_clk = clk_get_sys("sata_mv.0", "0");
49 if (!IS_ERR(sata_clk))
50 sata_clk->flags |= CLK_IGNORE_UNUSED;
51 sata_clk = clk_get_sys("sata_mv.0", "1");
52 if (!IS_ERR(sata_clk))
53 sata_clk->flags |= CLK_IGNORE_UNUSED;
54
55 kirkwood_ehci_init();
56 kirkwood_ge00_init(&km_kirkwood_ge00_data);
57}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 304dd1abfdca..bcffd7ca1ca2 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -82,6 +82,12 @@ void ib62x0_init(void);
82static inline void ib62x0_init(void) {}; 82static inline void ib62x0_init(void) {};
83#endif 83#endif
84 84
85#ifdef CONFIG_MACH_DOCKSTAR_DT
86void dockstar_dt_init(void);
87#else
88static inline void dockstar_dt_init(void) {};
89#endif
90
85#ifdef CONFIG_MACH_GOFLEXNET_DT 91#ifdef CONFIG_MACH_GOFLEXNET_DT
86void goflexnet_init(void); 92void goflexnet_init(void);
87#else 93#else
@@ -94,6 +100,18 @@ void lsxl_init(void);
94static inline void lsxl_init(void) {}; 100static inline void lsxl_init(void) {};
95#endif 101#endif
96 102
103#ifdef CONFIG_MACH_IOMEGA_IX2_200_DT
104void iomega_ix2_200_init(void);
105#else
106static inline void iomega_ix2_200_init(void) {};
107#endif
108
109#ifdef CONFIG_MACH_KM_KIRKWOOD_DT
110void km_kirkwood_init(void);
111#else
112static inline void km_kirkwood_init(void) {};
113#endif
114
97/* early init functions not converted to fdt yet */ 115/* early init functions not converted to fdt yet */
98char *kirkwood_id(void); 116char *kirkwood_id(void);
99void kirkwood_l2_init(void); 117void kirkwood_l2_init(void);
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-27 13:53:11 -0500