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-rw-r--r--drivers/net/ethernet/intel/e100.c2
-rw-r--r--drivers/net/ethernet/intel/e1000e/80003es2lan.c4
-rw-r--r--drivers/net/ethernet/intel/e1000e/82571.c9
-rw-r--r--drivers/net/ethernet/intel/e1000e/ethtool.c19
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c26
-rw-r--r--drivers/net/ethernet/intel/e1000e/mac.c2
-rw-r--r--drivers/net/ethernet/intel/e1000e/manage.c2
-rw-r--r--drivers/net/ethernet/intel/e1000e/param.c8
-rw-r--r--drivers/net/ethernet/intel/e1000e/phy.c23
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c4
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c20
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_type.h1
12 files changed, 62 insertions, 58 deletions
diff --git a/drivers/net/ethernet/intel/e100.c b/drivers/net/ethernet/intel/e100.c
index e498effb85d9..ada720b42ff6 100644
--- a/drivers/net/ethernet/intel/e100.c
+++ b/drivers/net/ethernet/intel/e100.c
@@ -1759,6 +1759,7 @@ static void e100_xmit_prepare(struct nic *nic, struct cb *cb,
1759 skb->data, skb->len, PCI_DMA_TODEVICE)); 1759 skb->data, skb->len, PCI_DMA_TODEVICE));
1760 /* check for mapping failure? */ 1760 /* check for mapping failure? */
1761 cb->u.tcb.tbd.size = cpu_to_le16(skb->len); 1761 cb->u.tcb.tbd.size = cpu_to_le16(skb->len);
1762 skb_tx_timestamp(skb);
1762} 1763}
1763 1764
1764static netdev_tx_t e100_xmit_frame(struct sk_buff *skb, 1765static netdev_tx_t e100_xmit_frame(struct sk_buff *skb,
@@ -2733,6 +2734,7 @@ static const struct ethtool_ops e100_ethtool_ops = {
2733 .set_phys_id = e100_set_phys_id, 2734 .set_phys_id = e100_set_phys_id,
2734 .get_ethtool_stats = e100_get_ethtool_stats, 2735 .get_ethtool_stats = e100_get_ethtool_stats,
2735 .get_sset_count = e100_get_sset_count, 2736 .get_sset_count = e100_get_sset_count,
2737 .get_ts_info = ethtool_op_get_ts_info,
2736}; 2738};
2737 2739
2738static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2740static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
diff --git a/drivers/net/ethernet/intel/e1000e/80003es2lan.c b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
index bac9dda31b6c..fbc84d415762 100644
--- a/drivers/net/ethernet/intel/e1000e/80003es2lan.c
+++ b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
@@ -228,9 +228,7 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw)
228 /* FWSM register */ 228 /* FWSM register */
229 mac->has_fwsm = true; 229 mac->has_fwsm = true;
230 /* ARC supported; valid only if manageability features are enabled. */ 230 /* ARC supported; valid only if manageability features are enabled. */
231 mac->arc_subsystem_valid = 231 mac->arc_subsystem_valid = !!(er32(FWSM) & E1000_FWSM_MODE_MASK);
232 (er32(FWSM) & E1000_FWSM_MODE_MASK)
233 ? true : false;
234 /* Adaptive IFS not supported */ 232 /* Adaptive IFS not supported */
235 mac->adaptive_ifs = false; 233 mac->adaptive_ifs = false;
236 234
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c
index b3fdc6977f2e..609c18cb300a 100644
--- a/drivers/net/ethernet/intel/e1000e/82571.c
+++ b/drivers/net/ethernet/intel/e1000e/82571.c
@@ -295,9 +295,8 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)
295 * ARC supported; valid only if manageability features are 295 * ARC supported; valid only if manageability features are
296 * enabled. 296 * enabled.
297 */ 297 */
298 mac->arc_subsystem_valid = 298 mac->arc_subsystem_valid = !!(er32(FWSM) &
299 (er32(FWSM) & E1000_FWSM_MODE_MASK) 299 E1000_FWSM_MODE_MASK);
300 ? true : false;
301 break; 300 break;
302 case e1000_82574: 301 case e1000_82574:
303 case e1000_82583: 302 case e1000_82583:
@@ -798,7 +797,7 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
798 /* Check for pending operations. */ 797 /* Check for pending operations. */
799 for (i = 0; i < E1000_FLASH_UPDATES; i++) { 798 for (i = 0; i < E1000_FLASH_UPDATES; i++) {
800 usleep_range(1000, 2000); 799 usleep_range(1000, 2000);
801 if ((er32(EECD) & E1000_EECD_FLUPD) == 0) 800 if (!(er32(EECD) & E1000_EECD_FLUPD))
802 break; 801 break;
803 } 802 }
804 803
@@ -822,7 +821,7 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
822 821
823 for (i = 0; i < E1000_FLASH_UPDATES; i++) { 822 for (i = 0; i < E1000_FLASH_UPDATES; i++) {
824 usleep_range(1000, 2000); 823 usleep_range(1000, 2000);
825 if ((er32(EECD) & E1000_EECD_FLUPD) == 0) 824 if (!(er32(EECD) & E1000_EECD_FLUPD))
826 break; 825 break;
827 } 826 }
828 827
diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c
index 6302b10cb3a6..4f1edd9c22f1 100644
--- a/drivers/net/ethernet/intel/e1000e/ethtool.c
+++ b/drivers/net/ethernet/intel/e1000e/ethtool.c
@@ -259,8 +259,7 @@ static int e1000_set_settings(struct net_device *netdev,
259 * cannot be changed 259 * cannot be changed
260 */ 260 */
261 if (hw->phy.ops.check_reset_block(hw)) { 261 if (hw->phy.ops.check_reset_block(hw)) {
262 e_err("Cannot change link characteristics when SoL/IDER is " 262 e_err("Cannot change link characteristics when SoL/IDER is active.\n");
263 "active.\n");
264 return -EINVAL; 263 return -EINVAL;
265 } 264 }
266 265
@@ -727,9 +726,8 @@ static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
727 (test[pat] & write)); 726 (test[pat] & write));
728 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset); 727 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
729 if (val != (test[pat] & write & mask)) { 728 if (val != (test[pat] & write & mask)) {
730 e_err("pattern test reg %04X failed: got 0x%08X " 729 e_err("pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
731 "expected 0x%08X\n", reg + offset, val, 730 reg + offset, val, (test[pat] & write & mask));
732 (test[pat] & write & mask));
733 *data = reg; 731 *data = reg;
734 return 1; 732 return 1;
735 } 733 }
@@ -744,8 +742,8 @@ static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
744 __ew32(&adapter->hw, reg, write & mask); 742 __ew32(&adapter->hw, reg, write & mask);
745 val = __er32(&adapter->hw, reg); 743 val = __er32(&adapter->hw, reg);
746 if ((write & mask) != (val & mask)) { 744 if ((write & mask) != (val & mask)) {
747 e_err("set/check reg %04X test failed: got 0x%08X " 745 e_err("set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
748 "expected 0x%08X\n", reg, (val & mask), (write & mask)); 746 reg, (val & mask), (write & mask));
749 *data = reg; 747 *data = reg;
750 return 1; 748 return 1;
751 } 749 }
@@ -797,8 +795,8 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
797 ew32(STATUS, toggle); 795 ew32(STATUS, toggle);
798 after = er32(STATUS) & toggle; 796 after = er32(STATUS) & toggle;
799 if (value != after) { 797 if (value != after) {
800 e_err("failed STATUS register test got: 0x%08X expected: " 798 e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
801 "0x%08X\n", after, value); 799 after, value);
802 *data = 1; 800 *data = 1;
803 return 1; 801 return 1;
804 } 802 }
@@ -1791,8 +1789,7 @@ static void e1000_get_wol(struct net_device *netdev,
1791 wol->supported &= ~WAKE_UCAST; 1789 wol->supported &= ~WAKE_UCAST;
1792 1790
1793 if (adapter->wol & E1000_WUFC_EX) 1791 if (adapter->wol & E1000_WUFC_EX)
1794 e_err("Interface does not support directed (unicast) " 1792 e_err("Interface does not support directed (unicast) frame wake-up packets\n");
1795 "frame wake-up packets\n");
1796 } 1793 }
1797 1794
1798 if (adapter->wol & E1000_WUFC_EX) 1795 if (adapter->wol & E1000_WUFC_EX)
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 64c76443a7aa..0f158a95d94f 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -2212,7 +2212,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
2212 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 2212 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
2213 2213
2214 /* Check if the flash descriptor is valid */ 2214 /* Check if the flash descriptor is valid */
2215 if (hsfsts.hsf_status.fldesvalid == 0) { 2215 if (!hsfsts.hsf_status.fldesvalid) {
2216 e_dbg("Flash descriptor invalid. SW Sequencing must be used.\n"); 2216 e_dbg("Flash descriptor invalid. SW Sequencing must be used.\n");
2217 return -E1000_ERR_NVM; 2217 return -E1000_ERR_NVM;
2218 } 2218 }
@@ -2232,7 +2232,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
2232 * completed. 2232 * completed.
2233 */ 2233 */
2234 2234
2235 if (hsfsts.hsf_status.flcinprog == 0) { 2235 if (!hsfsts.hsf_status.flcinprog) {
2236 /* 2236 /*
2237 * There is no cycle running at present, 2237 * There is no cycle running at present,
2238 * so we can start a cycle. 2238 * so we can start a cycle.
@@ -2250,7 +2250,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
2250 */ 2250 */
2251 for (i = 0; i < ICH_FLASH_READ_COMMAND_TIMEOUT; i++) { 2251 for (i = 0; i < ICH_FLASH_READ_COMMAND_TIMEOUT; i++) {
2252 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 2252 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
2253 if (hsfsts.hsf_status.flcinprog == 0) { 2253 if (!hsfsts.hsf_status.flcinprog) {
2254 ret_val = 0; 2254 ret_val = 0;
2255 break; 2255 break;
2256 } 2256 }
@@ -2292,12 +2292,12 @@ static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)
2292 /* wait till FDONE bit is set to 1 */ 2292 /* wait till FDONE bit is set to 1 */
2293 do { 2293 do {
2294 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 2294 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
2295 if (hsfsts.hsf_status.flcdone == 1) 2295 if (hsfsts.hsf_status.flcdone)
2296 break; 2296 break;
2297 udelay(1); 2297 udelay(1);
2298 } while (i++ < timeout); 2298 } while (i++ < timeout);
2299 2299
2300 if (hsfsts.hsf_status.flcdone == 1 && hsfsts.hsf_status.flcerr == 0) 2300 if (hsfsts.hsf_status.flcdone && !hsfsts.hsf_status.flcerr)
2301 return 0; 2301 return 0;
2302 2302
2303 return -E1000_ERR_NVM; 2303 return -E1000_ERR_NVM;
@@ -2408,10 +2408,10 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
2408 * ICH_FLASH_CYCLE_REPEAT_COUNT times. 2408 * ICH_FLASH_CYCLE_REPEAT_COUNT times.
2409 */ 2409 */
2410 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 2410 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
2411 if (hsfsts.hsf_status.flcerr == 1) { 2411 if (hsfsts.hsf_status.flcerr) {
2412 /* Repeat for some time before giving up. */ 2412 /* Repeat for some time before giving up. */
2413 continue; 2413 continue;
2414 } else if (hsfsts.hsf_status.flcdone == 0) { 2414 } else if (!hsfsts.hsf_status.flcdone) {
2415 e_dbg("Timeout error - flash cycle did not complete.\n"); 2415 e_dbg("Timeout error - flash cycle did not complete.\n");
2416 break; 2416 break;
2417 } 2417 }
@@ -2641,7 +2641,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
2641 if (ret_val) 2641 if (ret_val)
2642 return ret_val; 2642 return ret_val;
2643 2643
2644 if ((data & 0x40) == 0) { 2644 if (!(data & 0x40)) {
2645 data |= 0x40; 2645 data |= 0x40;
2646 ret_val = e1000_write_nvm(hw, 0x19, 1, &data); 2646 ret_val = e1000_write_nvm(hw, 0x19, 1, &data);
2647 if (ret_val) 2647 if (ret_val)
@@ -2759,10 +2759,10 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
2759 * try...ICH_FLASH_CYCLE_REPEAT_COUNT times. 2759 * try...ICH_FLASH_CYCLE_REPEAT_COUNT times.
2760 */ 2760 */
2761 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 2761 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
2762 if (hsfsts.hsf_status.flcerr == 1) 2762 if (hsfsts.hsf_status.flcerr)
2763 /* Repeat for some time before giving up. */ 2763 /* Repeat for some time before giving up. */
2764 continue; 2764 continue;
2765 if (hsfsts.hsf_status.flcdone == 0) { 2765 if (!hsfsts.hsf_status.flcdone) {
2766 e_dbg("Timeout error - flash cycle did not complete.\n"); 2766 e_dbg("Timeout error - flash cycle did not complete.\n");
2767 break; 2767 break;
2768 } 2768 }
@@ -2914,10 +2914,10 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
2914 * a few more times else Done 2914 * a few more times else Done
2915 */ 2915 */
2916 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 2916 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
2917 if (hsfsts.hsf_status.flcerr == 1) 2917 if (hsfsts.hsf_status.flcerr)
2918 /* repeat for some time before giving up */ 2918 /* repeat for some time before giving up */
2919 continue; 2919 continue;
2920 else if (hsfsts.hsf_status.flcdone == 0) 2920 else if (!hsfsts.hsf_status.flcdone)
2921 return ret_val; 2921 return ret_val;
2922 } while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT); 2922 } while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT);
2923 } 2923 }
@@ -3916,7 +3916,7 @@ static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)
3916 3916
3917 /* If EEPROM is not marked present, init the IGP 3 PHY manually */ 3917 /* If EEPROM is not marked present, init the IGP 3 PHY manually */
3918 if (hw->mac.type <= e1000_ich9lan) { 3918 if (hw->mac.type <= e1000_ich9lan) {
3919 if (((er32(EECD) & E1000_EECD_PRES) == 0) && 3919 if (!(er32(EECD) & E1000_EECD_PRES) &&
3920 (hw->phy.type == e1000_phy_igp_3)) { 3920 (hw->phy.type == e1000_phy_igp_3)) {
3921 e1000e_phy_init_script_igp3(hw); 3921 e1000e_phy_init_script_igp3(hw);
3922 } 3922 }
diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c
index decad98c1059..d8327499305f 100644
--- a/drivers/net/ethernet/intel/e1000e/mac.c
+++ b/drivers/net/ethernet/intel/e1000e/mac.c
@@ -681,7 +681,7 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
681 return ret_val; 681 return ret_val;
682 } 682 }
683 683
684 if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0) 684 if (!(nvm_data & NVM_WORD0F_PAUSE_MASK))
685 hw->fc.requested_mode = e1000_fc_none; 685 hw->fc.requested_mode = e1000_fc_none;
686 else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR) 686 else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR)
687 hw->fc.requested_mode = e1000_fc_tx_pause; 687 hw->fc.requested_mode = e1000_fc_tx_pause;
diff --git a/drivers/net/ethernet/intel/e1000e/manage.c b/drivers/net/ethernet/intel/e1000e/manage.c
index 473f8e711510..bacc950fc684 100644
--- a/drivers/net/ethernet/intel/e1000e/manage.c
+++ b/drivers/net/ethernet/intel/e1000e/manage.c
@@ -85,7 +85,7 @@ static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
85 85
86 /* Check that the host interface is enabled. */ 86 /* Check that the host interface is enabled. */
87 hicr = er32(HICR); 87 hicr = er32(HICR);
88 if ((hicr & E1000_HICR_EN) == 0) { 88 if (!(hicr & E1000_HICR_EN)) {
89 e_dbg("E1000_HOST_EN bit disabled.\n"); 89 e_dbg("E1000_HOST_EN bit disabled.\n");
90 return -E1000_ERR_HOST_INTERFACE_COMMAND; 90 return -E1000_ERR_HOST_INTERFACE_COMMAND;
91 } 91 }
diff --git a/drivers/net/ethernet/intel/e1000e/param.c b/drivers/net/ethernet/intel/e1000e/param.c
index ff796e42c3eb..feb6eebb0021 100644
--- a/drivers/net/ethernet/intel/e1000e/param.c
+++ b/drivers/net/ethernet/intel/e1000e/param.c
@@ -166,8 +166,8 @@ E1000_PARAM(WriteProtectNVM, "Write-protect NVM [WARNING: disabling this can lea
166 * 166 *
167 * Default Value: 1 (enabled) 167 * Default Value: 1 (enabled)
168 */ 168 */
169E1000_PARAM(CrcStripping, "Enable CRC Stripping, disable if your BMC needs " \ 169E1000_PARAM(CrcStripping,
170 "the CRC"); 170 "Enable CRC Stripping, disable if your BMC needs the CRC");
171 171
172struct e1000_option { 172struct e1000_option {
173 enum { enable_option, range_option, list_option } type; 173 enum { enable_option, range_option, list_option } type;
@@ -360,8 +360,8 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)
360 adapter->itr = 20000; 360 adapter->itr = 20000;
361 break; 361 break;
362 case 4: 362 case 4:
363 e_info("%s set to simplified (2000-8000 ints) " 363 e_info("%s set to simplified (2000-8000 ints) mode\n",
364 "mode\n", opt.name); 364 opt.name);
365 adapter->itr_setting = 4; 365 adapter->itr_setting = 4;
366 break; 366 break;
367 default: 367 default:
diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c
index 35b45578c604..bd5ef64b3003 100644
--- a/drivers/net/ethernet/intel/e1000e/phy.c
+++ b/drivers/net/ethernet/intel/e1000e/phy.c
@@ -718,7 +718,7 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
718 * 1 - Enabled 718 * 1 - Enabled
719 */ 719 */
720 phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; 720 phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL;
721 if (phy->disable_polarity_correction == 1) 721 if (phy->disable_polarity_correction)
722 phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; 722 phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
723 723
724 /* Enable downshift on BM (disabled by default) */ 724 /* Enable downshift on BM (disabled by default) */
@@ -1090,7 +1090,7 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
1090 * If autoneg_advertised is zero, we assume it was not defaulted 1090 * If autoneg_advertised is zero, we assume it was not defaulted
1091 * by the calling code so we set to advertise full capability. 1091 * by the calling code so we set to advertise full capability.
1092 */ 1092 */
1093 if (phy->autoneg_advertised == 0) 1093 if (!phy->autoneg_advertised)
1094 phy->autoneg_advertised = phy->autoneg_mask; 1094 phy->autoneg_advertised = phy->autoneg_mask;
1095 1095
1096 e_dbg("Reconfiguring auto-neg advertisement params\n"); 1096 e_dbg("Reconfiguring auto-neg advertisement params\n");
@@ -1596,7 +1596,7 @@ s32 e1000e_check_downshift(struct e1000_hw *hw)
1596 ret_val = e1e_rphy(hw, offset, &phy_data); 1596 ret_val = e1e_rphy(hw, offset, &phy_data);
1597 1597
1598 if (!ret_val) 1598 if (!ret_val)
1599 phy->speed_downgraded = (phy_data & mask); 1599 phy->speed_downgraded = !!(phy_data & mask);
1600 1600
1601 return ret_val; 1601 return ret_val;
1602} 1602}
@@ -1925,8 +1925,8 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw)
1925 if (ret_val) 1925 if (ret_val)
1926 return ret_val; 1926 return ret_val;
1927 1927
1928 phy->polarity_correction = (phy_data & 1928 phy->polarity_correction = !!(phy_data &
1929 M88E1000_PSCR_POLARITY_REVERSAL); 1929 M88E1000_PSCR_POLARITY_REVERSAL);
1930 1930
1931 ret_val = e1000_check_polarity_m88(hw); 1931 ret_val = e1000_check_polarity_m88(hw);
1932 if (ret_val) 1932 if (ret_val)
@@ -1936,7 +1936,7 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw)
1936 if (ret_val) 1936 if (ret_val)
1937 return ret_val; 1937 return ret_val;
1938 1938
1939 phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX); 1939 phy->is_mdix = !!(phy_data & M88E1000_PSSR_MDIX);
1940 1940
1941 if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) { 1941 if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {
1942 ret_val = e1000_get_cable_length(hw); 1942 ret_val = e1000_get_cable_length(hw);
@@ -1999,7 +1999,7 @@ s32 e1000e_get_phy_info_igp(struct e1000_hw *hw)
1999 if (ret_val) 1999 if (ret_val)
2000 return ret_val; 2000 return ret_val;
2001 2001
2002 phy->is_mdix = (data & IGP01E1000_PSSR_MDIX); 2002 phy->is_mdix = !!(data & IGP01E1000_PSSR_MDIX);
2003 2003
2004 if ((data & IGP01E1000_PSSR_SPEED_MASK) == 2004 if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
2005 IGP01E1000_PSSR_SPEED_1000MBPS) { 2005 IGP01E1000_PSSR_SPEED_1000MBPS) {
@@ -2052,8 +2052,7 @@ s32 e1000_get_phy_info_ife(struct e1000_hw *hw)
2052 ret_val = e1e_rphy(hw, IFE_PHY_SPECIAL_CONTROL, &data); 2052 ret_val = e1e_rphy(hw, IFE_PHY_SPECIAL_CONTROL, &data);
2053 if (ret_val) 2053 if (ret_val)
2054 return ret_val; 2054 return ret_val;
2055 phy->polarity_correction = (data & IFE_PSC_AUTO_POLARITY_DISABLE) 2055 phy->polarity_correction = !(data & IFE_PSC_AUTO_POLARITY_DISABLE);
2056 ? false : true;
2057 2056
2058 if (phy->polarity_correction) { 2057 if (phy->polarity_correction) {
2059 ret_val = e1000_check_polarity_ife(hw); 2058 ret_val = e1000_check_polarity_ife(hw);
@@ -2070,7 +2069,7 @@ s32 e1000_get_phy_info_ife(struct e1000_hw *hw)
2070 if (ret_val) 2069 if (ret_val)
2071 return ret_val; 2070 return ret_val;
2072 2071
2073 phy->is_mdix = (data & IFE_PMC_MDIX_STATUS) ? true : false; 2072 phy->is_mdix = !!(data & IFE_PMC_MDIX_STATUS);
2074 2073
2075 /* The following parameters are undefined for 10/100 operation. */ 2074 /* The following parameters are undefined for 10/100 operation. */
2076 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; 2075 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
@@ -2979,7 +2978,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
2979 if ((hw->phy.type == e1000_phy_82578) && 2978 if ((hw->phy.type == e1000_phy_82578) &&
2980 (hw->phy.revision >= 1) && 2979 (hw->phy.revision >= 1) &&
2981 (hw->phy.addr == 2) && 2980 (hw->phy.addr == 2) &&
2982 ((MAX_PHY_REG_ADDRESS & reg) == 0) && (data & (1 << 11))) { 2981 !(MAX_PHY_REG_ADDRESS & reg) && (data & (1 << 11))) {
2983 u16 data2 = 0x7EFF; 2982 u16 data2 = 0x7EFF;
2984 ret_val = e1000_access_phy_debug_regs_hv(hw, 2983 ret_val = e1000_access_phy_debug_regs_hv(hw,
2985 (1 << 6) | 0x3, 2984 (1 << 6) | 0x3,
@@ -3265,7 +3264,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw)
3265 if (ret_val) 3264 if (ret_val)
3266 return ret_val; 3265 return ret_val;
3267 3266
3268 phy->is_mdix = (data & I82577_PHY_STATUS2_MDIX) ? true : false; 3267 phy->is_mdix = !!(data & I82577_PHY_STATUS2_MDIX);
3269 3268
3270 if ((data & I82577_PHY_STATUS2_SPEED_MASK) == 3269 if ((data & I82577_PHY_STATUS2_SPEED_MASK) ==
3271 I82577_PHY_STATUS2_SPEED_1000MBPS) { 3270 I82577_PHY_STATUS2_SPEED_1000MBPS) {
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index f022ff7900f7..28a37bb00c90 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -60,8 +60,8 @@
60#include "igb.h" 60#include "igb.h"
61 61
62#define MAJ 3 62#define MAJ 3
63#define MIN 2 63#define MIN 4
64#define BUILD 10 64#define BUILD 7
65#define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \ 65#define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
66__stringify(BUILD) "-k" 66__stringify(BUILD) "-k"
67char igb_driver_name[] = "igb"; 67char igb_driver_name[] = "igb";
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
index bf9f82f4b1ae..24117709d6a2 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
@@ -1582,13 +1582,21 @@ static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)
1582 **/ 1582 **/
1583static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) 1583static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
1584{ 1584{
1585 *i2cctl |= IXGBE_I2C_CLK_OUT; 1585 u32 i = 0;
1586 1586 u32 timeout = IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT;
1587 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); 1587 u32 i2cctl_r = 0;
1588 IXGBE_WRITE_FLUSH(hw);
1589 1588
1590 /* SCL rise time (1000ns) */ 1589 for (i = 0; i < timeout; i++) {
1591 udelay(IXGBE_I2C_T_RISE); 1590 *i2cctl |= IXGBE_I2C_CLK_OUT;
1591 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl);
1592 IXGBE_WRITE_FLUSH(hw);
1593 /* SCL rise time (1000ns) */
1594 udelay(IXGBE_I2C_T_RISE);
1595
1596 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
1597 if (i2cctl_r & IXGBE_I2C_CLK_IN)
1598 break;
1599 }
1592} 1600}
1593 1601
1594/** 1602/**
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index ffa6679e943b..4acd9e665b28 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -110,6 +110,7 @@
110#define IXGBE_I2C_CLK_OUT 0x00000002 110#define IXGBE_I2C_CLK_OUT 0x00000002
111#define IXGBE_I2C_DATA_IN 0x00000004 111#define IXGBE_I2C_DATA_IN 0x00000004
112#define IXGBE_I2C_DATA_OUT 0x00000008 112#define IXGBE_I2C_DATA_OUT 0x00000008
113#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500
113 114
114/* Interrupt Registers */ 115/* Interrupt Registers */
115#define IXGBE_EICR 0x00800 116#define IXGBE_EICR 0x00800