diff options
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/cmd.c | 9 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/fw_qos.c | 75 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/fw_qos.h | 28 | ||||
-rw-r--r-- | include/linux/mlx4/cmd.h | 1 |
4 files changed, 113 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c b/drivers/net/ethernet/mellanox/mlx4/cmd.c index 179ca2889434..79cc5ec57dca 100644 --- a/drivers/net/ethernet/mellanox/mlx4/cmd.c +++ b/drivers/net/ethernet/mellanox/mlx4/cmd.c | |||
@@ -1455,6 +1455,15 @@ static struct mlx4_cmd_info cmd_info[] = { | |||
1455 | .wrapper = mlx4_CMD_EPERM_wrapper, | 1455 | .wrapper = mlx4_CMD_EPERM_wrapper, |
1456 | }, | 1456 | }, |
1457 | { | 1457 | { |
1458 | .opcode = MLX4_CMD_ALLOCATE_VPP, | ||
1459 | .has_inbox = false, | ||
1460 | .has_outbox = true, | ||
1461 | .out_is_imm = false, | ||
1462 | .encode_slave_id = false, | ||
1463 | .verify = NULL, | ||
1464 | .wrapper = mlx4_CMD_EPERM_wrapper, | ||
1465 | }, | ||
1466 | { | ||
1458 | .opcode = MLX4_CMD_CONF_SPECIAL_QP, | 1467 | .opcode = MLX4_CMD_CONF_SPECIAL_QP, |
1459 | .has_inbox = false, | 1468 | .has_inbox = false, |
1460 | .has_outbox = false, | 1469 | .has_outbox = false, |
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw_qos.c b/drivers/net/ethernet/mellanox/mlx4/fw_qos.c index 0f5af7cf4547..5ce3440b99c7 100644 --- a/drivers/net/ethernet/mellanox/mlx4/fw_qos.c +++ b/drivers/net/ethernet/mellanox/mlx4/fw_qos.c | |||
@@ -34,6 +34,13 @@ | |||
34 | 34 | ||
35 | #include <linux/export.h> | 35 | #include <linux/export.h> |
36 | #include "fw_qos.h" | 36 | #include "fw_qos.h" |
37 | #include "fw.h" | ||
38 | |||
39 | enum { | ||
40 | /* allocate vpp opcode modifiers */ | ||
41 | MLX4_ALLOCATE_VPP_ALLOCATE = 0x0, | ||
42 | MLX4_ALLOCATE_VPP_QUERY = 0x1 | ||
43 | }; | ||
37 | 44 | ||
38 | struct mlx4_set_port_prio2tc_context { | 45 | struct mlx4_set_port_prio2tc_context { |
39 | u8 prio2tc[4]; | 46 | u8 prio2tc[4]; |
@@ -50,6 +57,12 @@ struct mlx4_set_port_scheduler_context { | |||
50 | struct mlx4_port_scheduler_tc_cfg_be tc[MLX4_NUM_TC]; | 57 | struct mlx4_port_scheduler_tc_cfg_be tc[MLX4_NUM_TC]; |
51 | }; | 58 | }; |
52 | 59 | ||
60 | /* Granular Qos (per VF) section */ | ||
61 | struct mlx4_alloc_vpp_param { | ||
62 | __be32 availible_vpp; | ||
63 | __be32 vpp_p_up[MLX4_NUM_UP]; | ||
64 | }; | ||
65 | |||
53 | int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc) | 66 | int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc) |
54 | { | 67 | { |
55 | struct mlx4_cmd_mailbox *mailbox; | 68 | struct mlx4_cmd_mailbox *mailbox; |
@@ -123,3 +136,65 @@ int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw, | |||
123 | return err; | 136 | return err; |
124 | } | 137 | } |
125 | EXPORT_SYMBOL(mlx4_SET_PORT_SCHEDULER); | 138 | EXPORT_SYMBOL(mlx4_SET_PORT_SCHEDULER); |
139 | |||
140 | int mlx4_ALLOCATE_VPP_get(struct mlx4_dev *dev, u8 port, | ||
141 | u16 *availible_vpp, u8 *vpp_p_up) | ||
142 | { | ||
143 | int i; | ||
144 | int err; | ||
145 | struct mlx4_cmd_mailbox *mailbox; | ||
146 | struct mlx4_alloc_vpp_param *out_param; | ||
147 | |||
148 | mailbox = mlx4_alloc_cmd_mailbox(dev); | ||
149 | if (IS_ERR(mailbox)) | ||
150 | return PTR_ERR(mailbox); | ||
151 | |||
152 | out_param = mailbox->buf; | ||
153 | |||
154 | err = mlx4_cmd_box(dev, 0, mailbox->dma, port, | ||
155 | MLX4_ALLOCATE_VPP_QUERY, | ||
156 | MLX4_CMD_ALLOCATE_VPP, | ||
157 | MLX4_CMD_TIME_CLASS_A, | ||
158 | MLX4_CMD_NATIVE); | ||
159 | if (err) | ||
160 | goto out; | ||
161 | |||
162 | /* Total number of supported VPPs */ | ||
163 | *availible_vpp = (u16)be32_to_cpu(out_param->availible_vpp); | ||
164 | |||
165 | for (i = 0; i < MLX4_NUM_UP; i++) | ||
166 | vpp_p_up[i] = (u8)be32_to_cpu(out_param->vpp_p_up[i]); | ||
167 | |||
168 | out: | ||
169 | mlx4_free_cmd_mailbox(dev, mailbox); | ||
170 | |||
171 | return err; | ||
172 | } | ||
173 | EXPORT_SYMBOL(mlx4_ALLOCATE_VPP_get); | ||
174 | |||
175 | int mlx4_ALLOCATE_VPP_set(struct mlx4_dev *dev, u8 port, u8 *vpp_p_up) | ||
176 | { | ||
177 | int i; | ||
178 | int err; | ||
179 | struct mlx4_cmd_mailbox *mailbox; | ||
180 | struct mlx4_alloc_vpp_param *in_param; | ||
181 | |||
182 | mailbox = mlx4_alloc_cmd_mailbox(dev); | ||
183 | if (IS_ERR(mailbox)) | ||
184 | return PTR_ERR(mailbox); | ||
185 | |||
186 | in_param = mailbox->buf; | ||
187 | |||
188 | for (i = 0; i < MLX4_NUM_UP; i++) | ||
189 | in_param->vpp_p_up[i] = cpu_to_be32(vpp_p_up[i]); | ||
190 | |||
191 | err = mlx4_cmd(dev, mailbox->dma, port, | ||
192 | MLX4_ALLOCATE_VPP_ALLOCATE, | ||
193 | MLX4_CMD_ALLOCATE_VPP, | ||
194 | MLX4_CMD_TIME_CLASS_A, | ||
195 | MLX4_CMD_NATIVE); | ||
196 | |||
197 | mlx4_free_cmd_mailbox(dev, mailbox); | ||
198 | return err; | ||
199 | } | ||
200 | EXPORT_SYMBOL(mlx4_ALLOCATE_VPP_set); | ||
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw_qos.h b/drivers/net/ethernet/mellanox/mlx4/fw_qos.h index ab9be0fad9c8..be79951c44ef 100644 --- a/drivers/net/ethernet/mellanox/mlx4/fw_qos.h +++ b/drivers/net/ethernet/mellanox/mlx4/fw_qos.h | |||
@@ -71,5 +71,33 @@ int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc); | |||
71 | **/ | 71 | **/ |
72 | int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw, | 72 | int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw, |
73 | u8 *pg, u16 *ratelimit); | 73 | u8 *pg, u16 *ratelimit); |
74 | /** | ||
75 | * mlx4_ALLOCATE_VPP_get - Query port VPP availible resources and allocation. | ||
76 | * Before distribution of VPPs to priorities, only availible_vpp is returned. | ||
77 | * After initialization it returns the distribution of VPPs among priorities. | ||
78 | * | ||
79 | * @dev: mlx4_dev. | ||
80 | * @port: Physical port number. | ||
81 | * @availible_vpp: Pointer to variable where number of availible VPPs is stored | ||
82 | * @vpp_p_up: Distribution of VPPs to priorities is stored in this array | ||
83 | * | ||
84 | * Returns 0 on success or a negative mlx4_core errno code. | ||
85 | **/ | ||
86 | int mlx4_ALLOCATE_VPP_get(struct mlx4_dev *dev, u8 port, | ||
87 | u16 *availible_vpp, u8 *vpp_p_up); | ||
88 | /** | ||
89 | * mlx4_ALLOCATE_VPP_set - Distribution of VPPs among differnt priorities. | ||
90 | * The total number of VPPs assigned to all for a port must not exceed | ||
91 | * the value reported by availible_vpp in mlx4_ALLOCATE_VPP_get. | ||
92 | * VPP allocation is allowed only after the port type has been set, | ||
93 | * and while no QPs are open for this port. | ||
94 | * | ||
95 | * @dev: mlx4_dev. | ||
96 | * @port: Physical port number. | ||
97 | * @vpp_p_up: Allocation of VPPs to different priorities. | ||
98 | * | ||
99 | * Returns 0 on success or a negative mlx4_core errno code. | ||
100 | **/ | ||
101 | int mlx4_ALLOCATE_VPP_set(struct mlx4_dev *dev, u8 port, u8 *vpp_p_up); | ||
74 | 102 | ||
75 | #endif /* MLX4_FW_QOS_H */ | 103 | #endif /* MLX4_FW_QOS_H */ |
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h index 7299e9548906..e0f88a098fb8 100644 --- a/include/linux/mlx4/cmd.h +++ b/include/linux/mlx4/cmd.h | |||
@@ -68,6 +68,7 @@ enum { | |||
68 | MLX4_CMD_UNMAP_ICM_AUX = 0xffb, | 68 | MLX4_CMD_UNMAP_ICM_AUX = 0xffb, |
69 | MLX4_CMD_SET_ICM_SIZE = 0xffd, | 69 | MLX4_CMD_SET_ICM_SIZE = 0xffd, |
70 | MLX4_CMD_ACCESS_REG = 0x3b, | 70 | MLX4_CMD_ACCESS_REG = 0x3b, |
71 | MLX4_CMD_ALLOCATE_VPP = 0x80, | ||
71 | 72 | ||
72 | /*master notify fw on finish for slave's flr*/ | 73 | /*master notify fw on finish for slave's flr*/ |
73 | MLX4_CMD_INFORM_FLR_DONE = 0x5b, | 74 | MLX4_CMD_INFORM_FLR_DONE = 0x5b, |