diff options
| -rw-r--r-- | drivers/staging/tidspbridge/core/tiomap3430.c | 37 |
1 files changed, 26 insertions, 11 deletions
diff --git a/drivers/staging/tidspbridge/core/tiomap3430.c b/drivers/staging/tidspbridge/core/tiomap3430.c index 066a3ceec65e..f619fb3c56d2 100644 --- a/drivers/staging/tidspbridge/core/tiomap3430.c +++ b/drivers/staging/tidspbridge/core/tiomap3430.c | |||
| @@ -126,7 +126,8 @@ static int mem_map_vmalloc(struct bridge_dev_context *dev_context, | |||
| 126 | u32 ul_num_bytes, | 126 | u32 ul_num_bytes, |
| 127 | struct hw_mmu_map_attrs_t *hw_attrs); | 127 | struct hw_mmu_map_attrs_t *hw_attrs); |
| 128 | 128 | ||
| 129 | bool wait_for_start(struct bridge_dev_context *dev_context, u32 dw_sync_addr); | 129 | bool wait_for_start(struct bridge_dev_context *dev_context, |
| 130 | void __iomem *sync_addr); | ||
| 130 | 131 | ||
| 131 | /* ----------------------------------- Globals */ | 132 | /* ----------------------------------- Globals */ |
| 132 | 133 | ||
| @@ -363,10 +364,11 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, | |||
| 363 | { | 364 | { |
| 364 | int status = 0; | 365 | int status = 0; |
| 365 | struct bridge_dev_context *dev_context = dev_ctxt; | 366 | struct bridge_dev_context *dev_context = dev_ctxt; |
| 366 | u32 dw_sync_addr = 0; | 367 | void __iomem *sync_addr; |
| 367 | u32 ul_shm_base; /* Gpp Phys SM base addr(byte) */ | 368 | u32 ul_shm_base; /* Gpp Phys SM base addr(byte) */ |
| 368 | u32 ul_shm_base_virt; /* Dsp Virt SM base addr */ | 369 | u32 ul_shm_base_virt; /* Dsp Virt SM base addr */ |
| 369 | u32 ul_tlb_base_virt; /* Base of MMU TLB entry */ | 370 | u32 ul_tlb_base_virt; /* Base of MMU TLB entry */ |
| 371 | u32 shm_sync_pa; | ||
| 370 | /* Offset of shm_base_virt from tlb_base_virt */ | 372 | /* Offset of shm_base_virt from tlb_base_virt */ |
| 371 | u32 ul_shm_offset_virt; | 373 | u32 ul_shm_offset_virt; |
| 372 | s32 entry_ndx; | 374 | s32 entry_ndx; |
| @@ -397,15 +399,22 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, | |||
| 397 | /* Kernel logical address */ | 399 | /* Kernel logical address */ |
| 398 | ul_shm_base = dev_context->atlb_entry[0].gpp_va + ul_shm_offset_virt; | 400 | ul_shm_base = dev_context->atlb_entry[0].gpp_va + ul_shm_offset_virt; |
| 399 | 401 | ||
| 402 | /* SHM physical sync address */ | ||
| 403 | shm_sync_pa = dev_context->atlb_entry[0].gpp_pa + ul_shm_offset_virt + | ||
| 404 | SHMSYNCOFFSET; | ||
| 405 | |||
| 400 | /* 2nd wd is used as sync field */ | 406 | /* 2nd wd is used as sync field */ |
| 401 | dw_sync_addr = ul_shm_base + SHMSYNCOFFSET; | 407 | sync_addr = ioremap(shm_sync_pa, SZ_32); |
| 408 | if (!sync_addr) | ||
| 409 | return -ENOMEM; | ||
| 410 | |||
| 402 | /* Write a signature into the shm base + offset; this will | 411 | /* Write a signature into the shm base + offset; this will |
| 403 | * get cleared when the DSP program starts. */ | 412 | * get cleared when the DSP program starts. */ |
| 404 | if ((ul_shm_base_virt == 0) || (ul_shm_base == 0)) { | 413 | if ((ul_shm_base_virt == 0) || (ul_shm_base == 0)) { |
| 405 | pr_err("%s: Illegal SM base\n", __func__); | 414 | pr_err("%s: Illegal SM base\n", __func__); |
| 406 | status = -EPERM; | 415 | status = -EPERM; |
| 407 | } else | 416 | } else |
| 408 | __raw_writel(0xffffffff, dw_sync_addr); | 417 | __raw_writel(0xffffffff, sync_addr); |
| 409 | 418 | ||
| 410 | if (!status) { | 419 | if (!status) { |
| 411 | resources = dev_context->resources; | 420 | resources = dev_context->resources; |
| @@ -419,8 +428,10 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, | |||
| 419 | * function is made available. | 428 | * function is made available. |
| 420 | */ | 429 | */ |
| 421 | void __iomem *ctrl = ioremap(0x48002000, SZ_4K); | 430 | void __iomem *ctrl = ioremap(0x48002000, SZ_4K); |
| 422 | if (!ctrl) | 431 | if (!ctrl) { |
| 432 | iounmap(sync_addr); | ||
| 423 | return -ENOMEM; | 433 | return -ENOMEM; |
| 434 | } | ||
| 424 | 435 | ||
| 425 | (*pdata->dsp_prm_rmw_bits)(OMAP3430_RST1_IVA2_MASK, | 436 | (*pdata->dsp_prm_rmw_bits)(OMAP3430_RST1_IVA2_MASK, |
| 426 | OMAP3430_RST1_IVA2_MASK, OMAP3430_IVA2_MOD, | 437 | OMAP3430_RST1_IVA2_MASK, OMAP3430_IVA2_MOD, |
| @@ -588,15 +599,15 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, | |||
| 588 | (*pdata->dsp_prm_rmw_bits)(OMAP3430_RST1_IVA2_MASK, 0, | 599 | (*pdata->dsp_prm_rmw_bits)(OMAP3430_RST1_IVA2_MASK, 0, |
| 589 | OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL); | 600 | OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL); |
| 590 | 601 | ||
| 591 | dev_dbg(bridge, "Waiting for Sync @ 0x%x\n", dw_sync_addr); | 602 | dev_dbg(bridge, "Waiting for Sync @ 0x%x\n", *(u32 *)sync_addr); |
| 592 | dev_dbg(bridge, "DSP c_int00 Address = 0x%x\n", dsp_addr); | 603 | dev_dbg(bridge, "DSP c_int00 Address = 0x%x\n", dsp_addr); |
| 593 | if (dsp_debug) | 604 | if (dsp_debug) |
| 594 | while (__raw_readw(dw_sync_addr)) | 605 | while (__raw_readw(sync_addr)) |
| 595 | ; | 606 | ; |
| 596 | 607 | ||
| 597 | /* Wait for DSP to clear word in shared memory */ | 608 | /* Wait for DSP to clear word in shared memory */ |
| 598 | /* Read the Location */ | 609 | /* Read the Location */ |
| 599 | if (!wait_for_start(dev_context, dw_sync_addr)) | 610 | if (!wait_for_start(dev_context, sync_addr)) |
| 600 | status = -ETIMEDOUT; | 611 | status = -ETIMEDOUT; |
| 601 | 612 | ||
| 602 | dev_get_symbol(dev_context->dev_obj, "_WDT_enable", &wdt_en); | 613 | dev_get_symbol(dev_context->dev_obj, "_WDT_enable", &wdt_en); |
| @@ -612,7 +623,7 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, | |||
| 612 | /* Write the synchronization bit to indicate the | 623 | /* Write the synchronization bit to indicate the |
| 613 | * completion of OPP table update to DSP | 624 | * completion of OPP table update to DSP |
| 614 | */ | 625 | */ |
| 615 | __raw_writel(0XCAFECAFE, dw_sync_addr); | 626 | __raw_writel(0XCAFECAFE, sync_addr); |
| 616 | 627 | ||
| 617 | /* update board state */ | 628 | /* update board state */ |
| 618 | dev_context->brd_state = BRD_RUNNING; | 629 | dev_context->brd_state = BRD_RUNNING; |
| @@ -621,6 +632,9 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, | |||
| 621 | dev_context->brd_state = BRD_UNKNOWN; | 632 | dev_context->brd_state = BRD_UNKNOWN; |
| 622 | } | 633 | } |
| 623 | } | 634 | } |
| 635 | |||
| 636 | iounmap(sync_addr); | ||
| 637 | |||
| 624 | return status; | 638 | return status; |
| 625 | } | 639 | } |
| 626 | 640 | ||
| @@ -1796,12 +1810,13 @@ static int mem_map_vmalloc(struct bridge_dev_context *dev_context, | |||
| 1796 | * ======== wait_for_start ======== | 1810 | * ======== wait_for_start ======== |
| 1797 | * Wait for the singal from DSP that it has started, or time out. | 1811 | * Wait for the singal from DSP that it has started, or time out. |
| 1798 | */ | 1812 | */ |
| 1799 | bool wait_for_start(struct bridge_dev_context *dev_context, u32 dw_sync_addr) | 1813 | bool wait_for_start(struct bridge_dev_context *dev_context, |
| 1814 | void __iomem *sync_addr) | ||
| 1800 | { | 1815 | { |
| 1801 | u16 timeout = TIHELEN_ACKTIMEOUT; | 1816 | u16 timeout = TIHELEN_ACKTIMEOUT; |
| 1802 | 1817 | ||
| 1803 | /* Wait for response from board */ | 1818 | /* Wait for response from board */ |
| 1804 | while (__raw_readw(dw_sync_addr) && --timeout) | 1819 | while (__raw_readw(sync_addr) && --timeout) |
| 1805 | udelay(10); | 1820 | udelay(10); |
| 1806 | 1821 | ||
| 1807 | /* If timed out: return false */ | 1822 | /* If timed out: return false */ |
