2 files changed, 12 insertions, 11 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index adb319b53ecd..5c0663f58aff 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1495,6 +1495,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
         dev_priv->dev = dev;
         dev_priv->info = info;
 
+        spin_lock_init(&dev_priv->irq_lock);
+        spin_lock_init(&dev_priv->gpu_error.lock);
+        spin_lock_init(&dev_priv->rps.lock);
+        spin_lock_init(&dev_priv->backlight.lock);
+        mutex_init(&dev_priv->dpio_lock);
+        mutex_init(&dev_priv->rps.hw_lock);
+        mutex_init(&dev_priv->modeset_restore_lock);
+
         i915_dump_device_info(dev_priv);
 
         if (i915_get_bridge_dev(dev)) {
@@ -1586,6 +1594,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
         intel_irq_init(dev);
         intel_gt_init(dev);
+        intel_gt_reset(dev);
 
         /* Try to make sure MCHBAR is enabled before poking at it */
         intel_setup_mchbar(dev);
@@ -1610,15 +1619,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
         if (!IS_I945G(dev) && !IS_I945GM(dev))
                 pci_enable_msi(dev->pdev);
 
-        spin_lock_init(&dev_priv->irq_lock);
-        spin_lock_init(&dev_priv->gpu_error.lock);
-        spin_lock_init(&dev_priv->rps.lock);
-        spin_lock_init(&dev_priv->backlight.lock);
-        mutex_init(&dev_priv->dpio_lock);
-
-        mutex_init(&dev_priv->rps.hw_lock);
-        mutex_init(&dev_priv->modeset_restore_lock);
-
         dev_priv->num_plane = 1;
         if (IS_VALLEYVIEW(dev))
                 dev_priv->num_plane = 2;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d10e6735771f..828c426b4b92 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5487,6 +5487,9 @@ void intel_gt_reset(struct drm_device *dev)
                 if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
                         __gen6_gt_force_wake_mt_reset(dev_priv);
         }
+
+        /* BIOS often leaves RC6 enabled, but disable it for hw init */
+        intel_disable_gt_powersave(dev);
 }
 
 void intel_gt_init(struct drm_device *dev)
@@ -5495,8 +5498,6 @@ void intel_gt_init(struct drm_device *dev)
 
         spin_lock_init(&dev_priv->gt_lock);
 
-        intel_gt_reset(dev);
-
         if (IS_VALLEYVIEW(dev)) {
                 dev_priv->gt.force_wake_get = vlv_force_wake_get;
                 dev_priv->gt.force_wake_put = vlv_force_wake_put;