diff options
| -rw-r--r-- | drivers/net/wireless/ath5k/initvals.c | 2 | ||||
| -rw-r--r-- | drivers/net/wireless/ath5k/reset.c | 22 |
2 files changed, 9 insertions, 15 deletions
diff --git a/drivers/net/wireless/ath5k/initvals.c b/drivers/net/wireless/ath5k/initvals.c index ea2e1a20b499..ceaa6c475c06 100644 --- a/drivers/net/wireless/ath5k/initvals.c +++ b/drivers/net/wireless/ath5k/initvals.c | |||
| @@ -806,6 +806,8 @@ static const struct ath5k_ini_mode ar5212_rf5111_ini_mode_end[] = { | |||
| 806 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, | 806 | { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, |
| 807 | { AR5K_PHY(642), | 807 | { AR5K_PHY(642), |
| 808 | { 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } }, | 808 | { 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } }, |
| 809 | { 0xa228, | ||
| 810 | { 0x000001b5, 0x000001b5, 0x000001b5, 0x000001b5, 0x000001b5 } }, | ||
| 809 | { 0xa23c, | 811 | { 0xa23c, |
| 810 | { 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af } }, | 812 | { 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af } }, |
| 811 | }; | 813 | }; |
diff --git a/drivers/net/wireless/ath5k/reset.c b/drivers/net/wireless/ath5k/reset.c index 8f1886834e61..1b6d45b6772d 100644 --- a/drivers/net/wireless/ath5k/reset.c +++ b/drivers/net/wireless/ath5k/reset.c | |||
| @@ -537,9 +537,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, | |||
| 537 | mdelay(1); | 537 | mdelay(1); |
| 538 | 538 | ||
| 539 | /* | 539 | /* |
| 540 | * Write some more initial register settings | 540 | * Write some more initial register settings for revised chips |
| 541 | */ | 541 | */ |
| 542 | if (ah->ah_version == AR5K_AR5212) { | 542 | if (ah->ah_version == AR5K_AR5212 && |
| 543 | ah->ah_phy_revision > 0x41) { | ||
| 543 | ath5k_hw_reg_write(ah, 0x0002a002, 0x982c); | 544 | ath5k_hw_reg_write(ah, 0x0002a002, 0x982c); |
| 544 | 545 | ||
| 545 | if (channel->hw_value == CHANNEL_G) | 546 | if (channel->hw_value == CHANNEL_G) |
| @@ -558,19 +559,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, | |||
| 558 | else | 559 | else |
| 559 | ath5k_hw_reg_write(ah, 0x00000000, 0x994c); | 560 | ath5k_hw_reg_write(ah, 0x00000000, 0x994c); |
| 560 | 561 | ||
| 561 | /* Some bits are disabled here, we know nothing about | 562 | /* Got this from legacy-hal */ |
| 562 | * register 0xa228 yet, most of the times this ends up | 563 | AR5K_REG_DISABLE_BITS(ah, 0xa228, 0x200); |
| 563 | * with a value 0x9b5 -haven't seen any dump with | 564 | |
| 564 | * a different value- */ | 565 | AR5K_REG_MASKED_BITS(ah, 0xa228, 0x800, 0xfffe03ff); |
| 565 | /* Got this from decompiling binary HAL */ | ||
| 566 | data = ath5k_hw_reg_read(ah, 0xa228); | ||
| 567 | data &= 0xfffffdff; | ||
| 568 | ath5k_hw_reg_write(ah, data, 0xa228); | ||
| 569 | |||
| 570 | data = ath5k_hw_reg_read(ah, 0xa228); | ||
| 571 | data &= 0xfffe03ff; | ||
| 572 | ath5k_hw_reg_write(ah, data, 0xa228); | ||
| 573 | data = 0; | ||
| 574 | 566 | ||
| 575 | /* Just write 0x9b5 ? */ | 567 | /* Just write 0x9b5 ? */ |
| 576 | /* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */ | 568 | /* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */ |
