diff options
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ath9k.h | 179 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/init.c | 2 |
2 files changed, 79 insertions, 102 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index 55bb87400b1a..9ad8a6738afd 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
| @@ -29,39 +29,13 @@ | |||
| 29 | #include "dfs.h" | 29 | #include "dfs.h" |
| 30 | #include "spectral.h" | 30 | #include "spectral.h" |
| 31 | 31 | ||
| 32 | /* | ||
| 33 | * Header for the ath9k.ko driver core *only* -- hw code nor any other driver | ||
| 34 | * should rely on this file or its contents. | ||
| 35 | */ | ||
| 36 | |||
| 37 | struct ath_node; | 32 | struct ath_node; |
| 33 | struct ath_rate_table; | ||
| 38 | 34 | ||
| 39 | /* Macro to expand scalars to 64-bit objects */ | 35 | extern struct ieee80211_ops ath9k_ops; |
| 40 | 36 | extern int ath9k_modparam_nohwcrypt; | |
| 41 | #define ito64(x) (sizeof(x) == 1) ? \ | 37 | extern int led_blink; |
| 42 | (((unsigned long long int)(x)) & (0xff)) : \ | 38 | extern bool is_ath9k_unloaded; |
| 43 | (sizeof(x) == 2) ? \ | ||
| 44 | (((unsigned long long int)(x)) & 0xffff) : \ | ||
| 45 | ((sizeof(x) == 4) ? \ | ||
| 46 | (((unsigned long long int)(x)) & 0xffffffff) : \ | ||
| 47 | (unsigned long long int)(x)) | ||
| 48 | |||
| 49 | /* increment with wrap-around */ | ||
| 50 | #define INCR(_l, _sz) do { \ | ||
| 51 | (_l)++; \ | ||
| 52 | (_l) &= ((_sz) - 1); \ | ||
| 53 | } while (0) | ||
| 54 | |||
| 55 | /* decrement with wrap-around */ | ||
| 56 | #define DECR(_l, _sz) do { \ | ||
| 57 | (_l)--; \ | ||
| 58 | (_l) &= ((_sz) - 1); \ | ||
| 59 | } while (0) | ||
| 60 | |||
| 61 | #define TSF_TO_TU(_h,_l) \ | ||
| 62 | ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) | ||
| 63 | |||
| 64 | #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) | ||
| 65 | 39 | ||
| 66 | struct ath_config { | 40 | struct ath_config { |
| 67 | u16 txpowlimit; | 41 | u16 txpowlimit; |
| @@ -71,6 +45,17 @@ struct ath_config { | |||
| 71 | /* Descriptor Management */ | 45 | /* Descriptor Management */ |
| 72 | /*************************/ | 46 | /*************************/ |
| 73 | 47 | ||
| 48 | #define ATH_TXSTATUS_RING_SIZE 512 | ||
| 49 | |||
| 50 | /* Macro to expand scalars to 64-bit objects */ | ||
| 51 | #define ito64(x) (sizeof(x) == 1) ? \ | ||
| 52 | (((unsigned long long int)(x)) & (0xff)) : \ | ||
| 53 | (sizeof(x) == 2) ? \ | ||
| 54 | (((unsigned long long int)(x)) & 0xffff) : \ | ||
| 55 | ((sizeof(x) == 4) ? \ | ||
| 56 | (((unsigned long long int)(x)) & 0xffffffff) : \ | ||
| 57 | (unsigned long long int)(x)) | ||
| 58 | |||
| 74 | #define ATH_TXBUF_RESET(_bf) do { \ | 59 | #define ATH_TXBUF_RESET(_bf) do { \ |
| 75 | (_bf)->bf_lastbf = NULL; \ | 60 | (_bf)->bf_lastbf = NULL; \ |
| 76 | (_bf)->bf_next = NULL; \ | 61 | (_bf)->bf_next = NULL; \ |
| @@ -78,23 +63,6 @@ struct ath_config { | |||
| 78 | sizeof(struct ath_buf_state)); \ | 63 | sizeof(struct ath_buf_state)); \ |
| 79 | } while (0) | 64 | } while (0) |
| 80 | 65 | ||
| 81 | /** | ||
| 82 | * enum buffer_type - Buffer type flags | ||
| 83 | * | ||
| 84 | * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) | ||
| 85 | * @BUF_AGGR: Indicates whether the buffer can be aggregated | ||
| 86 | * (used in aggregation scheduling) | ||
| 87 | */ | ||
| 88 | enum buffer_type { | ||
| 89 | BUF_AMPDU = BIT(0), | ||
| 90 | BUF_AGGR = BIT(1), | ||
| 91 | }; | ||
| 92 | |||
| 93 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) | ||
| 94 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) | ||
| 95 | |||
| 96 | #define ATH_TXSTATUS_RING_SIZE 512 | ||
| 97 | |||
| 98 | #define DS2PHYS(_dd, _ds) \ | 66 | #define DS2PHYS(_dd, _ds) \ |
| 99 | ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) | 67 | ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) |
| 100 | #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) | 68 | #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) |
| @@ -114,11 +82,20 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, | |||
| 114 | /* RX / TX */ | 82 | /* RX / TX */ |
| 115 | /***********/ | 83 | /***********/ |
| 116 | 84 | ||
| 85 | #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) | ||
| 86 | |||
| 87 | /* increment with wrap-around */ | ||
| 88 | #define INCR(_l, _sz) do { \ | ||
| 89 | (_l)++; \ | ||
| 90 | (_l) &= ((_sz) - 1); \ | ||
| 91 | } while (0) | ||
| 92 | |||
| 117 | #define ATH_RXBUF 512 | 93 | #define ATH_RXBUF 512 |
| 118 | #define ATH_TXBUF 512 | 94 | #define ATH_TXBUF 512 |
| 119 | #define ATH_TXBUF_RESERVE 5 | 95 | #define ATH_TXBUF_RESERVE 5 |
| 120 | #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) | 96 | #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) |
| 121 | #define ATH_TXMAXTRY 13 | 97 | #define ATH_TXMAXTRY 13 |
| 98 | #define ATH_MAX_SW_RETRIES 30 | ||
| 122 | 99 | ||
| 123 | #define TID_TO_WME_AC(_tid) \ | 100 | #define TID_TO_WME_AC(_tid) \ |
| 124 | ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ | 101 | ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \ |
| @@ -134,6 +111,9 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, | |||
| 134 | #define ATH_AGGR_MIN_QDEPTH 2 | 111 | #define ATH_AGGR_MIN_QDEPTH 2 |
| 135 | /* minimum h/w qdepth for non-aggregated traffic */ | 112 | /* minimum h/w qdepth for non-aggregated traffic */ |
| 136 | #define ATH_NON_AGGR_MIN_QDEPTH 8 | 113 | #define ATH_NON_AGGR_MIN_QDEPTH 8 |
| 114 | #define ATH_TX_COMPLETE_POLL_INT 1000 | ||
| 115 | #define ATH_TXFIFO_DEPTH 8 | ||
| 116 | #define ATH_TX_ERROR 0x01 | ||
| 137 | 117 | ||
| 138 | #define IEEE80211_SEQ_SEQ_SHIFT 4 | 118 | #define IEEE80211_SEQ_SEQ_SHIFT 4 |
| 139 | #define IEEE80211_SEQ_MAX 4096 | 119 | #define IEEE80211_SEQ_MAX 4096 |
| @@ -168,9 +148,6 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, | |||
| 168 | 148 | ||
| 169 | #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) | 149 | #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e)) |
| 170 | 150 | ||
| 171 | #define ATH_TX_COMPLETE_POLL_INT 1000 | ||
| 172 | |||
| 173 | #define ATH_TXFIFO_DEPTH 8 | ||
| 174 | struct ath_txq { | 151 | struct ath_txq { |
| 175 | int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ | 152 | int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ |
| 176 | u32 axq_qnum; /* ath9k hardware queue number */ | 153 | u32 axq_qnum; /* ath9k hardware queue number */ |
| @@ -215,6 +192,21 @@ struct ath_rxbuf { | |||
| 215 | dma_addr_t bf_buf_addr; | 192 | dma_addr_t bf_buf_addr; |
| 216 | }; | 193 | }; |
| 217 | 194 | ||
| 195 | /** | ||
| 196 | * enum buffer_type - Buffer type flags | ||
| 197 | * | ||
| 198 | * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) | ||
| 199 | * @BUF_AGGR: Indicates whether the buffer can be aggregated | ||
| 200 | * (used in aggregation scheduling) | ||
| 201 | */ | ||
| 202 | enum buffer_type { | ||
| 203 | BUF_AMPDU = BIT(0), | ||
| 204 | BUF_AGGR = BIT(1), | ||
| 205 | }; | ||
| 206 | |||
| 207 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) | ||
| 208 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) | ||
| 209 | |||
| 218 | struct ath_buf_state { | 210 | struct ath_buf_state { |
| 219 | u8 bf_type; | 211 | u8 bf_type; |
| 220 | u8 bfs_paprd; | 212 | u8 bfs_paprd; |
| @@ -279,7 +271,6 @@ struct ath_tx_control { | |||
| 279 | struct ieee80211_sta *sta; | 271 | struct ieee80211_sta *sta; |
| 280 | }; | 272 | }; |
| 281 | 273 | ||
| 282 | #define ATH_TX_ERROR 0x01 | ||
| 283 | 274 | ||
| 284 | /** | 275 | /** |
| 285 | * @txq_map: Index is mac80211 queue number. This is | 276 | * @txq_map: Index is mac80211 queue number. This is |
| @@ -373,6 +364,22 @@ struct ath_vif { | |||
| 373 | struct ath_buf *av_bcbuf; | 364 | struct ath_buf *av_bcbuf; |
| 374 | }; | 365 | }; |
| 375 | 366 | ||
| 367 | struct ath9k_vif_iter_data { | ||
| 368 | u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ | ||
| 369 | u8 mask[ETH_ALEN]; /* bssid mask */ | ||
| 370 | bool has_hw_macaddr; | ||
| 371 | |||
| 372 | int naps; /* number of AP vifs */ | ||
| 373 | int nmeshes; /* number of mesh vifs */ | ||
| 374 | int nstations; /* number of station vifs */ | ||
| 375 | int nwds; /* number of WDS vifs */ | ||
| 376 | int nadhocs; /* number of adhoc vifs */ | ||
| 377 | }; | ||
| 378 | |||
| 379 | void ath9k_calculate_iter_data(struct ieee80211_hw *hw, | ||
| 380 | struct ieee80211_vif *vif, | ||
| 381 | struct ath9k_vif_iter_data *iter_data); | ||
| 382 | |||
| 376 | /*******************/ | 383 | /*******************/ |
| 377 | /* Beacon Handling */ | 384 | /* Beacon Handling */ |
| 378 | /*******************/ | 385 | /*******************/ |
| @@ -388,6 +395,9 @@ struct ath_vif { | |||
| 388 | #define ATH_DEFAULT_BMISS_LIMIT 10 | 395 | #define ATH_DEFAULT_BMISS_LIMIT 10 |
| 389 | #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) | 396 | #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) |
| 390 | 397 | ||
| 398 | #define TSF_TO_TU(_h,_l) \ | ||
| 399 | ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) | ||
| 400 | |||
| 391 | struct ath_beacon_config { | 401 | struct ath_beacon_config { |
| 392 | int beacon_interval; | 402 | int beacon_interval; |
| 393 | u16 listen_interval; | 403 | u16 listen_interval; |
| @@ -441,10 +451,9 @@ bool ath9k_csa_is_finished(struct ath_softc *sc); | |||
| 441 | #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ | 451 | #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ |
| 442 | #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ | 452 | #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ |
| 443 | #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ | 453 | #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ |
| 444 | #define ATH_ANI_MAX_SKIP_COUNT 10 | 454 | #define ATH_ANI_MAX_SKIP_COUNT 10 |
| 445 | 455 | #define ATH_PAPRD_TIMEOUT 100 /* msecs */ | |
| 446 | #define ATH_PAPRD_TIMEOUT 100 /* msecs */ | 456 | #define ATH_PLL_WORK_INTERVAL 100 |
| 447 | #define ATH_PLL_WORK_INTERVAL 100 | ||
| 448 | 457 | ||
| 449 | void ath_tx_complete_poll_work(struct work_struct *work); | 458 | void ath_tx_complete_poll_work(struct work_struct *work); |
| 450 | void ath_reset_work(struct work_struct *work); | 459 | void ath_reset_work(struct work_struct *work); |
| @@ -538,12 +547,6 @@ static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) | |||
| 538 | } | 547 | } |
| 539 | #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ | 548 | #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ |
| 540 | 549 | ||
| 541 | struct ath9k_wow_pattern { | ||
| 542 | u8 pattern_bytes[MAX_PATTERN_SIZE]; | ||
| 543 | u8 mask_bytes[MAX_PATTERN_SIZE]; | ||
| 544 | u32 pattern_len; | ||
| 545 | }; | ||
| 546 | |||
| 547 | /********************/ | 550 | /********************/ |
| 548 | /* LED Control */ | 551 | /* LED Control */ |
| 549 | /********************/ | 552 | /********************/ |
| @@ -575,6 +578,12 @@ static inline void ath_fill_led_pin(struct ath_softc *sc) | |||
| 575 | /* Wake on Wireless LAN */ | 578 | /* Wake on Wireless LAN */ |
| 576 | /************************/ | 579 | /************************/ |
| 577 | 580 | ||
| 581 | struct ath9k_wow_pattern { | ||
| 582 | u8 pattern_bytes[MAX_PATTERN_SIZE]; | ||
| 583 | u8 mask_bytes[MAX_PATTERN_SIZE]; | ||
| 584 | u32 pattern_len; | ||
| 585 | }; | ||
| 586 | |||
| 578 | #ifdef CONFIG_ATH9K_WOW | 587 | #ifdef CONFIG_ATH9K_WOW |
| 579 | void ath9k_init_wow(struct ieee80211_hw *hw); | 588 | void ath9k_init_wow(struct ieee80211_hw *hw); |
| 580 | int ath9k_suspend(struct ieee80211_hw *hw, | 589 | int ath9k_suspend(struct ieee80211_hw *hw, |
| @@ -678,13 +687,8 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs); | |||
| 678 | * Used when PCI device not fully initialized by bootrom/BIOS | 687 | * Used when PCI device not fully initialized by bootrom/BIOS |
| 679 | */ | 688 | */ |
| 680 | #define DEFAULT_CACHELINE 32 | 689 | #define DEFAULT_CACHELINE 32 |
| 681 | #define ATH_REGCLASSIDS_MAX 10 | ||
| 682 | #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ | 690 | #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ |
| 683 | #define ATH_MAX_SW_RETRIES 30 | ||
| 684 | #define ATH_CHAN_MAX 255 | ||
| 685 | |||
| 686 | #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ | 691 | #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ |
| 687 | #define ATH_RATE_DUMMY_MARKER 0 | ||
| 688 | 692 | ||
| 689 | enum sc_op_flags { | 693 | enum sc_op_flags { |
| 690 | SC_OP_INVALID, | 694 | SC_OP_INVALID, |
| @@ -703,20 +707,6 @@ enum sc_op_flags { | |||
| 703 | #define PS_BEACON_SYNC BIT(4) | 707 | #define PS_BEACON_SYNC BIT(4) |
| 704 | #define PS_WAIT_FOR_ANI BIT(5) | 708 | #define PS_WAIT_FOR_ANI BIT(5) |
| 705 | 709 | ||
| 706 | struct ath_rate_table; | ||
| 707 | |||
| 708 | struct ath9k_vif_iter_data { | ||
| 709 | u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */ | ||
| 710 | u8 mask[ETH_ALEN]; /* bssid mask */ | ||
| 711 | bool has_hw_macaddr; | ||
| 712 | |||
| 713 | int naps; /* number of AP vifs */ | ||
| 714 | int nmeshes; /* number of mesh vifs */ | ||
| 715 | int nstations; /* number of station vifs */ | ||
| 716 | int nwds; /* number of WDS vifs */ | ||
| 717 | int nadhocs; /* number of adhoc vifs */ | ||
| 718 | }; | ||
| 719 | |||
| 720 | struct ath_softc { | 710 | struct ath_softc { |
| 721 | struct ieee80211_hw *hw; | 711 | struct ieee80211_hw *hw; |
| 722 | struct device *dev; | 712 | struct device *dev; |
| @@ -826,19 +816,13 @@ static inline int ath9k_tx99_send(struct ath_softc *sc, | |||
| 826 | } | 816 | } |
| 827 | #endif /* CONFIG_ATH9K_TX99 */ | 817 | #endif /* CONFIG_ATH9K_TX99 */ |
| 828 | 818 | ||
| 829 | void ath9k_tasklet(unsigned long data); | ||
| 830 | int ath_cabq_update(struct ath_softc *); | ||
| 831 | |||
| 832 | static inline void ath_read_cachesize(struct ath_common *common, int *csz) | 819 | static inline void ath_read_cachesize(struct ath_common *common, int *csz) |
| 833 | { | 820 | { |
| 834 | common->bus_ops->read_cachesize(common, csz); | 821 | common->bus_ops->read_cachesize(common, csz); |
| 835 | } | 822 | } |
| 836 | 823 | ||
| 837 | extern struct ieee80211_ops ath9k_ops; | 824 | void ath9k_tasklet(unsigned long data); |
| 838 | extern int ath9k_modparam_nohwcrypt; | 825 | int ath_cabq_update(struct ath_softc *); |
| 839 | extern int led_blink; | ||
| 840 | extern bool is_ath9k_unloaded; | ||
| 841 | |||
| 842 | u8 ath9k_parse_mpdudensity(u8 mpdudensity); | 826 | u8 ath9k_parse_mpdudensity(u8 mpdudensity); |
| 843 | irqreturn_t ath_isr(int irq, void *dev); | 827 | irqreturn_t ath_isr(int irq, void *dev); |
| 844 | int ath_reset(struct ath_softc *sc); | 828 | int ath_reset(struct ath_softc *sc); |
| @@ -847,8 +831,12 @@ void ath_restart_work(struct ath_softc *sc); | |||
| 847 | int ath9k_init_device(u16 devid, struct ath_softc *sc, | 831 | int ath9k_init_device(u16 devid, struct ath_softc *sc, |
| 848 | const struct ath_bus_ops *bus_ops); | 832 | const struct ath_bus_ops *bus_ops); |
| 849 | void ath9k_deinit_device(struct ath_softc *sc); | 833 | void ath9k_deinit_device(struct ath_softc *sc); |
| 850 | void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); | ||
| 851 | void ath9k_reload_chainmask_settings(struct ath_softc *sc); | 834 | void ath9k_reload_chainmask_settings(struct ath_softc *sc); |
| 835 | u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); | ||
| 836 | void ath_start_rfkill_poll(struct ath_softc *sc); | ||
| 837 | void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); | ||
| 838 | void ath9k_ps_wakeup(struct ath_softc *sc); | ||
| 839 | void ath9k_ps_restore(struct ath_softc *sc); | ||
| 852 | 840 | ||
| 853 | #ifdef CONFIG_ATH9K_PCI | 841 | #ifdef CONFIG_ATH9K_PCI |
| 854 | int ath_pci_init(void); | 842 | int ath_pci_init(void); |
| @@ -866,15 +854,4 @@ static inline int ath_ahb_init(void) { return 0; }; | |||
| 866 | static inline void ath_ahb_exit(void) {}; | 854 | static inline void ath_ahb_exit(void) {}; |
| 867 | #endif | 855 | #endif |
| 868 | 856 | ||
| 869 | void ath9k_ps_wakeup(struct ath_softc *sc); | ||
| 870 | void ath9k_ps_restore(struct ath_softc *sc); | ||
| 871 | |||
| 872 | u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); | ||
| 873 | |||
| 874 | void ath_start_rfkill_poll(struct ath_softc *sc); | ||
| 875 | void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); | ||
| 876 | void ath9k_calculate_iter_data(struct ieee80211_hw *hw, | ||
| 877 | struct ieee80211_vif *vif, | ||
| 878 | struct ath9k_vif_iter_data *iter_data); | ||
| 879 | |||
| 880 | #endif /* ATH9K_H */ | 857 | #endif /* ATH9K_H */ |
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index 609b7e13f3f0..9d2c3eb9e34e 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
| @@ -899,7 +899,7 @@ static const struct ieee80211_iface_combination if_comb[] = { | |||
| 899 | } | 899 | } |
| 900 | }; | 900 | }; |
| 901 | 901 | ||
| 902 | void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) | 902 | static void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) |
| 903 | { | 903 | { |
| 904 | struct ath_hw *ah = sc->sc_ah; | 904 | struct ath_hw *ah = sc->sc_ah; |
| 905 | struct ath_common *common = ath9k_hw_common(ah); | 905 | struct ath_common *common = ath9k_hw_common(ah); |
