diff options
| -rw-r--r-- | arch/arm/Kconfig.debug | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos4.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/mach-exynos4-dt.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 30 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/Kconfig | 1 |
5 files changed, 43 insertions, 6 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 6783273f9e0b..04a3f0d1d053 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
| @@ -338,6 +338,17 @@ choice | |||
| 338 | The uncompressor code port configuration is now handled | 338 | The uncompressor code port configuration is now handled |
| 339 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | 339 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
| 340 | 340 | ||
| 341 | config DEBUG_S3C_UART3 | ||
| 342 | depends on PLAT_SAMSUNG && ARCH_EXYNOS | ||
| 343 | bool "Use S3C UART 3 for low-level debug" | ||
| 344 | help | ||
| 345 | Say Y here if you want the debug print routines to direct | ||
| 346 | their output to UART 3. The port must have been initialised | ||
| 347 | by the boot-loader before use. | ||
| 348 | |||
| 349 | The uncompressor code port configuration is now handled | ||
| 350 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | ||
| 351 | |||
| 341 | config DEBUG_SOCFPGA_UART | 352 | config DEBUG_SOCFPGA_UART |
| 342 | depends on ARCH_SOCFPGA | 353 | depends on ARCH_SOCFPGA |
| 343 | bool "Use SOCFPGA UART for low-level debug" | 354 | bool "Use SOCFPGA UART for low-level debug" |
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index a26c3dd58269..96d4462730fb 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi | |||
| @@ -244,5 +244,11 @@ | |||
| 244 | reg = <0x12690000 0x1000>; | 244 | reg = <0x12690000 0x1000>; |
| 245 | interrupts = <0 36 0>; | 245 | interrupts = <0 36 0>; |
| 246 | }; | 246 | }; |
| 247 | |||
| 248 | mdma1: mdma@12850000 { | ||
| 249 | compatible = "arm,pl330", "arm,primecell"; | ||
| 250 | reg = <0x12850000 0x1000>; | ||
| 251 | interrupts = <0 34 0>; | ||
| 252 | }; | ||
| 247 | }; | 253 | }; |
| 248 | }; | 254 | }; |
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index eadf4b59e7d2..6df99c06419d 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c | |||
| @@ -77,6 +77,7 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = { | |||
| 77 | "exynos4210-spi.2", NULL), | 77 | "exynos4210-spi.2", NULL), |
| 78 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL), | 78 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL), |
| 79 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL), | 79 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL), |
| 80 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_MDMA1, "dma-pl330.2", NULL), | ||
| 80 | {}, | 81 | {}, |
| 81 | }; | 82 | }; |
| 82 | 83 | ||
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index f93d820ecab5..4ca8ff14a5bf 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c | |||
| @@ -36,8 +36,22 @@ | |||
| 36 | 36 | ||
| 37 | extern void exynos4_secondary_startup(void); | 37 | extern void exynos4_secondary_startup(void); |
| 38 | 38 | ||
| 39 | #define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ | 39 | static inline void __iomem *cpu_boot_reg_base(void) |
| 40 | S5P_INFORM5 : S5P_VA_SYSRAM) | 40 | { |
| 41 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) | ||
| 42 | return S5P_INFORM5; | ||
| 43 | return S5P_VA_SYSRAM; | ||
| 44 | } | ||
| 45 | |||
| 46 | static inline void __iomem *cpu_boot_reg(int cpu) | ||
| 47 | { | ||
| 48 | void __iomem *boot_reg; | ||
| 49 | |||
| 50 | boot_reg = cpu_boot_reg_base(); | ||
| 51 | if (soc_is_exynos4412()) | ||
| 52 | boot_reg += 4*cpu; | ||
| 53 | return boot_reg; | ||
| 54 | } | ||
| 41 | 55 | ||
| 42 | /* | 56 | /* |
| 43 | * Write pen_release in a way that is guaranteed to be visible to all | 57 | * Write pen_release in a way that is guaranteed to be visible to all |
| @@ -84,6 +98,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu) | |||
| 84 | static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) | 98 | static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) |
| 85 | { | 99 | { |
| 86 | unsigned long timeout; | 100 | unsigned long timeout; |
| 101 | unsigned long phys_cpu = cpu_logical_map(cpu); | ||
| 87 | 102 | ||
| 88 | /* | 103 | /* |
| 89 | * Set synchronisation state between this boot processor | 104 | * Set synchronisation state between this boot processor |
| @@ -99,7 +114,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct | |||
| 99 | * Note that "pen_release" is the hardware CPU ID, whereas | 114 | * Note that "pen_release" is the hardware CPU ID, whereas |
| 100 | * "cpu" is Linux's internal ID. | 115 | * "cpu" is Linux's internal ID. |
| 101 | */ | 116 | */ |
| 102 | write_pen_release(cpu_logical_map(cpu)); | 117 | write_pen_release(phys_cpu); |
| 103 | 118 | ||
| 104 | if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) { | 119 | if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) { |
| 105 | __raw_writel(S5P_CORE_LOCAL_PWR_EN, | 120 | __raw_writel(S5P_CORE_LOCAL_PWR_EN, |
| @@ -133,7 +148,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct | |||
| 133 | smp_rmb(); | 148 | smp_rmb(); |
| 134 | 149 | ||
| 135 | __raw_writel(virt_to_phys(exynos4_secondary_startup), | 150 | __raw_writel(virt_to_phys(exynos4_secondary_startup), |
| 136 | CPU1_BOOT_REG); | 151 | cpu_boot_reg(phys_cpu)); |
| 137 | gic_raise_softirq(cpumask_of(cpu), 0); | 152 | gic_raise_softirq(cpumask_of(cpu), 0); |
| 138 | 153 | ||
| 139 | if (pen_release == -1) | 154 | if (pen_release == -1) |
| @@ -181,6 +196,8 @@ static void __init exynos_smp_init_cpus(void) | |||
| 181 | 196 | ||
| 182 | static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) | 197 | static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) |
| 183 | { | 198 | { |
| 199 | int i; | ||
| 200 | |||
| 184 | if (!soc_is_exynos5250()) | 201 | if (!soc_is_exynos5250()) |
| 185 | scu_enable(scu_base_addr()); | 202 | scu_enable(scu_base_addr()); |
| 186 | 203 | ||
| @@ -190,8 +207,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) | |||
| 190 | * until it receives a soft interrupt, and then the | 207 | * until it receives a soft interrupt, and then the |
| 191 | * secondary CPU branches to this address. | 208 | * secondary CPU branches to this address. |
| 192 | */ | 209 | */ |
| 193 | __raw_writel(virt_to_phys(exynos4_secondary_startup), | 210 | for (i = 1; i < max_cpus; ++i) |
| 194 | CPU1_BOOT_REG); | 211 | __raw_writel(virt_to_phys(exynos4_secondary_startup), |
| 212 | cpu_boot_reg(cpu_logical_map(i))); | ||
| 195 | } | 213 | } |
| 196 | 214 | ||
| 197 | struct smp_operations exynos_smp_ops __initdata = { | 215 | struct smp_operations exynos_smp_ops __initdata = { |
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 95360e679f4e..a9d52167e16e 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
| @@ -507,5 +507,6 @@ config DEBUG_S3C_UART | |||
| 507 | default "0" if DEBUG_S3C_UART0 | 507 | default "0" if DEBUG_S3C_UART0 |
| 508 | default "1" if DEBUG_S3C_UART1 | 508 | default "1" if DEBUG_S3C_UART1 |
| 509 | default "2" if DEBUG_S3C_UART2 | 509 | default "2" if DEBUG_S3C_UART2 |
| 510 | default "3" if DEBUG_S3C_UART3 | ||
| 510 | 511 | ||
| 511 | endif | 512 | endif |
