Merge branch 'next/devel-samsung-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc

From Kukjin Kim:

This is including Samsung small updates(developments) for v3.8.

Add node PL330 MDMA1 and UART3 for DEBUG_LL and secondary cpu bring-up
for exynos4412.

* 'next/devel-samsung-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: add node for PL330 MDMA1 controller for exynos4
  ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
  ARM: EXYNOS: add UART3 to DEBUG_LL ports

Signed-off-by: Olof Johansson <olof@lixom.net>

5 files changed, 43 insertions, 6 deletions

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 6783273f9e0b..04a3f0d1d053 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -338,6 +338,17 @@ choice
                   The uncompressor code port configuration is now handled
                   by CONFIG_S3C_LOWLEVEL_UART_PORT.
 
+        config DEBUG_S3C_UART3
+                depends on PLAT_SAMSUNG && ARCH_EXYNOS
+                bool "Use S3C UART 3 for low-level debug"
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART 3. The port must have been initialised
+                  by the boot-loader before use.
+
+                  The uncompressor code port configuration is now handled
+                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
         config DEBUG_SOCFPGA_UART
                 depends on ARCH_SOCFPGA
                 bool "Use SOCFPGA UART for low-level debug"
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index a26c3dd58269..96d4462730fb 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -244,5 +244,11 @@
                         reg = <0x12690000 0x1000>;
                         interrupts = <0 36 0>;
                 };
+
+                mdma1: mdma@12850000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x12850000 0x1000>;
+                        interrupts = <0 34 0>;
+                };
         };
 };
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index eadf4b59e7d2..6df99c06419d 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -77,6 +77,7 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = {
                                 "exynos4210-spi.2", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL),
+        OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_MDMA1, "dma-pl330.2", NULL),
         {},
 };
 
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index f93d820ecab5..4ca8ff14a5bf 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -36,8 +36,22 @@
 
 extern void exynos4_secondary_startup(void);
 
-#define CPU1_BOOT_REG           (samsung_rev() == EXYNOS4210_REV_1_1 ? \
-                                S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline void __iomem *cpu_boot_reg_base(void)
+{
+        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
+                return S5P_INFORM5;
+        return S5P_VA_SYSRAM;
+}
+
+static inline void __iomem *cpu_boot_reg(int cpu)
+{
+        void __iomem *boot_reg;
+
+        boot_reg = cpu_boot_reg_base();
+        if (soc_is_exynos4412())
+                boot_reg += 4*cpu;
+        return boot_reg;
+}
 
 /*
  * Write pen_release in a way that is guaranteed to be visible to all
@@ -84,6 +98,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
 static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
+        unsigned long phys_cpu = cpu_logical_map(cpu);
 
         /*
          * Set synchronisation state between this boot processor
@@ -99,7 +114,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
          * Note that "pen_release" is the hardware CPU ID, whereas
          * "cpu" is Linux's internal ID.
          */
-        write_pen_release(cpu_logical_map(cpu));
+        write_pen_release(phys_cpu);
 
         if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
                 __raw_writel(S5P_CORE_LOCAL_PWR_EN,
@@ -133,7 +148,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
                 smp_rmb();
 
                 __raw_writel(virt_to_phys(exynos4_secondary_startup),
-                        CPU1_BOOT_REG);
+                                                        cpu_boot_reg(phys_cpu));
                 gic_raise_softirq(cpumask_of(cpu), 0);
 
                 if (pen_release == -1)
@@ -181,6 +196,8 @@ static void __init exynos_smp_init_cpus(void)
 
 static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
 {
+        int i;
+
         if (!soc_is_exynos5250())
                 scu_enable(scu_base_addr());
 
@@ -190,8 +207,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
          * until it receives a soft interrupt, and then the
          * secondary CPU branches to this address.
          */
-        __raw_writel(virt_to_phys(exynos4_secondary_startup),
-                        CPU1_BOOT_REG);
+        for (i = 1; i < max_cpus; ++i)
+                __raw_writel(virt_to_phys(exynos4_secondary_startup),
+                                        cpu_boot_reg(cpu_logical_map(i)));
 }
 
 struct smp_operations exynos_smp_ops __initdata = {
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 95360e679f4e..a9d52167e16e 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -507,5 +507,6 @@ config DEBUG_S3C_UART
         default "0" if DEBUG_S3C_UART0
         default "1" if DEBUG_S3C_UART1
         default "2" if DEBUG_S3C_UART2
+        default "3" if DEBUG_S3C_UART3
 
 endif