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-rw-r--r--drivers/char/drm/via_dma.c4
-rw-r--r--drivers/char/drm/via_dmablit.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/char/drm/via_dma.c b/drivers/char/drm/via_dma.c
index a691ae74129d..2f72cbefc2ff 100644
--- a/drivers/char/drm/via_dma.c
+++ b/drivers/char/drm/via_dma.c
@@ -480,6 +480,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
480 VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); 480 VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
481 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); 481 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
482 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); 482 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
483 VIA_READ(VIA_REG_TRANSPACE);
483 } 484 }
484 } 485 }
485 return paused; 486 return paused;
@@ -557,8 +558,9 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
557 558
558 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); 559 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
559 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); 560 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
560 561 DRM_WRITEMEMORYBARRIER();
561 VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); 562 VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK);
563 VIA_READ(VIA_REG_TRANSPACE);
562} 564}
563 565
564static void via_pad_cache(drm_via_private_t * dev_priv, int qwords) 566static void via_pad_cache(drm_via_private_t * dev_priv, int qwords)
diff --git a/drivers/char/drm/via_dmablit.c b/drivers/char/drm/via_dmablit.c
index 806f9ce5f47b..2054d5773717 100644
--- a/drivers/char/drm/via_dmablit.c
+++ b/drivers/char/drm/via_dmablit.c
@@ -218,7 +218,9 @@ via_fire_dmablit(drm_device_t *dev, drm_via_sg_info_t *vsg, int engine)
218 VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); 218 VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
219 VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0); 219 VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0);
220 VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); 220 VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
221 DRM_WRITEMEMORYBARRIER();
221 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); 222 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
223 VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04);
222} 224}
223 225
224/* 226/*