diff options
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 14 |
4 files changed, 16 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d3274164143d..984523d809a8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1887,4 +1887,14 @@ __i915_write(64, q) | |||
1887 | #define INTEL_BROADCAST_RGB_FULL 1 | 1887 | #define INTEL_BROADCAST_RGB_FULL 1 |
1888 | #define INTEL_BROADCAST_RGB_LIMITED 2 | 1888 | #define INTEL_BROADCAST_RGB_LIMITED 2 |
1889 | 1889 | ||
1890 | static inline uint32_t i915_vgacntrl_reg(struct drm_device *dev) | ||
1891 | { | ||
1892 | if (HAS_PCH_SPLIT(dev)) | ||
1893 | return CPU_VGACNTRL; | ||
1894 | else if (IS_VALLEYVIEW(dev)) | ||
1895 | return VLV_VGACNTRL; | ||
1896 | else | ||
1897 | return VGACNTRL; | ||
1898 | } | ||
1899 | |||
1890 | #endif | 1900 | #endif |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9a3cd047ad9b..e2b592a68f58 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -3238,6 +3238,8 @@ | |||
3238 | # define VGA_2X_MODE (1 << 30) | 3238 | # define VGA_2X_MODE (1 << 30) |
3239 | # define VGA_PIPE_B_SELECT (1 << 29) | 3239 | # define VGA_PIPE_B_SELECT (1 << 29) |
3240 | 3240 | ||
3241 | #define VLV_VGACNTRL (VLV_DISPLAY_BASE + 0x71400) | ||
3242 | |||
3241 | /* Ironlake */ | 3243 | /* Ironlake */ |
3242 | 3244 | ||
3243 | #define CPU_VGACNTRL 0x41000 | 3245 | #define CPU_VGACNTRL 0x41000 |
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 3911e0450bbe..2135f21ea458 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -73,10 +73,7 @@ static void i915_save_vga(struct drm_device *dev) | |||
73 | dev_priv->regfile.saveVGA0 = I915_READ(VGA0); | 73 | dev_priv->regfile.saveVGA0 = I915_READ(VGA0); |
74 | dev_priv->regfile.saveVGA1 = I915_READ(VGA1); | 74 | dev_priv->regfile.saveVGA1 = I915_READ(VGA1); |
75 | dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD); | 75 | dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD); |
76 | if (HAS_PCH_SPLIT(dev)) | 76 | dev_priv->regfile.saveVGACNTRL = I915_READ(i915_vgacntrl_reg(dev)); |
77 | dev_priv->regfile.saveVGACNTRL = I915_READ(CPU_VGACNTRL); | ||
78 | else | ||
79 | dev_priv->regfile.saveVGACNTRL = I915_READ(VGACNTRL); | ||
80 | 77 | ||
81 | /* VGA color palette registers */ | 78 | /* VGA color palette registers */ |
82 | dev_priv->regfile.saveDACMASK = I915_READ8(VGA_DACMASK); | 79 | dev_priv->regfile.saveDACMASK = I915_READ8(VGA_DACMASK); |
@@ -137,10 +134,7 @@ static void i915_restore_vga(struct drm_device *dev) | |||
137 | u16 cr_index, cr_data, st01; | 134 | u16 cr_index, cr_data, st01; |
138 | 135 | ||
139 | /* VGA state */ | 136 | /* VGA state */ |
140 | if (HAS_PCH_SPLIT(dev)) | 137 | I915_WRITE(i915_vgacntrl_reg(dev), dev_priv->regfile.saveVGACNTRL); |
141 | I915_WRITE(CPU_VGACNTRL, dev_priv->regfile.saveVGACNTRL); | ||
142 | else | ||
143 | I915_WRITE(VGACNTRL, dev_priv->regfile.saveVGACNTRL); | ||
144 | 138 | ||
145 | I915_WRITE(VGA0, dev_priv->regfile.saveVGA0); | 139 | I915_WRITE(VGA0, dev_priv->regfile.saveVGA0); |
146 | I915_WRITE(VGA1, dev_priv->regfile.saveVGA1); | 140 | I915_WRITE(VGA1, dev_priv->regfile.saveVGA1); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1f1d045912fb..62f45907e4df 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -8670,12 +8670,7 @@ static void i915_disable_vga(struct drm_device *dev) | |||
8670 | { | 8670 | { |
8671 | struct drm_i915_private *dev_priv = dev->dev_private; | 8671 | struct drm_i915_private *dev_priv = dev->dev_private; |
8672 | u8 sr1; | 8672 | u8 sr1; |
8673 | u32 vga_reg; | 8673 | u32 vga_reg = i915_vgacntrl_reg(dev); |
8674 | |||
8675 | if (HAS_PCH_SPLIT(dev)) | ||
8676 | vga_reg = CPU_VGACNTRL; | ||
8677 | else | ||
8678 | vga_reg = VGACNTRL; | ||
8679 | 8674 | ||
8680 | vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO); | 8675 | vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO); |
8681 | outb(SR01, VGA_SR_INDEX); | 8676 | outb(SR01, VGA_SR_INDEX); |
@@ -8937,12 +8932,7 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) | |||
8937 | void i915_redisable_vga(struct drm_device *dev) | 8932 | void i915_redisable_vga(struct drm_device *dev) |
8938 | { | 8933 | { |
8939 | struct drm_i915_private *dev_priv = dev->dev_private; | 8934 | struct drm_i915_private *dev_priv = dev->dev_private; |
8940 | u32 vga_reg; | 8935 | u32 vga_reg = i915_vgacntrl_reg(dev); |
8941 | |||
8942 | if (HAS_PCH_SPLIT(dev)) | ||
8943 | vga_reg = CPU_VGACNTRL; | ||
8944 | else | ||
8945 | vga_reg = VGACNTRL; | ||
8946 | 8936 | ||
8947 | if (I915_READ(vga_reg) != VGA_DISP_DISABLE) { | 8937 | if (I915_READ(vga_reg) != VGA_DISP_DISABLE) { |
8948 | DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n"); | 8938 | DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n"); |