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-rw-r--r--arch/mips/Kconfig4
-rw-r--r--arch/mips/include/asm/smp-ops.h3
-rw-r--r--arch/mips/kernel/Makefile1
-rw-r--r--arch/mips/kernel/smp-cmp.c52
-rw-r--r--arch/mips/kernel/smp-gic.c53
5 files changed, 63 insertions, 50 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index dcae3a7035db..17f198914e6d 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1996,12 +1996,16 @@ config MIPS_VPE_APSP_API_MT
1996config MIPS_CMP 1996config MIPS_CMP
1997 bool "MIPS CMP support" 1997 bool "MIPS CMP support"
1998 depends on SYS_SUPPORTS_MIPS_CMP && MIPS_MT_SMP 1998 depends on SYS_SUPPORTS_MIPS_CMP && MIPS_MT_SMP
1999 select MIPS_GIC_IPI
1999 select SYNC_R4K 2000 select SYNC_R4K
2000 select WEAK_ORDERING 2001 select WEAK_ORDERING
2001 default n 2002 default n
2002 help 2003 help
2003 Enable Coherency Manager processor (CMP) support. 2004 Enable Coherency Manager processor (CMP) support.
2004 2005
2006config MIPS_GIC_IPI
2007 bool
2008
2005config SB1_PASS_1_WORKAROUNDS 2009config SB1_PASS_1_WORKAROUNDS
2006 bool 2010 bool
2007 depends on CPU_SB1_PASS_1 2011 depends on CPU_SB1_PASS_1
diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h
index ef2a8041e78b..51458bb004da 100644
--- a/arch/mips/include/asm/smp-ops.h
+++ b/arch/mips/include/asm/smp-ops.h
@@ -58,6 +58,9 @@ static inline void register_smp_ops(struct plat_smp_ops *ops)
58 58
59#endif /* !CONFIG_SMP */ 59#endif /* !CONFIG_SMP */
60 60
61extern void gic_send_ipi_single(int cpu, unsigned int action);
62extern void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action);
63
61static inline int register_up_smp_ops(void) 64static inline int register_up_smp_ops(void)
62{ 65{
63#ifdef CONFIG_SMP_UP 66#ifdef CONFIG_SMP_UP
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 26c6175e1379..786a51ddbb78 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_MIPS_MT_FPAFF) += mips-mt-fpaff.o
53obj-$(CONFIG_MIPS_MT_SMTC) += smtc.o smtc-asm.o smtc-proc.o 53obj-$(CONFIG_MIPS_MT_SMTC) += smtc.o smtc-asm.o smtc-proc.o
54obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o 54obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o
55obj-$(CONFIG_MIPS_CMP) += smp-cmp.o 55obj-$(CONFIG_MIPS_CMP) += smp-cmp.o
56obj-$(CONFIG_MIPS_GIC_IPI) += smp-gic.o
56obj-$(CONFIG_CPU_MIPSR2) += spram.o 57obj-$(CONFIG_CPU_MIPSR2) += spram.o
57 58
58obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o 59obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index 1b925d8a610c..594660ed19dc 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -39,54 +39,6 @@
39#include <asm/amon.h> 39#include <asm/amon.h>
40#include <asm/gic.h> 40#include <asm/gic.h>
41 41
42static void ipi_call_function(unsigned int cpu)
43{
44 pr_debug("CPU%d: %s cpu %d status %08x\n",
45 smp_processor_id(), __func__, cpu, read_c0_status());
46
47 gic_send_ipi(plat_ipi_call_int_xlate(cpu));
48}
49
50
51static void ipi_resched(unsigned int cpu)
52{
53 pr_debug("CPU%d: %s cpu %d status %08x\n",
54 smp_processor_id(), __func__, cpu, read_c0_status());
55
56 gic_send_ipi(plat_ipi_resched_int_xlate(cpu));
57}
58
59/*
60 * FIXME: This isn't restricted to CMP
61 * The SMVP kernel could use GIC interrupts if available
62 */
63void cmp_send_ipi_single(int cpu, unsigned int action)
64{
65 unsigned long flags;
66
67 local_irq_save(flags);
68
69 switch (action) {
70 case SMP_CALL_FUNCTION:
71 ipi_call_function(cpu);
72 break;
73
74 case SMP_RESCHEDULE_YOURSELF:
75 ipi_resched(cpu);
76 break;
77 }
78
79 local_irq_restore(flags);
80}
81
82static void cmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
83{
84 unsigned int i;
85
86 for_each_cpu(i, mask)
87 cmp_send_ipi_single(i, action);
88}
89
90static void cmp_init_secondary(void) 42static void cmp_init_secondary(void)
91{ 43{
92 struct cpuinfo_mips *c = &current_cpu_data; 44 struct cpuinfo_mips *c = &current_cpu_data;
@@ -210,8 +162,8 @@ void __init cmp_prepare_cpus(unsigned int max_cpus)
210} 162}
211 163
212struct plat_smp_ops cmp_smp_ops = { 164struct plat_smp_ops cmp_smp_ops = {
213 .send_ipi_single = cmp_send_ipi_single, 165 .send_ipi_single = gic_send_ipi_single,
214 .send_ipi_mask = cmp_send_ipi_mask, 166 .send_ipi_mask = gic_send_ipi_mask,
215 .init_secondary = cmp_init_secondary, 167 .init_secondary = cmp_init_secondary,
216 .smp_finish = cmp_smp_finish, 168 .smp_finish = cmp_smp_finish,
217 .cpus_done = cmp_cpus_done, 169 .cpus_done = cmp_cpus_done,
diff --git a/arch/mips/kernel/smp-gic.c b/arch/mips/kernel/smp-gic.c
new file mode 100644
index 000000000000..3bb1f92ab525
--- /dev/null
+++ b/arch/mips/kernel/smp-gic.c
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2013 Imagination Technologies
3 * Author: Paul Burton <paul.burton@imgtec.com>
4 *
5 * Based on smp-cmp.c:
6 * Copyright (C) 2007 MIPS Technologies, Inc.
7 * Author: Chris Dearman (chris@mips.com)
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/printk.h>
16
17#include <asm/gic.h>
18#include <asm/smp-ops.h>
19
20void gic_send_ipi_single(int cpu, unsigned int action)
21{
22 unsigned long flags;
23 unsigned int intr;
24
25 pr_debug("CPU%d: %s cpu %d action %u status %08x\n",
26 smp_processor_id(), __func__, cpu, action, read_c0_status());
27
28 local_irq_save(flags);
29
30 switch (action) {
31 case SMP_CALL_FUNCTION:
32 intr = plat_ipi_call_int_xlate(cpu);
33 break;
34
35 case SMP_RESCHEDULE_YOURSELF:
36 intr = plat_ipi_resched_int_xlate(cpu);
37 break;
38
39 default:
40 BUG();
41 }
42
43 gic_send_ipi(intr);
44 local_irq_restore(flags);
45}
46
47void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action)
48{
49 unsigned int i;
50
51 for_each_cpu(i, mask)
52 gic_send_ipi_single(i, action);
53}