diff options
-rw-r--r-- | arch/arm/mach-mx5/clock-mx51.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-mx5/devices.c | 58 | ||||
-rw-r--r-- | arch/arm/mach-mx5/devices.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx51.h | 18 |
4 files changed, 84 insertions, 6 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index d9f612d3370e..fd24092154b5 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c | |||
@@ -798,6 +798,14 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET, | |||
798 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, | 798 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, |
799 | NULL, NULL, &ipg_clk, NULL); | 799 | NULL, NULL, &ipg_clk, NULL); |
800 | 800 | ||
801 | /* I2C */ | ||
802 | DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, | ||
803 | NULL, NULL, &ipg_clk, NULL); | ||
804 | DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, | ||
805 | NULL, NULL, &ipg_clk, NULL); | ||
806 | DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, | ||
807 | NULL, NULL, &ipg_clk, NULL); | ||
808 | |||
801 | /* FEC */ | 809 | /* FEC */ |
802 | DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, | 810 | DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, |
803 | NULL, NULL, &ipg_clk, NULL); | 811 | NULL, NULL, &ipg_clk, NULL); |
@@ -815,6 +823,9 @@ static struct clk_lookup lookups[] = { | |||
815 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 823 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
816 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 824 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
817 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 825 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) |
826 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) | ||
827 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) | ||
828 | _REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk) | ||
818 | _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk) | 829 | _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk) |
819 | _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", ahb_clk) | 830 | _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", ahb_clk) |
820 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk) | 831 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk) |
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 7130449aacdc..ede4fcbc7e80 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c | |||
@@ -93,6 +93,64 @@ struct platform_device mxc_fec_device = { | |||
93 | .resource = mxc_fec_resources, | 93 | .resource = mxc_fec_resources, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | static struct resource mxc_i2c0_resources[] = { | ||
97 | { | ||
98 | .start = MX51_I2C1_BASE_ADDR, | ||
99 | .end = MX51_I2C1_BASE_ADDR + SZ_4K - 1, | ||
100 | .flags = IORESOURCE_MEM, | ||
101 | }, { | ||
102 | .start = MX51_MXC_INT_I2C1, | ||
103 | .end = MX51_MXC_INT_I2C1, | ||
104 | .flags = IORESOURCE_IRQ, | ||
105 | }, | ||
106 | }; | ||
107 | |||
108 | struct platform_device mxc_i2c_device0 = { | ||
109 | .name = "imx-i2c", | ||
110 | .id = 0, | ||
111 | .num_resources = ARRAY_SIZE(mxc_i2c0_resources), | ||
112 | .resource = mxc_i2c0_resources, | ||
113 | }; | ||
114 | |||
115 | static struct resource mxc_i2c1_resources[] = { | ||
116 | { | ||
117 | .start = MX51_I2C2_BASE_ADDR, | ||
118 | .end = MX51_I2C2_BASE_ADDR + SZ_4K - 1, | ||
119 | .flags = IORESOURCE_MEM, | ||
120 | }, { | ||
121 | .start = MX51_MXC_INT_I2C2, | ||
122 | .end = MX51_MXC_INT_I2C2, | ||
123 | .flags = IORESOURCE_IRQ, | ||
124 | }, | ||
125 | }; | ||
126 | |||
127 | struct platform_device mxc_i2c_device1 = { | ||
128 | .name = "imx-i2c", | ||
129 | .id = 1, | ||
130 | .num_resources = ARRAY_SIZE(mxc_i2c1_resources), | ||
131 | .resource = mxc_i2c1_resources, | ||
132 | }; | ||
133 | |||
134 | static struct resource mxc_hsi2c_resources[] = { | ||
135 | { | ||
136 | .start = MX51_HSI2C_DMA_BASE_ADDR, | ||
137 | .end = MX51_HSI2C_DMA_BASE_ADDR + SZ_16K - 1, | ||
138 | .flags = IORESOURCE_MEM, | ||
139 | }, | ||
140 | { | ||
141 | .start = MX51_MXC_INT_HS_I2C, | ||
142 | .end = MX51_MXC_INT_HS_I2C, | ||
143 | .flags = IORESOURCE_IRQ, | ||
144 | }, | ||
145 | }; | ||
146 | |||
147 | struct platform_device mxc_hsi2c_device = { | ||
148 | .name = "imx-i2c", | ||
149 | .id = 2, | ||
150 | .num_resources = ARRAY_SIZE(mxc_hsi2c_resources), | ||
151 | .resource = mxc_hsi2c_resources | ||
152 | }; | ||
153 | |||
96 | static u64 usb_dma_mask = DMA_BIT_MASK(32); | 154 | static u64 usb_dma_mask = DMA_BIT_MASK(32); |
97 | 155 | ||
98 | static struct resource usbotg_resources[] = { | 156 | static struct resource usbotg_resources[] = { |
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h index c879ae71cd5b..a853933682e7 100644 --- a/arch/arm/mach-mx5/devices.h +++ b/arch/arm/mach-mx5/devices.h | |||
@@ -6,3 +6,6 @@ extern struct platform_device mxc_usbdr_host_device; | |||
6 | extern struct platform_device mxc_usbh1_device; | 6 | extern struct platform_device mxc_usbh1_device; |
7 | extern struct platform_device mxc_usbdr_udc_device; | 7 | extern struct platform_device mxc_usbdr_udc_device; |
8 | extern struct platform_device mxc_wdt; | 8 | extern struct platform_device mxc_wdt; |
9 | extern struct platform_device mxc_i2c_device0; | ||
10 | extern struct platform_device mxc_i2c_device1; | ||
11 | extern struct platform_device mxc_hsi2c_device; | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index ab0f95d953d0..38961c6a6f0d 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h | |||
@@ -38,6 +38,8 @@ typedef enum iomux_config { | |||
38 | PAD_CTL_SRE_FAST) | 38 | PAD_CTL_SRE_FAST) |
39 | #define MX51_UART3_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ | 39 | #define MX51_UART3_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ |
40 | PAD_CTL_SRE_FAST) | 40 | PAD_CTL_SRE_FAST) |
41 | #define MX51_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ | ||
42 | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS) | ||
41 | #define MX51_USBH1_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ | 43 | #define MX51_USBH1_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ |
42 | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ | 44 | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ |
43 | PAD_CTL_PKE | PAD_CTL_HYS) | 45 | PAD_CTL_PKE | PAD_CTL_HYS) |
@@ -57,10 +59,12 @@ typedef enum iomux_config { | |||
57 | 59 | ||
58 | /* PAD MUX ALT INPSE PATH PADCTRL */ | 60 | /* PAD MUX ALT INPSE PATH PADCTRL */ |
59 | 61 | ||
60 | #define MX51_PAD_GPIO_2_0__EIM_D16 IOMUX_PAD(0x3f0, 0x05c, 1, 0x0, 0, NO_PAD_CTRL) | 62 | #define MX51_PAD_EIM_D16__I2C1_SDA IOMUX_PAD(0x3f0, 0x05c, IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION, \ |
63 | 0x09b4, 0, MX51_I2C_PAD_CTRL) | ||
61 | #define MX51_PAD_GPIO_2_1__EIM_D17 IOMUX_PAD(0x3f4, 0x060, 1, 0x0, 0, NO_PAD_CTRL) | 64 | #define MX51_PAD_GPIO_2_1__EIM_D17 IOMUX_PAD(0x3f4, 0x060, 1, 0x0, 0, NO_PAD_CTRL) |
62 | #define MX51_PAD_GPIO_2_2__EIM_D18 IOMUX_PAD(0x3f8, 0x064, 1, 0x0, 0, NO_PAD_CTRL) | 65 | #define MX51_PAD_GPIO_2_2__EIM_D18 IOMUX_PAD(0x3f8, 0x064, 1, 0x0, 0, NO_PAD_CTRL) |
63 | #define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL) | 66 | #define MX51_PAD_EIM_D19__I2C1_SCL IOMUX_PAD(0x3fc, 0x068, IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION, \ |
67 | 0x09b0, 0, MX51_I2C_PAD_CTRL) | ||
64 | #define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) | 68 | #define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) |
65 | #define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL) | 69 | #define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL) |
66 | #define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, IOMUX_CONFIG_ALT1, 0x0, 0, MX51_GPIO_PAD_CTRL) | 70 | #define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, IOMUX_CONFIG_ALT1, 0x0, 0, MX51_GPIO_PAD_CTRL) |
@@ -179,8 +183,8 @@ typedef enum iomux_config { | |||
179 | #define MX51_PAD_GPIO_4_14__CSI2_HSYNC IOMUX_PAD(0x5E0, 0x1F0, 3, 0x0, 0, NO_PAD_CTRL) | 183 | #define MX51_PAD_GPIO_4_14__CSI2_HSYNC IOMUX_PAD(0x5E0, 0x1F0, 3, 0x0, 0, NO_PAD_CTRL) |
180 | #define MX51_PAD_GPIO_4_15__CSI2_PIXCLK IOMUX_PAD(0x5E4, 0x1F4, 3, 0x0, 0, NO_PAD_CTRL) | 184 | #define MX51_PAD_GPIO_4_15__CSI2_PIXCLK IOMUX_PAD(0x5E4, 0x1F4, 3, 0x0, 0, NO_PAD_CTRL) |
181 | #define MX51_PAD_CSI2_PKE0__CSI2_PKE0 IOMUX_PAD(0x81C, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | 185 | #define MX51_PAD_CSI2_PKE0__CSI2_PKE0 IOMUX_PAD(0x81C, 0x0, 0, 0x0, 0, NO_PAD_CTRL) |
182 | #define MX51_PAD_GPIO_4_16__I2C1_CLK IOMUX_PAD(0x5E8, 0x1F8, 3, 0x0, 0, NO_PAD_CTRL) | 186 | #define MX51_PAD_I2C1_CLK__HSI2C_CLK IOMUX_PAD(0x5E8, 0x1F8, IOMUX_CONFIG_ALT0, 0x0, 0, NO_PAD_CTRL) |
183 | #define MX51_PAD_GPIO_4_17__I2C1_DAT IOMUX_PAD(0x5EC, 0x1FC, 3, 0x0, 0, NO_PAD_CTRL) | 187 | #define MX51_PAD_I2C1_DAT__HSI2C_DAT IOMUX_PAD(0x5EC, 0x1FC, IOMUX_CONFIG_ALT0, 0x0, 0, NO_PAD_CTRL) |
184 | #define MX51_PAD_GPIO_4_18__AUD3_BB_TXD IOMUX_PAD(0x5F0, 0x200, 3, 0x0, 0, NO_PAD_CTRL) | 188 | #define MX51_PAD_GPIO_4_18__AUD3_BB_TXD IOMUX_PAD(0x5F0, 0x200, 3, 0x0, 0, NO_PAD_CTRL) |
185 | #define MX51_PAD_GPIO_4_19__AUD3_BB_RXD IOMUX_PAD(0x5F4, 0x204, 3, 0x0, 0, NO_PAD_CTRL) | 189 | #define MX51_PAD_GPIO_4_19__AUD3_BB_RXD IOMUX_PAD(0x5F4, 0x204, 3, 0x0, 0, NO_PAD_CTRL) |
186 | #define MX51_PAD_GPIO_4_20__AUD3_BB_CK IOMUX_PAD(0x5F8, 0x208, 3, 0x0, 0, NO_PAD_CTRL) | 190 | #define MX51_PAD_GPIO_4_20__AUD3_BB_CK IOMUX_PAD(0x5F8, 0x208, 3, 0x0, 0, NO_PAD_CTRL) |
@@ -213,8 +217,10 @@ typedef enum iomux_config { | |||
213 | #define MX51_PAD_KEY_COL1__KEY_COL1 IOMUX_PAD(0x650, 0x260, 0, 0x0, 0, NO_PAD_CTRL) | 217 | #define MX51_PAD_KEY_COL1__KEY_COL1 IOMUX_PAD(0x650, 0x260, 0, 0x0, 0, NO_PAD_CTRL) |
214 | #define MX51_PAD_KEY_COL2__KEY_COL2 IOMUX_PAD(0x654, 0x264, 0, 0x0, 0, NO_PAD_CTRL) | 218 | #define MX51_PAD_KEY_COL2__KEY_COL2 IOMUX_PAD(0x654, 0x264, 0, 0x0, 0, NO_PAD_CTRL) |
215 | #define MX51_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL) | 219 | #define MX51_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL) |
216 | #define MX51_PAD_KEY_COL4__KEY_COL4 IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL) | 220 | #define MX51_PAD_KEY_COL4__I2C2_SCL IOMUX_PAD(0x65C, 0x26C, IOMUX_CONFIG_ALT3 | IOMUX_CONFIG_SION, \ |
217 | #define MX51_PAD_KEY_COL5__KEY_COL5 IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL) | 221 | 0x09b8, 1, MX51_I2C_PAD_CTRL) |
222 | #define MX51_PAD_KEY_COL5__I2C2_SDA IOMUX_PAD(0x660, 0x270, IOMUX_CONFIG_ALT3 | IOMUX_CONFIG_SION, \ | ||
223 | 0x09bc, 1, MX51_I2C_PAD_CTRL) | ||
218 | #define MX51_PAD_USBH1_CLK__USBH1_CLK IOMUX_PAD(0x678, 0x278, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) | 224 | #define MX51_PAD_USBH1_CLK__USBH1_CLK IOMUX_PAD(0x678, 0x278, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
219 | #define MX51_PAD_USBH1_DIR__USBH1_DIR IOMUX_PAD(0x67C, 0x27C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) | 225 | #define MX51_PAD_USBH1_DIR__USBH1_DIR IOMUX_PAD(0x67C, 0x27C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
220 | #define MX51_PAD_USBH1_STP__USBH1_STP IOMUX_PAD(0x680, 0x280, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) | 226 | #define MX51_PAD_USBH1_STP__USBH1_STP IOMUX_PAD(0x680, 0x280, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |