diff options
-rw-r--r-- | arch/mips/alchemy/common/gpiolib-au1000.c | 10 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-au1x00/gpio-au1000.h | 90 |
2 files changed, 51 insertions, 49 deletions
diff --git a/arch/mips/alchemy/common/gpiolib-au1000.c b/arch/mips/alchemy/common/gpiolib-au1000.c index 1bfa91f939f4..c8e1a94d4a95 100644 --- a/arch/mips/alchemy/common/gpiolib-au1000.c +++ b/arch/mips/alchemy/common/gpiolib-au1000.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <asm/mach-au1x00/au1000.h> | 36 | #include <asm/mach-au1x00/au1000.h> |
37 | #include <asm/mach-au1x00/gpio.h> | 37 | #include <asm/mach-au1x00/gpio.h> |
38 | 38 | ||
39 | #if !defined(CONFIG_SOC_AU1000) | ||
40 | static int gpio2_get(struct gpio_chip *chip, unsigned offset) | 39 | static int gpio2_get(struct gpio_chip *chip, unsigned offset) |
41 | { | 40 | { |
42 | return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE); | 41 | return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE); |
@@ -63,7 +62,7 @@ static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset) | |||
63 | { | 62 | { |
64 | return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE); | 63 | return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE); |
65 | } | 64 | } |
66 | #endif /* !defined(CONFIG_SOC_AU1000) */ | 65 | |
67 | 66 | ||
68 | static int gpio1_get(struct gpio_chip *chip, unsigned offset) | 67 | static int gpio1_get(struct gpio_chip *chip, unsigned offset) |
69 | { | 68 | { |
@@ -104,7 +103,6 @@ struct gpio_chip alchemy_gpio_chip[] = { | |||
104 | .base = ALCHEMY_GPIO1_BASE, | 103 | .base = ALCHEMY_GPIO1_BASE, |
105 | .ngpio = ALCHEMY_GPIO1_NUM, | 104 | .ngpio = ALCHEMY_GPIO1_NUM, |
106 | }, | 105 | }, |
107 | #if !defined(CONFIG_SOC_AU1000) | ||
108 | [1] = { | 106 | [1] = { |
109 | .label = "alchemy-gpio2", | 107 | .label = "alchemy-gpio2", |
110 | .direction_input = gpio2_direction_input, | 108 | .direction_input = gpio2_direction_input, |
@@ -115,15 +113,13 @@ struct gpio_chip alchemy_gpio_chip[] = { | |||
115 | .base = ALCHEMY_GPIO2_BASE, | 113 | .base = ALCHEMY_GPIO2_BASE, |
116 | .ngpio = ALCHEMY_GPIO2_NUM, | 114 | .ngpio = ALCHEMY_GPIO2_NUM, |
117 | }, | 115 | }, |
118 | #endif | ||
119 | }; | 116 | }; |
120 | 117 | ||
121 | static int __init alchemy_gpiolib_init(void) | 118 | static int __init alchemy_gpiolib_init(void) |
122 | { | 119 | { |
123 | gpiochip_add(&alchemy_gpio_chip[0]); | 120 | gpiochip_add(&alchemy_gpio_chip[0]); |
124 | #if !defined(CONFIG_SOC_AU1000) | 121 | if (alchemy_get_cputype() != ALCHEMY_CPU_AU1000) |
125 | gpiochip_add(&alchemy_gpio_chip[1]); | 122 | gpiochip_add(&alchemy_gpio_chip[1]); |
126 | #endif | ||
127 | 123 | ||
128 | return 0; | 124 | return 0; |
129 | } | 125 | } |
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h index 9cf32d9dbb21..62d2f136d941 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h +++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h | |||
@@ -236,19 +236,19 @@ static inline int alchemy_gpio1_is_valid(int gpio) | |||
236 | 236 | ||
237 | static inline int alchemy_gpio1_to_irq(int gpio) | 237 | static inline int alchemy_gpio1_to_irq(int gpio) |
238 | { | 238 | { |
239 | #if defined(CONFIG_SOC_AU1000) | 239 | switch (alchemy_get_cputype()) { |
240 | return au1000_gpio1_to_irq(gpio); | 240 | case ALCHEMY_CPU_AU1000: |
241 | #elif defined(CONFIG_SOC_AU1100) | 241 | return au1000_gpio1_to_irq(gpio); |
242 | return au1100_gpio1_to_irq(gpio); | 242 | case ALCHEMY_CPU_AU1100: |
243 | #elif defined(CONFIG_SOC_AU1500) | 243 | return au1100_gpio1_to_irq(gpio); |
244 | return au1500_gpio1_to_irq(gpio); | 244 | case ALCHEMY_CPU_AU1500: |
245 | #elif defined(CONFIG_SOC_AU1550) | 245 | return au1500_gpio1_to_irq(gpio); |
246 | return au1550_gpio1_to_irq(gpio); | 246 | case ALCHEMY_CPU_AU1550: |
247 | #elif defined(CONFIG_SOC_AU1200) | 247 | return au1550_gpio1_to_irq(gpio); |
248 | return au1200_gpio1_to_irq(gpio); | 248 | case ALCHEMY_CPU_AU1200: |
249 | #else | 249 | return au1200_gpio1_to_irq(gpio); |
250 | } | ||
250 | return -ENXIO; | 251 | return -ENXIO; |
251 | #endif | ||
252 | } | 252 | } |
253 | 253 | ||
254 | /* | 254 | /* |
@@ -306,19 +306,19 @@ static inline int alchemy_gpio2_is_valid(int gpio) | |||
306 | 306 | ||
307 | static inline int alchemy_gpio2_to_irq(int gpio) | 307 | static inline int alchemy_gpio2_to_irq(int gpio) |
308 | { | 308 | { |
309 | #if defined(CONFIG_SOC_AU1000) | 309 | switch (alchemy_get_cputype()) { |
310 | return au1000_gpio2_to_irq(gpio); | 310 | case ALCHEMY_CPU_AU1000: |
311 | #elif defined(CONFIG_SOC_AU1100) | 311 | return au1000_gpio2_to_irq(gpio); |
312 | return au1100_gpio2_to_irq(gpio); | 312 | case ALCHEMY_CPU_AU1100: |
313 | #elif defined(CONFIG_SOC_AU1500) | 313 | return au1100_gpio2_to_irq(gpio); |
314 | return au1500_gpio2_to_irq(gpio); | 314 | case ALCHEMY_CPU_AU1500: |
315 | #elif defined(CONFIG_SOC_AU1550) | 315 | return au1500_gpio2_to_irq(gpio); |
316 | return au1550_gpio2_to_irq(gpio); | 316 | case ALCHEMY_CPU_AU1550: |
317 | #elif defined(CONFIG_SOC_AU1200) | 317 | return au1550_gpio2_to_irq(gpio); |
318 | return au1200_gpio2_to_irq(gpio); | 318 | case ALCHEMY_CPU_AU1200: |
319 | #else | 319 | return au1200_gpio2_to_irq(gpio); |
320 | } | ||
320 | return -ENXIO; | 321 | return -ENXIO; |
321 | #endif | ||
322 | } | 322 | } |
323 | 323 | ||
324 | /**********************************************************************/ | 324 | /**********************************************************************/ |
@@ -374,10 +374,13 @@ static inline void alchemy_gpio2_enable_int(int gpio2) | |||
374 | 374 | ||
375 | gpio2 -= ALCHEMY_GPIO2_BASE; | 375 | gpio2 -= ALCHEMY_GPIO2_BASE; |
376 | 376 | ||
377 | #if defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500) | ||
378 | /* Au1100/Au1500 have GPIO208-215 enable bits at 0..7 */ | 377 | /* Au1100/Au1500 have GPIO208-215 enable bits at 0..7 */ |
379 | gpio2 -= 8; | 378 | switch (alchemy_get_cputype()) { |
380 | #endif | 379 | case ALCHEMY_CPU_AU1100: |
380 | case ALCHEMY_CPU_AU1500: | ||
381 | gpio2 -= 8; | ||
382 | } | ||
383 | |||
381 | local_irq_save(flags); | 384 | local_irq_save(flags); |
382 | __alchemy_gpio2_mod_int(gpio2, 1); | 385 | __alchemy_gpio2_mod_int(gpio2, 1); |
383 | local_irq_restore(flags); | 386 | local_irq_restore(flags); |
@@ -395,10 +398,13 @@ static inline void alchemy_gpio2_disable_int(int gpio2) | |||
395 | 398 | ||
396 | gpio2 -= ALCHEMY_GPIO2_BASE; | 399 | gpio2 -= ALCHEMY_GPIO2_BASE; |
397 | 400 | ||
398 | #if defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500) | ||
399 | /* Au1100/Au1500 have GPIO208-215 enable bits at 0..7 */ | 401 | /* Au1100/Au1500 have GPIO208-215 enable bits at 0..7 */ |
400 | gpio2 -= 8; | 402 | switch (alchemy_get_cputype()) { |
401 | #endif | 403 | case ALCHEMY_CPU_AU1100: |
404 | case ALCHEMY_CPU_AU1500: | ||
405 | gpio2 -= 8; | ||
406 | } | ||
407 | |||
402 | local_irq_save(flags); | 408 | local_irq_save(flags); |
403 | __alchemy_gpio2_mod_int(gpio2, 0); | 409 | __alchemy_gpio2_mod_int(gpio2, 0); |
404 | local_irq_restore(flags); | 410 | local_irq_restore(flags); |
@@ -484,19 +490,19 @@ static inline int alchemy_gpio_to_irq(int gpio) | |||
484 | 490 | ||
485 | static inline int alchemy_irq_to_gpio(int irq) | 491 | static inline int alchemy_irq_to_gpio(int irq) |
486 | { | 492 | { |
487 | #if defined(CONFIG_SOC_AU1000) | 493 | switch (alchemy_get_cputype()) { |
488 | return au1000_irq_to_gpio(irq); | 494 | case ALCHEMY_CPU_AU1000: |
489 | #elif defined(CONFIG_SOC_AU1100) | 495 | return au1000_irq_to_gpio(irq); |
490 | return au1100_irq_to_gpio(irq); | 496 | case ALCHEMY_CPU_AU1100: |
491 | #elif defined(CONFIG_SOC_AU1500) | 497 | return au1100_irq_to_gpio(irq); |
492 | return au1500_irq_to_gpio(irq); | 498 | case ALCHEMY_CPU_AU1500: |
493 | #elif defined(CONFIG_SOC_AU1550) | 499 | return au1500_irq_to_gpio(irq); |
494 | return au1550_irq_to_gpio(irq); | 500 | case ALCHEMY_CPU_AU1550: |
495 | #elif defined(CONFIG_SOC_AU1200) | 501 | return au1550_irq_to_gpio(irq); |
496 | return au1200_irq_to_gpio(irq); | 502 | case ALCHEMY_CPU_AU1200: |
497 | #else | 503 | return au1200_irq_to_gpio(irq); |
504 | } | ||
498 | return -ENXIO; | 505 | return -ENXIO; |
499 | #endif | ||
500 | } | 506 | } |
501 | 507 | ||
502 | /**********************************************************************/ | 508 | /**********************************************************************/ |