diff options
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.c | 50 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.h | 11 |
2 files changed, 61 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 11f53589a3f3..d39b79f5e841 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
| @@ -701,6 +701,54 @@ static int ar9550_hw_get_modes_txgain_index(struct ath_hw *ah, | |||
| 701 | return ret; | 701 | return ret; |
| 702 | } | 702 | } |
| 703 | 703 | ||
| 704 | static void ar9003_doubler_fix(struct ath_hw *ah) | ||
| 705 | { | ||
| 706 | if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) { | ||
| 707 | REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, | ||
| 708 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | | ||
| 709 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0); | ||
| 710 | REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, | ||
| 711 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | | ||
| 712 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0); | ||
| 713 | REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, | ||
| 714 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | | ||
| 715 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0); | ||
| 716 | |||
| 717 | udelay(200); | ||
| 718 | |||
| 719 | REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2, | ||
| 720 | AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK); | ||
| 721 | REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2, | ||
| 722 | AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK); | ||
| 723 | REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2, | ||
| 724 | AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK); | ||
| 725 | |||
| 726 | udelay(1); | ||
| 727 | |||
| 728 | REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2, | ||
| 729 | AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1); | ||
| 730 | REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX2, | ||
| 731 | AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1); | ||
| 732 | REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX2, | ||
| 733 | AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1); | ||
| 734 | |||
| 735 | udelay(200); | ||
| 736 | |||
| 737 | REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH12, | ||
| 738 | AR_PHY_65NM_CH0_SYNTH12_VREFMUL3, 0xf); | ||
| 739 | |||
| 740 | REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0, | ||
| 741 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | | ||
| 742 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S); | ||
| 743 | REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0, | ||
| 744 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | | ||
| 745 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S); | ||
| 746 | REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0, | ||
| 747 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | | ||
| 748 | 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S); | ||
| 749 | } | ||
| 750 | } | ||
| 751 | |||
| 704 | static int ar9003_hw_process_ini(struct ath_hw *ah, | 752 | static int ar9003_hw_process_ini(struct ath_hw *ah, |
| 705 | struct ath9k_channel *chan) | 753 | struct ath9k_channel *chan) |
| 706 | { | 754 | { |
| @@ -726,6 +774,8 @@ static int ar9003_hw_process_ini(struct ath_hw *ah, | |||
| 726 | modesIndex); | 774 | modesIndex); |
| 727 | } | 775 | } |
| 728 | 776 | ||
| 777 | ar9003_doubler_fix(ah); | ||
| 778 | |||
| 729 | /* | 779 | /* |
| 730 | * RXGAIN initvals. | 780 | * RXGAIN initvals. |
| 731 | */ | 781 | */ |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index fca624322dc8..2af667beb273 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h | |||
| @@ -656,13 +656,24 @@ | |||
| 656 | #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002) | 656 | #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002) |
| 657 | #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1) | 657 | #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1) |
| 658 | #define AR_PHY_65NM_CH0_SYNTH7 0x16098 | 658 | #define AR_PHY_65NM_CH0_SYNTH7 0x16098 |
| 659 | #define AR_PHY_65NM_CH0_SYNTH12 0x160ac | ||
| 659 | #define AR_PHY_65NM_CH0_BIAS1 0x160c0 | 660 | #define AR_PHY_65NM_CH0_BIAS1 0x160c0 |
| 660 | #define AR_PHY_65NM_CH0_BIAS2 0x160c4 | 661 | #define AR_PHY_65NM_CH0_BIAS2 0x160c4 |
| 661 | #define AR_PHY_65NM_CH0_BIAS4 0x160cc | 662 | #define AR_PHY_65NM_CH0_BIAS4 0x160cc |
| 663 | #define AR_PHY_65NM_CH0_RXTX2 0x16104 | ||
| 664 | #define AR_PHY_65NM_CH1_RXTX2 0x16504 | ||
| 665 | #define AR_PHY_65NM_CH2_RXTX2 0x16904 | ||
| 662 | #define AR_PHY_65NM_CH0_RXTX4 0x1610c | 666 | #define AR_PHY_65NM_CH0_RXTX4 0x1610c |
| 663 | #define AR_PHY_65NM_CH1_RXTX4 0x1650c | 667 | #define AR_PHY_65NM_CH1_RXTX4 0x1650c |
| 664 | #define AR_PHY_65NM_CH2_RXTX4 0x1690c | 668 | #define AR_PHY_65NM_CH2_RXTX4 0x1690c |
| 665 | 669 | ||
| 670 | #define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3 0x00780000 | ||
| 671 | #define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3_S 19 | ||
| 672 | #define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK 0x00000004 | ||
| 673 | #define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S 2 | ||
| 674 | #define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK 0x00000008 | ||
| 675 | #define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S 3 | ||
| 676 | |||
| 666 | #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \ | 677 | #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \ |
| 667 | (((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280))) | 678 | (((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280))) |
| 668 | #define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300) | 679 | #define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300) |
