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-rw-r--r--drivers/gpu/drm/ast/ast_tables.h1
-rw-r--r--drivers/gpu/drm/drm_crtc.c3
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c2
-rw-r--r--drivers/gpu/drm/msm/msm_drv.c3
-rw-r--r--drivers/gpu/drm/msm/msm_fbdev.c2
-rw-r--r--drivers/gpu/drm/msm/msm_iommu.c4
-rw-r--r--drivers/gpu/drm/radeon/cik.c26
-rw-r--r--drivers/gpu/drm/radeon/ni.c9
-rw-r--r--drivers/gpu/drm/radeon/r600.c26
-rw-r--r--drivers/gpu/drm/radeon/radeon.h2
-rw-r--r--drivers/gpu/drm/radeon/rv770.c23
-rw-r--r--drivers/gpu/drm/radeon/si.c21
-rw-r--r--drivers/gpu/drm/sti/Kconfig1
-rw-r--r--drivers/gpu/drm/sti/sti_drm_drv.c4
-rw-r--r--drivers/gpu/drm/sti/sti_hda.c10
-rw-r--r--drivers/gpu/drm/sti/sti_hdmi.c10
-rw-r--r--drivers/gpu/drm/sti/sti_tvout.c6
-rw-r--r--lib/Kconfig.debug4
18 files changed, 92 insertions, 65 deletions
diff --git a/drivers/gpu/drm/ast/ast_tables.h b/drivers/gpu/drm/ast/ast_tables.h
index 4c761dcea972..05c01ea85294 100644
--- a/drivers/gpu/drm/ast/ast_tables.h
+++ b/drivers/gpu/drm/ast/ast_tables.h
@@ -99,6 +99,7 @@ static struct ast_vbios_dclk_info dclk_table[] = {
99 {0x25, 0x65, 0x80}, /* 16: VCLK88.75 */ 99 {0x25, 0x65, 0x80}, /* 16: VCLK88.75 */
100 {0x77, 0x58, 0x80}, /* 17: VCLK119 */ 100 {0x77, 0x58, 0x80}, /* 17: VCLK119 */
101 {0x32, 0x67, 0x80}, /* 18: VCLK85_5 */ 101 {0x32, 0x67, 0x80}, /* 18: VCLK85_5 */
102 {0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */
102}; 103};
103 104
104static struct ast_vbios_stdtable vbios_stdtable[] = { 105static struct ast_vbios_stdtable vbios_stdtable[] = {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index fa2be249999c..90e773019eac 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -4696,8 +4696,9 @@ int drm_mode_create_dumb_ioctl(struct drm_device *dev,
4696 return -EINVAL; 4696 return -EINVAL;
4697 4697
4698 /* overflow checks for 32bit size calculations */ 4698 /* overflow checks for 32bit size calculations */
4699 /* NOTE: DIV_ROUND_UP() can overflow */
4699 cpp = DIV_ROUND_UP(args->bpp, 8); 4700 cpp = DIV_ROUND_UP(args->bpp, 8);
4700 if (cpp > 0xffffffffU / args->width) 4701 if (!cpp || cpp > 0xffffffffU / args->width)
4701 return -EINVAL; 4702 return -EINVAL;
4702 stride = cpp * args->width; 4703 stride = cpp * args->width;
4703 if (args->height > 0xffffffffU / stride) 4704 if (args->height > 0xffffffffU / stride)
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
index 74cebb51e8c2..c6c80ea28c35 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
@@ -397,6 +397,7 @@ static void mdp4_crtc_prepare(struct drm_crtc *crtc)
397 struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); 397 struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
398 DBG("%s", mdp4_crtc->name); 398 DBG("%s", mdp4_crtc->name);
399 /* make sure we hold a ref to mdp clks while setting up mode: */ 399 /* make sure we hold a ref to mdp clks while setting up mode: */
400 drm_crtc_vblank_get(crtc);
400 mdp4_enable(get_kms(crtc)); 401 mdp4_enable(get_kms(crtc));
401 mdp4_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 402 mdp4_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
402} 403}
@@ -407,6 +408,7 @@ static void mdp4_crtc_commit(struct drm_crtc *crtc)
407 crtc_flush(crtc); 408 crtc_flush(crtc);
408 /* drop the ref to mdp clk's that we got in prepare: */ 409 /* drop the ref to mdp clk's that we got in prepare: */
409 mdp4_disable(get_kms(crtc)); 410 mdp4_disable(get_kms(crtc));
411 drm_crtc_vblank_put(crtc);
410} 412}
411 413
412static int mdp4_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, 414static int mdp4_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index b447c01ad89c..26ee80db17af 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -974,12 +974,11 @@ static int msm_pdev_probe(struct platform_device *pdev)
974 974
975 for (i = 0; i < ARRAY_SIZE(devnames); i++) { 975 for (i = 0; i < ARRAY_SIZE(devnames); i++) {
976 struct device *dev; 976 struct device *dev;
977 int ret;
978 977
979 dev = bus_find_device_by_name(&platform_bus_type, 978 dev = bus_find_device_by_name(&platform_bus_type,
980 NULL, devnames[i]); 979 NULL, devnames[i]);
981 if (!dev) { 980 if (!dev) {
982 dev_info(master, "still waiting for %s\n", devnames[i]); 981 dev_info(&pdev->dev, "still waiting for %s\n", devnames[i]);
983 return -EPROBE_DEFER; 982 return -EPROBE_DEFER;
984 } 983 }
985 984
diff --git a/drivers/gpu/drm/msm/msm_fbdev.c b/drivers/gpu/drm/msm/msm_fbdev.c
index 9c5221ce391a..ab5bfd2d0ebf 100644
--- a/drivers/gpu/drm/msm/msm_fbdev.c
+++ b/drivers/gpu/drm/msm/msm_fbdev.c
@@ -143,7 +143,7 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
143 ret = msm_gem_get_iova_locked(fbdev->bo, 0, &paddr); 143 ret = msm_gem_get_iova_locked(fbdev->bo, 0, &paddr);
144 if (ret) { 144 if (ret) {
145 dev_err(dev->dev, "failed to get buffer obj iova: %d\n", ret); 145 dev_err(dev->dev, "failed to get buffer obj iova: %d\n", ret);
146 goto fail; 146 goto fail_unlock;
147 } 147 }
148 148
149 fbi = framebuffer_alloc(0, dev->dev); 149 fbi = framebuffer_alloc(0, dev->dev);
diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index 099af483fdf0..7acdaa5688b7 100644
--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@ -27,8 +27,8 @@ struct msm_iommu {
27static int msm_fault_handler(struct iommu_domain *iommu, struct device *dev, 27static int msm_fault_handler(struct iommu_domain *iommu, struct device *dev,
28 unsigned long iova, int flags, void *arg) 28 unsigned long iova, int flags, void *arg)
29{ 29{
30 DBG("*** fault: iova=%08lx, flags=%d", iova, flags); 30 pr_warn_ratelimited("*** fault: iova=%08lx, flags=%d\n", iova, flags);
31 return -ENOSYS; 31 return 0;
32} 32}
33 33
34static int msm_iommu_attach(struct msm_mmu *mmu, const char **names, int cnt) 34static int msm_iommu_attach(struct msm_mmu *mmu, const char **names, int cnt)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 79a5a5519bd6..fa9565957f9d 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -5749,20 +5749,17 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
5749 WREG32(0x15D8, 0); 5749 WREG32(0x15D8, 0);
5750 WREG32(0x15DC, 0); 5750 WREG32(0x15DC, 0);
5751 5751
5752 /* empty context1-15 */ 5752 /* restore context1-15 */
5753 /* FIXME start with 4G, once using 2 level pt switch to full
5754 * vm size space
5755 */
5756 /* set vm size, must be a multiple of 4 */ 5753 /* set vm size, must be a multiple of 4 */
5757 WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0); 5754 WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);
5758 WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn); 5755 WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn);
5759 for (i = 1; i < 16; i++) { 5756 for (i = 1; i < 16; i++) {
5760 if (i < 8) 5757 if (i < 8)
5761 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2), 5758 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
5762 rdev->gart.table_addr >> 12); 5759 rdev->vm_manager.saved_table_addr[i]);
5763 else 5760 else
5764 WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2), 5761 WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2),
5765 rdev->gart.table_addr >> 12); 5762 rdev->vm_manager.saved_table_addr[i]);
5766 } 5763 }
5767 5764
5768 /* enable context1-15 */ 5765 /* enable context1-15 */
@@ -5827,6 +5824,17 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
5827 */ 5824 */
5828static void cik_pcie_gart_disable(struct radeon_device *rdev) 5825static void cik_pcie_gart_disable(struct radeon_device *rdev)
5829{ 5826{
5827 unsigned i;
5828
5829 for (i = 1; i < 16; ++i) {
5830 uint32_t reg;
5831 if (i < 8)
5832 reg = VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2);
5833 else
5834 reg = VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2);
5835 rdev->vm_manager.saved_table_addr[i] = RREG32(reg);
5836 }
5837
5830 /* Disable all tables */ 5838 /* Disable all tables */
5831 WREG32(VM_CONTEXT0_CNTL, 0); 5839 WREG32(VM_CONTEXT0_CNTL, 0);
5832 WREG32(VM_CONTEXT1_CNTL, 0); 5840 WREG32(VM_CONTEXT1_CNTL, 0);
@@ -9555,6 +9563,9 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
9555 int ret, i; 9563 int ret, i;
9556 u16 tmp16; 9564 u16 tmp16;
9557 9565
9566 if (pci_is_root_bus(rdev->pdev->bus))
9567 return;
9568
9558 if (radeon_pcie_gen2 == 0) 9569 if (radeon_pcie_gen2 == 0)
9559 return; 9570 return;
9560 9571
@@ -9781,7 +9792,8 @@ static void cik_program_aspm(struct radeon_device *rdev)
9781 if (orig != data) 9792 if (orig != data)
9782 WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, data); 9793 WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, data);
9783 9794
9784 if (!disable_clkreq) { 9795 if (!disable_clkreq &&
9796 !pci_is_root_bus(rdev->pdev->bus)) {
9785 struct pci_dev *root = rdev->pdev->bus->self; 9797 struct pci_dev *root = rdev->pdev->bus->self;
9786 u32 lnkcap; 9798 u32 lnkcap;
9787 9799
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index ba89375f197f..3faee58946dd 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1271,7 +1271,7 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev)
1271 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0); 1271 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0);
1272 WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), rdev->vm_manager.max_pfn); 1272 WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), rdev->vm_manager.max_pfn);
1273 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2), 1273 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
1274 rdev->gart.table_addr >> 12); 1274 rdev->vm_manager.saved_table_addr[i]);
1275 } 1275 }
1276 1276
1277 /* enable context1-7 */ 1277 /* enable context1-7 */
@@ -1303,6 +1303,13 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev)
1303 1303
1304static void cayman_pcie_gart_disable(struct radeon_device *rdev) 1304static void cayman_pcie_gart_disable(struct radeon_device *rdev)
1305{ 1305{
1306 unsigned i;
1307
1308 for (i = 1; i < 8; ++i) {
1309 rdev->vm_manager.saved_table_addr[i] = RREG32(
1310 VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2));
1311 }
1312
1306 /* Disable all tables */ 1313 /* Disable all tables */
1307 WREG32(VM_CONTEXT0_CNTL, 0); 1314 WREG32(VM_CONTEXT0_CNTL, 0);
1308 WREG32(VM_CONTEXT1_CNTL, 0); 1315 WREG32(VM_CONTEXT1_CNTL, 0);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index e8bf0ea2dade..e616eb5f6e7a 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1812,7 +1812,6 @@ static void r600_gpu_init(struct radeon_device *rdev)
1812{ 1812{
1813 u32 tiling_config; 1813 u32 tiling_config;
1814 u32 ramcfg; 1814 u32 ramcfg;
1815 u32 cc_rb_backend_disable;
1816 u32 cc_gc_shader_pipe_config; 1815 u32 cc_gc_shader_pipe_config;
1817 u32 tmp; 1816 u32 tmp;
1818 int i, j; 1817 int i, j;
@@ -1939,29 +1938,20 @@ static void r600_gpu_init(struct radeon_device *rdev)
1939 } 1938 }
1940 tiling_config |= BANK_SWAPS(1); 1939 tiling_config |= BANK_SWAPS(1);
1941 1940
1942 cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) & 0x00ff0000;
1943 tmp = R6XX_MAX_BACKENDS -
1944 r600_count_pipe_bits((cc_rb_backend_disable >> 16) & R6XX_MAX_BACKENDS_MASK);
1945 if (tmp < rdev->config.r600.max_backends) {
1946 rdev->config.r600.max_backends = tmp;
1947 }
1948
1949 cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0x00ffff00; 1941 cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0x00ffff00;
1950 tmp = R6XX_MAX_PIPES -
1951 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 8) & R6XX_MAX_PIPES_MASK);
1952 if (tmp < rdev->config.r600.max_pipes) {
1953 rdev->config.r600.max_pipes = tmp;
1954 }
1955 tmp = R6XX_MAX_SIMDS -
1956 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R6XX_MAX_SIMDS_MASK);
1957 if (tmp < rdev->config.r600.max_simds) {
1958 rdev->config.r600.max_simds = tmp;
1959 }
1960 tmp = rdev->config.r600.max_simds - 1942 tmp = rdev->config.r600.max_simds -
1961 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R6XX_MAX_SIMDS_MASK); 1943 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R6XX_MAX_SIMDS_MASK);
1962 rdev->config.r600.active_simds = tmp; 1944 rdev->config.r600.active_simds = tmp;
1963 1945
1964 disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) >> 16) & R6XX_MAX_BACKENDS_MASK; 1946 disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) >> 16) & R6XX_MAX_BACKENDS_MASK;
1947 tmp = 0;
1948 for (i = 0; i < rdev->config.r600.max_backends; i++)
1949 tmp |= (1 << i);
1950 /* if all the backends are disabled, fix it up here */
1951 if ((disabled_rb_mask & tmp) == tmp) {
1952 for (i = 0; i < rdev->config.r600.max_backends; i++)
1953 disabled_rb_mask &= ~(1 << i);
1954 }
1965 tmp = (tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT; 1955 tmp = (tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT;
1966 tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.r600.max_backends, 1956 tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.r600.max_backends,
1967 R6XX_MAX_BACKENDS, disabled_rb_mask); 1957 R6XX_MAX_BACKENDS, disabled_rb_mask);
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index b281886f6f51..5f05b4c84338 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -915,6 +915,8 @@ struct radeon_vm_manager {
915 u64 vram_base_offset; 915 u64 vram_base_offset;
916 /* is vm enabled? */ 916 /* is vm enabled? */
917 bool enabled; 917 bool enabled;
918 /* for hw to save the PD addr on suspend/resume */
919 uint32_t saved_table_addr[RADEON_NUM_VM];
918}; 920};
919 921
920/* 922/*
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 2983f17ea1b3..d9f5ce715c9b 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1177,7 +1177,6 @@ static void rv770_gpu_init(struct radeon_device *rdev)
1177 u32 hdp_host_path_cntl; 1177 u32 hdp_host_path_cntl;
1178 u32 sq_dyn_gpr_size_simd_ab_0; 1178 u32 sq_dyn_gpr_size_simd_ab_0;
1179 u32 gb_tiling_config = 0; 1179 u32 gb_tiling_config = 0;
1180 u32 cc_rb_backend_disable = 0;
1181 u32 cc_gc_shader_pipe_config = 0; 1180 u32 cc_gc_shader_pipe_config = 0;
1182 u32 mc_arb_ramcfg; 1181 u32 mc_arb_ramcfg;
1183 u32 db_debug4, tmp; 1182 u32 db_debug4, tmp;
@@ -1311,21 +1310,7 @@ static void rv770_gpu_init(struct radeon_device *rdev)
1311 WREG32(SPI_CONFIG_CNTL, 0); 1310 WREG32(SPI_CONFIG_CNTL, 0);
1312 } 1311 }
1313 1312
1314 cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) & 0x00ff0000;
1315 tmp = R7XX_MAX_BACKENDS - r600_count_pipe_bits(cc_rb_backend_disable >> 16);
1316 if (tmp < rdev->config.rv770.max_backends) {
1317 rdev->config.rv770.max_backends = tmp;
1318 }
1319
1320 cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0xffffff00; 1313 cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & 0xffffff00;
1321 tmp = R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config >> 8) & R7XX_MAX_PIPES_MASK);
1322 if (tmp < rdev->config.rv770.max_pipes) {
1323 rdev->config.rv770.max_pipes = tmp;
1324 }
1325 tmp = R7XX_MAX_SIMDS - r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R7XX_MAX_SIMDS_MASK);
1326 if (tmp < rdev->config.rv770.max_simds) {
1327 rdev->config.rv770.max_simds = tmp;
1328 }
1329 tmp = rdev->config.rv770.max_simds - 1314 tmp = rdev->config.rv770.max_simds -
1330 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R7XX_MAX_SIMDS_MASK); 1315 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R7XX_MAX_SIMDS_MASK);
1331 rdev->config.rv770.active_simds = tmp; 1316 rdev->config.rv770.active_simds = tmp;
@@ -1348,6 +1333,14 @@ static void rv770_gpu_init(struct radeon_device *rdev)
1348 rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes; 1333 rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes;
1349 1334
1350 disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) >> 16) & R7XX_MAX_BACKENDS_MASK; 1335 disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) >> 16) & R7XX_MAX_BACKENDS_MASK;
1336 tmp = 0;
1337 for (i = 0; i < rdev->config.rv770.max_backends; i++)
1338 tmp |= (1 << i);
1339 /* if all the backends are disabled, fix it up here */
1340 if ((disabled_rb_mask & tmp) == tmp) {
1341 for (i = 0; i < rdev->config.rv770.max_backends; i++)
1342 disabled_rb_mask &= ~(1 << i);
1343 }
1351 tmp = (gb_tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT; 1344 tmp = (gb_tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT;
1352 tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.rv770.max_backends, 1345 tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.rv770.max_backends,
1353 R7XX_MAX_BACKENDS, disabled_rb_mask); 1346 R7XX_MAX_BACKENDS, disabled_rb_mask);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index a1274a31405c..6bce40847753 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -4290,10 +4290,10 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
4290 for (i = 1; i < 16; i++) { 4290 for (i = 1; i < 16; i++) {
4291 if (i < 8) 4291 if (i < 8)
4292 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2), 4292 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
4293 rdev->gart.table_addr >> 12); 4293 rdev->vm_manager.saved_table_addr[i]);
4294 else 4294 else
4295 WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2), 4295 WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2),
4296 rdev->gart.table_addr >> 12); 4296 rdev->vm_manager.saved_table_addr[i]);
4297 } 4297 }
4298 4298
4299 /* enable context1-15 */ 4299 /* enable context1-15 */
@@ -4325,6 +4325,17 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
4325 4325
4326static void si_pcie_gart_disable(struct radeon_device *rdev) 4326static void si_pcie_gart_disable(struct radeon_device *rdev)
4327{ 4327{
4328 unsigned i;
4329
4330 for (i = 1; i < 16; ++i) {
4331 uint32_t reg;
4332 if (i < 8)
4333 reg = VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2);
4334 else
4335 reg = VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2);
4336 rdev->vm_manager.saved_table_addr[i] = RREG32(reg);
4337 }
4338
4328 /* Disable all tables */ 4339 /* Disable all tables */
4329 WREG32(VM_CONTEXT0_CNTL, 0); 4340 WREG32(VM_CONTEXT0_CNTL, 0);
4330 WREG32(VM_CONTEXT1_CNTL, 0); 4341 WREG32(VM_CONTEXT1_CNTL, 0);
@@ -7177,6 +7188,9 @@ static void si_pcie_gen3_enable(struct radeon_device *rdev)
7177 int ret, i; 7188 int ret, i;
7178 u16 tmp16; 7189 u16 tmp16;
7179 7190
7191 if (pci_is_root_bus(rdev->pdev->bus))
7192 return;
7193
7180 if (radeon_pcie_gen2 == 0) 7194 if (radeon_pcie_gen2 == 0)
7181 return; 7195 return;
7182 7196
@@ -7454,7 +7468,8 @@ static void si_program_aspm(struct radeon_device *rdev)
7454 if (orig != data) 7468 if (orig != data)
7455 WREG32_PIF_PHY1(PB1_PIF_CNTL, data); 7469 WREG32_PIF_PHY1(PB1_PIF_CNTL, data);
7456 7470
7457 if (!disable_clkreq) { 7471 if (!disable_clkreq &&
7472 !pci_is_root_bus(rdev->pdev->bus)) {
7458 struct pci_dev *root = rdev->pdev->bus->self; 7473 struct pci_dev *root = rdev->pdev->bus->self;
7459 u32 lnkcap; 7474 u32 lnkcap;
7460 7475
diff --git a/drivers/gpu/drm/sti/Kconfig b/drivers/gpu/drm/sti/Kconfig
index 2d9d4252d598..ae8850f3e63b 100644
--- a/drivers/gpu/drm/sti/Kconfig
+++ b/drivers/gpu/drm/sti/Kconfig
@@ -1,6 +1,7 @@
1config DRM_STI 1config DRM_STI
2 tristate "DRM Support for STMicroelectronics SoC stiH41x Series" 2 tristate "DRM Support for STMicroelectronics SoC stiH41x Series"
3 depends on DRM && (SOC_STIH415 || SOC_STIH416 || ARCH_MULTIPLATFORM) 3 depends on DRM && (SOC_STIH415 || SOC_STIH416 || ARCH_MULTIPLATFORM)
4 select RESET_CONTROLLER
4 select DRM_KMS_HELPER 5 select DRM_KMS_HELPER
5 select DRM_GEM_CMA_HELPER 6 select DRM_GEM_CMA_HELPER
6 select DRM_KMS_CMA_HELPER 7 select DRM_KMS_CMA_HELPER
diff --git a/drivers/gpu/drm/sti/sti_drm_drv.c b/drivers/gpu/drm/sti/sti_drm_drv.c
index a7cc24917a96..223d93c3a05d 100644
--- a/drivers/gpu/drm/sti/sti_drm_drv.c
+++ b/drivers/gpu/drm/sti/sti_drm_drv.c
@@ -201,8 +201,8 @@ static int sti_drm_platform_probe(struct platform_device *pdev)
201 master = platform_device_register_resndata(dev, 201 master = platform_device_register_resndata(dev,
202 DRIVER_NAME "__master", -1, 202 DRIVER_NAME "__master", -1,
203 NULL, 0, NULL, 0); 203 NULL, 0, NULL, 0);
204 if (!master) 204 if (IS_ERR(master))
205 return -EINVAL; 205 return PTR_ERR(master);
206 206
207 platform_set_drvdata(pdev, master); 207 platform_set_drvdata(pdev, master);
208 return 0; 208 return 0;
diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c
index 72d957f81c05..2ae9a9b73666 100644
--- a/drivers/gpu/drm/sti/sti_hda.c
+++ b/drivers/gpu/drm/sti/sti_hda.c
@@ -730,16 +730,16 @@ static int sti_hda_probe(struct platform_device *pdev)
730 return -ENOMEM; 730 return -ENOMEM;
731 } 731 }
732 hda->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 732 hda->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
733 if (IS_ERR(hda->regs)) 733 if (!hda->regs)
734 return PTR_ERR(hda->regs); 734 return -ENOMEM;
735 735
736 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 736 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
737 "video-dacs-ctrl"); 737 "video-dacs-ctrl");
738 if (res) { 738 if (res) {
739 hda->video_dacs_ctrl = devm_ioremap_nocache(dev, res->start, 739 hda->video_dacs_ctrl = devm_ioremap_nocache(dev, res->start,
740 resource_size(res)); 740 resource_size(res));
741 if (IS_ERR(hda->video_dacs_ctrl)) 741 if (!hda->video_dacs_ctrl)
742 return PTR_ERR(hda->video_dacs_ctrl); 742 return -ENOMEM;
743 } else { 743 } else {
744 /* If no existing video-dacs-ctrl resource continue the probe */ 744 /* If no existing video-dacs-ctrl resource continue the probe */
745 DRM_DEBUG_DRIVER("No video-dacs-ctrl resource\n"); 745 DRM_DEBUG_DRIVER("No video-dacs-ctrl resource\n");
@@ -770,7 +770,7 @@ static int sti_hda_remove(struct platform_device *pdev)
770 return 0; 770 return 0;
771} 771}
772 772
773static struct of_device_id hda_of_match[] = { 773static const struct of_device_id hda_of_match[] = {
774 { .compatible = "st,stih416-hda", }, 774 { .compatible = "st,stih416-hda", },
775 { .compatible = "st,stih407-hda", }, 775 { .compatible = "st,stih407-hda", },
776 { /* end node */ } 776 { /* end node */ }
diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c
index 284e541d970d..ef93156a69c6 100644
--- a/drivers/gpu/drm/sti/sti_hdmi.c
+++ b/drivers/gpu/drm/sti/sti_hdmi.c
@@ -677,7 +677,7 @@ static const struct component_ops sti_hdmi_ops = {
677 .unbind = sti_hdmi_unbind, 677 .unbind = sti_hdmi_unbind,
678}; 678};
679 679
680static struct of_device_id hdmi_of_match[] = { 680static const struct of_device_id hdmi_of_match[] = {
681 { 681 {
682 .compatible = "st,stih416-hdmi", 682 .compatible = "st,stih416-hdmi",
683 .data = &tx3g0c55phy_ops, 683 .data = &tx3g0c55phy_ops,
@@ -713,8 +713,8 @@ static int sti_hdmi_probe(struct platform_device *pdev)
713 return -ENOMEM; 713 return -ENOMEM;
714 } 714 }
715 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 715 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
716 if (IS_ERR(hdmi->regs)) 716 if (!hdmi->regs)
717 return PTR_ERR(hdmi->regs); 717 return -ENOMEM;
718 718
719 if (of_device_is_compatible(np, "st,stih416-hdmi")) { 719 if (of_device_is_compatible(np, "st,stih416-hdmi")) {
720 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 720 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
@@ -725,8 +725,8 @@ static int sti_hdmi_probe(struct platform_device *pdev)
725 } 725 }
726 hdmi->syscfg = devm_ioremap_nocache(dev, res->start, 726 hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
727 resource_size(res)); 727 resource_size(res));
728 if (IS_ERR(hdmi->syscfg)) 728 if (!hdmi->syscfg)
729 return PTR_ERR(hdmi->syscfg); 729 return -ENOMEM;
730 730
731 } 731 }
732 732
diff --git a/drivers/gpu/drm/sti/sti_tvout.c b/drivers/gpu/drm/sti/sti_tvout.c
index b69e26fee76e..b8afe490356a 100644
--- a/drivers/gpu/drm/sti/sti_tvout.c
+++ b/drivers/gpu/drm/sti/sti_tvout.c
@@ -591,8 +591,8 @@ static int sti_tvout_probe(struct platform_device *pdev)
591 return -ENOMEM; 591 return -ENOMEM;
592 } 592 }
593 tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 593 tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
594 if (IS_ERR(tvout->regs)) 594 if (!tvout->regs)
595 return PTR_ERR(tvout->regs); 595 return -ENOMEM;
596 596
597 /* get reset resources */ 597 /* get reset resources */
598 tvout->reset = devm_reset_control_get(dev, "tvout"); 598 tvout->reset = devm_reset_control_get(dev, "tvout");
@@ -624,7 +624,7 @@ static int sti_tvout_remove(struct platform_device *pdev)
624 return 0; 624 return 0;
625} 625}
626 626
627static struct of_device_id tvout_of_match[] = { 627static const struct of_device_id tvout_of_match[] = {
628 { .compatible = "st,stih416-tvout", }, 628 { .compatible = "st,stih416-tvout", },
629 { .compatible = "st,stih407-tvout", }, 629 { .compatible = "st,stih407-tvout", },
630 { /* end node */ } 630 { /* end node */ }
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 07c28323f88f..1b233fc67466 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -892,6 +892,10 @@ config DEBUG_WW_MUTEX_SLOWPATH
892 the full mutex checks enabled with (CONFIG_PROVE_LOCKING) this 892 the full mutex checks enabled with (CONFIG_PROVE_LOCKING) this
893 will test all possible w/w mutex interface abuse with the 893 will test all possible w/w mutex interface abuse with the
894 exception of simply not acquiring all the required locks. 894 exception of simply not acquiring all the required locks.
895 Note that this feature can introduce significant overhead, so
896 it really should not be enabled in a production or distro kernel,
897 even a debug kernel. If you are a driver writer, enable it. If
898 you are a distro, do not.
895 899
896config DEBUG_LOCK_ALLOC 900config DEBUG_LOCK_ALLOC
897 bool "Lock debugging: detect incorrect freeing of live locks" 901 bool "Lock debugging: detect incorrect freeing of live locks"