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-rw-r--r--arch/arm/boot/dts/ste-dbx5x0.dtsi12
-rw-r--r--arch/arm/boot/dts/ste-u300.dts2
-rw-r--r--arch/arm/mach-ux500/Kconfig5
-rw-r--r--arch/arm/mach-ux500/board-mop500-audio.c1
-rw-r--r--arch/arm/mach-ux500/board-mop500.h69
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c7
-rw-r--r--arch/arm/mach-ux500/cpu.c10
-rw-r--r--arch/arm/mach-ux500/irqs-board-mop500.h55
-rw-r--r--arch/arm/mach-ux500/irqs-db8500.h125
-rw-r--r--arch/arm/mach-ux500/irqs.h49
-rw-r--r--drivers/mfd/ab8500-core.c27
-rw-r--r--drivers/mfd/db8500-prcmu.c34
-rw-r--r--include/linux/mfd/abx500/ab8500.h2
-rw-r--r--include/linux/mfd/dbx500-prcmu.h2
14 files changed, 43 insertions, 357 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index e0853ea02df2..e41eedca3ce3 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -705,7 +705,7 @@
705 #address-cells = <1>; 705 #address-cells = <1>;
706 #size-cells = <0>; 706 #size-cells = <0>;
707 clocks = <&prcc_kclk 3 1>, <&prcc_pclk 3 1>; 707 clocks = <&prcc_kclk 3 1>, <&prcc_pclk 3 1>;
708 clock-names = "ssp0clk", "apb_pclk"; 708 clock-names = "SSPCLK", "apb_pclk";
709 dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */ 709 dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */
710 <&dma 8 0 0x0>; /* Logical - MemToDev */ 710 <&dma 8 0 0x0>; /* Logical - MemToDev */
711 dma-names = "rx", "tx"; 711 dma-names = "rx", "tx";
@@ -718,7 +718,7 @@
718 #address-cells = <1>; 718 #address-cells = <1>;
719 #size-cells = <0>; 719 #size-cells = <0>;
720 clocks = <&prcc_kclk 3 2>, <&prcc_pclk 3 2>; 720 clocks = <&prcc_kclk 3 2>, <&prcc_pclk 3 2>;
721 clock-names = "ssp1clk", "apb_pclk"; 721 clock-names = "SSPCLK", "apb_pclk";
722 dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */ 722 dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */
723 <&dma 9 0 0x0>; /* Logical - MemToDev */ 723 <&dma 9 0 0x0>; /* Logical - MemToDev */
724 dma-names = "rx", "tx"; 724 dma-names = "rx", "tx";
@@ -732,7 +732,7 @@
732 #size-cells = <0>; 732 #size-cells = <0>;
733 /* Same clock wired to kernel and pclk */ 733 /* Same clock wired to kernel and pclk */
734 clocks = <&prcc_pclk 2 8>, <&prcc_pclk 2 8>; 734 clocks = <&prcc_pclk 2 8>, <&prcc_pclk 2 8>;
735 clock-names = "spi0clk", "apb_pclk"; 735 clock-names = "SSPCLK", "apb_pclk";
736 dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */ 736 dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */
737 <&dma 0 0 0x0>; /* Logical - MemToDev */ 737 <&dma 0 0 0x0>; /* Logical - MemToDev */
738 dma-names = "rx", "tx"; 738 dma-names = "rx", "tx";
@@ -746,7 +746,7 @@
746 #size-cells = <0>; 746 #size-cells = <0>;
747 /* Same clock wired to kernel and pclk */ 747 /* Same clock wired to kernel and pclk */
748 clocks = <&prcc_pclk 2 2>, <&prcc_pclk 2 2>; 748 clocks = <&prcc_pclk 2 2>, <&prcc_pclk 2 2>;
749 clock-names = "spi1clk", "apb_pclk"; 749 clock-names = "SSPCLK", "apb_pclk";
750 dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */ 750 dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */
751 <&dma 35 0 0x0>; /* Logical - MemToDev */ 751 <&dma 35 0 0x0>; /* Logical - MemToDev */
752 dma-names = "rx", "tx"; 752 dma-names = "rx", "tx";
@@ -760,7 +760,7 @@
760 #size-cells = <0>; 760 #size-cells = <0>;
761 /* Same clock wired to kernel and pclk */ 761 /* Same clock wired to kernel and pclk */
762 clocks = <&prcc_pclk 2 1>, <&prcc_pclk 2 1>; 762 clocks = <&prcc_pclk 2 1>, <&prcc_pclk 2 1>;
763 clock-names = "spi2clk", "apb_pclk"; 763 clock-names = "SSPCLK", "apb_pclk";
764 dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */ 764 dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */
765 <&dma 33 0 0x0>; /* Logical - MemToDev */ 765 <&dma 33 0 0x0>; /* Logical - MemToDev */
766 dma-names = "rx", "tx"; 766 dma-names = "rx", "tx";
@@ -774,7 +774,7 @@
774 #size-cells = <0>; 774 #size-cells = <0>;
775 /* Same clock wired to kernel and pclk */ 775 /* Same clock wired to kernel and pclk */
776 clocks = <&prcc_pclk 1 7>, <&prcc_pclk 1 7>; 776 clocks = <&prcc_pclk 1 7>, <&prcc_pclk 1 7>;
777 clock-names = "spi3clk", "apb_pclk"; 777 clock-names = "SSPCLK", "apb_pclk";
778 dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */ 778 dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */
779 <&dma 40 0 0x0>; /* Logical - MemToDev */ 779 <&dma 40 0 0x0>; /* Logical - MemToDev */
780 dma-names = "rx", "tx"; 780 dma-names = "rx", "tx";
diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
index a9da4800daf0..6fe688e9e4da 100644
--- a/arch/arm/boot/dts/ste-u300.dts
+++ b/arch/arm/boot/dts/ste-u300.dts
@@ -457,7 +457,7 @@
457 interrupt-parent = <&vica>; 457 interrupt-parent = <&vica>;
458 interrupts = <23>; 458 interrupts = <23>;
459 clocks = <&spi_clk>, <&spi_clk>; 459 clocks = <&spi_clk>, <&spi_clk>;
460 clock-names = "apb_pclk", "spi_clk"; 460 clock-names = "SSPCLK", "apb_pclk";
461 dmas = <&dmac 27 &dmac 28>; 461 dmas = <&dmac 27 &dmac 28>;
462 dma-names = "tx", "rx"; 462 dma-names = "tx", "rx";
463 num-cs = <3>; 463 num-cs = <3>;
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 0034d2cd6973..b2019dc50e40 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -73,11 +73,6 @@ config UX500_AUTO_PLATFORM
73 a working kernel. If everything else is disabled, this 73 a working kernel. If everything else is disabled, this
74 automatically enables MACH_MOP500. 74 automatically enables MACH_MOP500.
75 75
76config MACH_UX500_DT
77 bool "Generic U8500 support using device tree"
78 depends on MACH_MOP500
79 select USE_OF
80
81endmenu 76endmenu
82 77
83config UX500_DEBUG_UART 78config UX500_DEBUG_UART
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 9309ad4cbd09..b2a0899e7453 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -9,7 +9,6 @@
9#include <linux/gpio.h> 9#include <linux/gpio.h>
10#include <linux/platform_data/dma-ste-dma40.h> 10#include <linux/platform_data/dma-ste-dma40.h>
11 11
12#include "irqs.h"
13#include <linux/platform_data/asoc-ux500-msp.h> 12#include <linux/platform_data/asoc-ux500-msp.h>
14 13
15#include "ste-dma40-db8500.h" 14#include "ste-dma40-db8500.h"
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index bb408b8f48de..32cc0d8d8a0e 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -7,78 +7,9 @@
7#ifndef __BOARD_MOP500_H 7#ifndef __BOARD_MOP500_H
8#define __BOARD_MOP500_H 8#define __BOARD_MOP500_H
9 9
10/* For NOMADIK_NR_GPIO */
11#include "irqs.h"
12#include <linux/platform_data/asoc-ux500-msp.h> 10#include <linux/platform_data/asoc-ux500-msp.h>
13#include <linux/amba/mmci.h> 11#include <linux/amba/mmci.h>
14 12
15/* Snowball specific GPIO assignments, this board has no GPIO expander */
16#define SNOWBALL_ACCEL_INT1_GPIO 163
17#define SNOWBALL_ACCEL_INT2_GPIO 164
18#define SNOWBALL_MAGNET_DRDY_GPIO 165
19#define SNOWBALL_SDMMC_EN_GPIO 217
20#define SNOWBALL_SDMMC_1V8_3V_GPIO 228
21#define SNOWBALL_SDMMC_CD_GPIO 218
22
23/* HREFv60-specific GPIO assignments, this board has no GPIO expander */
24#define HREFV60_SDMMC_1V8_3V_GPIO 5
25#define HREFV60_CAMERA_FLASH_ENABLE 21
26#define HREFV60_MAGNET_DRDY_GPIO 32
27#define HREFV60_DISP1_RST_GPIO 65
28#define HREFV60_DISP2_RST_GPIO 66
29#define HREFV60_ACCEL_INT1_GPIO 82
30#define HREFV60_ACCEL_INT2_GPIO 83
31#define HREFV60_SDMMC_CD_GPIO 95
32#define HREFV60_XSHUTDOWN_SECONDARY_SENSOR 140
33#define HREFV60_TOUCH_RST_GPIO 143
34#define HREFV60_HAL_SW_GPIO 145
35#define HREFV60_SDMMC_EN_GPIO 169
36#define HREFV60_MMIO_XENON_CHARGE 170
37#define HREFV60_PROX_SENSE_GPIO 217
38
39/* MOP500 generic GPIOs */
40#define CAMERA_FLASH_INT_PIN 7
41#define CYPRESS_TOUCH_INT_PIN 84
42#define XSHUTDOWN_PRIMARY_SENSOR 141
43#define XSHUTDOWN_SECONDARY_SENSOR 142
44#define CYPRESS_TOUCH_RST_GPIO 143
45#define MOP500_HDMI_RST_GPIO 196
46#define CYPRESS_SLAVE_SELECT_GPIO 216
47
48/* GPIOs on the TC35892 expander */
49#define MOP500_EGPIO(x) (NOMADIK_NR_GPIO + (x))
50#define GPIO_MAGNET_DRDY MOP500_EGPIO(1)
51#define GPIO_SDMMC_CD MOP500_EGPIO(3)
52#define GPIO_CAMERA_FLASH_ENABLE MOP500_EGPIO(4)
53#define GPIO_MMIO_XENON_CHARGE MOP500_EGPIO(5)
54#define GPIO_PROX_SENSOR MOP500_EGPIO(7)
55#define GPIO_HAL_SENSOR MOP500_EGPIO(8)
56#define GPIO_ACCEL_INT1 MOP500_EGPIO(10)
57#define GPIO_ACCEL_INT2 MOP500_EGPIO(11)
58#define GPIO_BU21013_CS MOP500_EGPIO(13)
59#define MOP500_DISP2_RST_GPIO MOP500_EGPIO(14)
60#define MOP500_DISP1_RST_GPIO MOP500_EGPIO(15)
61#define GPIO_SDMMC_EN MOP500_EGPIO(17)
62#define GPIO_SDMMC_1V8_3V_SEL MOP500_EGPIO(18)
63#define MOP500_EGPIO_END MOP500_EGPIO(24)
64
65/*
66 * GPIOs on the AB8500 mixed-signals circuit
67 * Notice that we subtract 1 from the number passed into the macro, this is
68 * because the AB8500 GPIO pins are enumbered starting from 1, so the value in
69 * parens matches the GPIO pin number in the data sheet.
70 */
71#define MOP500_AB8500_PIN_GPIO(x) (MOP500_EGPIO_END + (x) - 1)
72/*Snowball AB8500 GPIO */
73#define SNOWBALL_VSMPS2_1V8_GPIO MOP500_AB8500_PIN_GPIO(1) /* SYSCLKREQ2/GPIO1 */
74#define SNOWBALL_PM_GPIO1_GPIO MOP500_AB8500_PIN_GPIO(2) /* SYSCLKREQ3/GPIO2 */
75#define SNOWBALL_WLAN_CLK_REQ_GPIO MOP500_AB8500_PIN_GPIO(3) /* SYSCLKREQ4/GPIO3 */
76#define SNOWBALL_PM_GPIO4_GPIO MOP500_AB8500_PIN_GPIO(4) /* SYSCLKREQ6/GPIO4 */
77#define SNOWBALL_EN_3V6_GPIO MOP500_AB8500_PIN_GPIO(16) /* PWMOUT3/GPIO16 */
78#define SNOWBALL_PME_ETH_GPIO MOP500_AB8500_PIN_GPIO(24) /* SYSCLKREQ7/GPIO24 */
79#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */
80
81struct device;
82extern struct mmci_platform_data mop500_sdi0_data; 13extern struct mmci_platform_data mop500_sdi0_data;
83extern struct mmci_platform_data mop500_sdi1_data; 14extern struct mmci_platform_data mop500_sdi1_data;
84extern struct mmci_platform_data mop500_sdi2_data; 15extern struct mmci_platform_data mop500_sdi2_data;
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 180b3c59be36..8820f602fcd2 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -27,7 +27,6 @@
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28 28
29#include "setup.h" 29#include "setup.h"
30#include "irqs.h"
31 30
32#include "board-mop500-regulators.h" 31#include "board-mop500-regulators.h"
33#include "board-mop500.h" 32#include "board-mop500.h"
@@ -35,14 +34,11 @@
35#include "id.h" 34#include "id.h"
36 35
37struct ab8500_platform_data ab8500_platdata = { 36struct ab8500_platform_data ab8500_platdata = {
38 .irq_base = MOP500_AB8500_IRQ_BASE,
39 .regulator = &ab8500_regulator_plat_data, 37 .regulator = &ab8500_regulator_plat_data,
40}; 38};
41 39
42struct prcmu_pdata db8500_prcmu_pdata = { 40struct prcmu_pdata db8500_prcmu_pdata = {
43 .ab_platdata = &ab8500_platdata, 41 .ab_platdata = &ab8500_platdata,
44 .ab_irq = IRQ_DB8500_AB8500,
45 .irq_base = IRQ_PRCMU_BASE,
46 .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET, 42 .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
47 .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET, 43 .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
48}; 44};
@@ -146,7 +142,6 @@ static struct device * __init db8500_soc_device_init(void)
146 return ux500_soc_device_init(soc_id); 142 return ux500_soc_device_init(soc_id);
147} 143}
148 144
149#ifdef CONFIG_MACH_UX500_DT
150static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 145static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
151 /* Requires call-back bindings. */ 146 /* Requires call-back bindings. */
152 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 147 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
@@ -219,5 +214,3 @@ DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
219 .dt_compat = stericsson_dt_platform_compat, 214 .dt_compat = stericsson_dt_platform_compat,
220 .restart = ux500_restart, 215 .restart = ux500_restart,
221MACHINE_END 216MACHINE_END
222
223#endif
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index d11ac4bf336c..db16b5a04ad5 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -52,17 +52,7 @@ void ux500_restart(enum reboot_mode mode, const char *cmd)
52*/ 52*/
53void __init ux500_init_irq(void) 53void __init ux500_init_irq(void)
54{ 54{
55 void __iomem *dist_base;
56 void __iomem *cpu_base;
57
58 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND; 55 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
59
60 if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
61 dist_base = __io_address(U8500_GIC_DIST_BASE);
62 cpu_base = __io_address(U8500_GIC_CPU_BASE);
63 } else
64 ux500_unknown_soc();
65
66 irqchip_init(); 56 irqchip_init();
67 57
68 /* 58 /*
diff --git a/arch/arm/mach-ux500/irqs-board-mop500.h b/arch/arm/mach-ux500/irqs-board-mop500.h
deleted file mode 100644
index d526dd8e87d3..000000000000
--- a/arch/arm/mach-ux500/irqs-board-mop500.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#ifndef __MACH_IRQS_BOARD_MOP500_H
9#define __MACH_IRQS_BOARD_MOP500_H
10
11/* Number of AB8500 irqs is taken from header file */
12#include <linux/mfd/abx500/ab8500.h>
13
14#define MOP500_AB8500_IRQ_BASE IRQ_BOARD_START
15#define MOP500_AB8500_IRQ_END (MOP500_AB8500_IRQ_BASE \
16 + AB8500_MAX_NR_IRQS)
17
18/* TC35892 */
19#define TC35892_NR_INTERNAL_IRQS 8
20#define TC35892_INT_GPIO(x) (TC35892_NR_INTERNAL_IRQS + (x))
21#define TC35892_NR_GPIOS 24
22#define TC35892_NR_IRQS TC35892_INT_GPIO(TC35892_NR_GPIOS)
23
24#define MOP500_EGPIO_NR_IRQS TC35892_NR_IRQS
25
26#define MOP500_EGPIO_IRQ_BASE MOP500_AB8500_IRQ_END
27#define MOP500_EGPIO_IRQ_END (MOP500_EGPIO_IRQ_BASE \
28 + MOP500_EGPIO_NR_IRQS)
29/* STMPE1601 irqs */
30#define STMPE_NR_INTERNAL_IRQS 9
31#define STMPE_INT_GPIO(x) (STMPE_NR_INTERNAL_IRQS + (x))
32#define STMPE_NR_GPIOS 24
33#define STMPE_NR_IRQS STMPE_INT_GPIO(STMPE_NR_GPIOS)
34
35#define MOP500_STMPE1601_IRQBASE MOP500_EGPIO_IRQ_END
36#define MOP500_STMPE1601_IRQ(x) (MOP500_STMPE1601_IRQBASE + (x))
37
38#define MOP500_STMPE1601_IRQ_END \
39 MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
40
41#define MOP500_NR_IRQS MOP500_STMPE1601_IRQ_END
42
43#define MOP500_IRQ_END MOP500_NR_IRQS
44
45/*
46 * We may have several boards, but only one will run at a
47 * time, so the one with most IRQs will bump this ahead,
48 * but the IRQ_BOARD_START remains the same for either board.
49 */
50#if MOP500_IRQ_END > IRQ_BOARD_END
51#undef IRQ_BOARD_END
52#define IRQ_BOARD_END MOP500_IRQ_END
53#endif
54
55#endif
diff --git a/arch/arm/mach-ux500/irqs-db8500.h b/arch/arm/mach-ux500/irqs-db8500.h
deleted file mode 100644
index f3a9d5947ef3..000000000000
--- a/arch/arm/mach-ux500/irqs-db8500.h
+++ /dev/null
@@ -1,125 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#ifndef __MACH_IRQS_DB8500_H
9#define __MACH_IRQS_DB8500_H
10
11#define IRQ_DB8500_MTU0 (IRQ_SHPI_START + 4)
12#define IRQ_DB8500_SPI2 (IRQ_SHPI_START + 6)
13#define IRQ_DB8500_PMU (IRQ_SHPI_START + 7)
14#define IRQ_DB8500_SPI0 (IRQ_SHPI_START + 8)
15#define IRQ_DB8500_RTT (IRQ_SHPI_START + 9)
16#define IRQ_DB8500_PKA (IRQ_SHPI_START + 10)
17#define IRQ_DB8500_UART0 (IRQ_SHPI_START + 11)
18#define IRQ_DB8500_I2C3 (IRQ_SHPI_START + 12)
19#define IRQ_DB8500_L2CC (IRQ_SHPI_START + 13)
20#define IRQ_DB8500_SSP0 (IRQ_SHPI_START + 14)
21#define IRQ_DB8500_CRYP1 (IRQ_SHPI_START + 15)
22#define IRQ_DB8500_MSP1_RX (IRQ_SHPI_START + 16)
23#define IRQ_DB8500_MTU1 (IRQ_SHPI_START + 17)
24#define IRQ_DB8500_RTC (IRQ_SHPI_START + 18)
25#define IRQ_DB8500_UART1 (IRQ_SHPI_START + 19)
26#define IRQ_DB8500_USB_WAKEUP (IRQ_SHPI_START + 20)
27#define IRQ_DB8500_I2C0 (IRQ_SHPI_START + 21)
28#define IRQ_DB8500_I2C1 (IRQ_SHPI_START + 22)
29#define IRQ_DB8500_USBOTG (IRQ_SHPI_START + 23)
30#define IRQ_DB8500_DMA_SECURE (IRQ_SHPI_START + 24)
31#define IRQ_DB8500_DMA (IRQ_SHPI_START + 25)
32#define IRQ_DB8500_UART2 (IRQ_SHPI_START + 26)
33#define IRQ_DB8500_ICN_PMU1 (IRQ_SHPI_START + 27)
34#define IRQ_DB8500_ICN_PMU2 (IRQ_SHPI_START + 28)
35#define IRQ_DB8500_HSIR_EXCEP (IRQ_SHPI_START + 29)
36#define IRQ_DB8500_MSP0 (IRQ_SHPI_START + 31)
37#define IRQ_DB8500_HSIR_CH0_OVRRUN (IRQ_SHPI_START + 32)
38#define IRQ_DB8500_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33)
39#define IRQ_DB8500_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34)
40#define IRQ_DB8500_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35)
41#define IRQ_DB8500_HSIR_CH4_OVRRUN (IRQ_SHPI_START + 36)
42#define IRQ_DB8500_HSIR_CH5_OVRRUN (IRQ_SHPI_START + 37)
43#define IRQ_DB8500_HSIR_CH6_OVRRUN (IRQ_SHPI_START + 38)
44#define IRQ_DB8500_HSIR_CH7_OVRRUN (IRQ_SHPI_START + 39)
45#define IRQ_DB8500_AB8500 (IRQ_SHPI_START + 40)
46#define IRQ_DB8500_SDMMC2 (IRQ_SHPI_START + 41)
47#define IRQ_DB8500_SIA (IRQ_SHPI_START + 42)
48#define IRQ_DB8500_SIA2 (IRQ_SHPI_START + 43)
49#define IRQ_DB8500_SVA (IRQ_SHPI_START + 44)
50#define IRQ_DB8500_SVA2 (IRQ_SHPI_START + 45)
51#define IRQ_DB8500_PRCMU0 (IRQ_SHPI_START + 46)
52#define IRQ_DB8500_PRCMU1 (IRQ_SHPI_START + 47)
53#define IRQ_DB8500_DISP (IRQ_SHPI_START + 48)
54#define IRQ_DB8500_SPI3 (IRQ_SHPI_START + 49)
55#define IRQ_DB8500_SDMMC1 (IRQ_SHPI_START + 50)
56#define IRQ_DB8500_I2C4 (IRQ_SHPI_START + 51)
57#define IRQ_DB8500_SSP1 (IRQ_SHPI_START + 52)
58#define IRQ_DB8500_SKE (IRQ_SHPI_START + 53)
59#define IRQ_DB8500_KB (IRQ_SHPI_START + 54)
60#define IRQ_DB8500_I2C2 (IRQ_SHPI_START + 55)
61#define IRQ_DB8500_B2R2 (IRQ_SHPI_START + 56)
62#define IRQ_DB8500_CRYP0 (IRQ_SHPI_START + 57)
63#define IRQ_DB8500_SDMMC3 (IRQ_SHPI_START + 59)
64#define IRQ_DB8500_SDMMC0 (IRQ_SHPI_START + 60)
65#define IRQ_DB8500_HSEM (IRQ_SHPI_START + 61)
66#define IRQ_DB8500_MSP1 (IRQ_SHPI_START + 62)
67#define IRQ_DB8500_SBAG (IRQ_SHPI_START + 63)
68#define IRQ_DB8500_SPI1 (IRQ_SHPI_START + 96)
69#define IRQ_DB8500_SRPTIMER (IRQ_SHPI_START + 97)
70#define IRQ_DB8500_MSP2 (IRQ_SHPI_START + 98)
71#define IRQ_DB8500_SDMMC4 (IRQ_SHPI_START + 99)
72#define IRQ_DB8500_SDMMC5 (IRQ_SHPI_START + 100)
73#define IRQ_DB8500_HSIRD0 (IRQ_SHPI_START + 104)
74#define IRQ_DB8500_HSIRD1 (IRQ_SHPI_START + 105)
75#define IRQ_DB8500_HSITD0 (IRQ_SHPI_START + 106)
76#define IRQ_DB8500_HSITD1 (IRQ_SHPI_START + 107)
77#define IRQ_DB8500_CTI0 (IRQ_SHPI_START + 108)
78#define IRQ_DB8500_CTI1 (IRQ_SHPI_START + 109)
79#define IRQ_DB8500_ICN_ERR (IRQ_SHPI_START + 110)
80#define IRQ_DB8500_MALI_PPMMU (IRQ_SHPI_START + 112)
81#define IRQ_DB8500_MALI_PP (IRQ_SHPI_START + 113)
82#define IRQ_DB8500_MALI_GPMMU (IRQ_SHPI_START + 114)
83#define IRQ_DB8500_MALI_GP (IRQ_SHPI_START + 115)
84#define IRQ_DB8500_MALI (IRQ_SHPI_START + 116)
85#define IRQ_DB8500_PRCMU_SEM (IRQ_SHPI_START + 118)
86#define IRQ_DB8500_GPIO0 (IRQ_SHPI_START + 119)
87#define IRQ_DB8500_GPIO1 (IRQ_SHPI_START + 120)
88#define IRQ_DB8500_GPIO2 (IRQ_SHPI_START + 121)
89#define IRQ_DB8500_GPIO3 (IRQ_SHPI_START + 122)
90#define IRQ_DB8500_GPIO4 (IRQ_SHPI_START + 123)
91#define IRQ_DB8500_GPIO5 (IRQ_SHPI_START + 124)
92#define IRQ_DB8500_GPIO6 (IRQ_SHPI_START + 125)
93#define IRQ_DB8500_GPIO7 (IRQ_SHPI_START + 126)
94#define IRQ_DB8500_GPIO8 (IRQ_SHPI_START + 127)
95
96#define IRQ_CA_WAKE_REQ_ED (IRQ_SHPI_START + 71)
97#define IRQ_AC_READ_NOTIFICATION_0_ED (IRQ_SHPI_START + 66)
98#define IRQ_AC_READ_NOTIFICATION_1_ED (IRQ_SHPI_START + 64)
99#define IRQ_CA_MSG_PEND_NOTIFICATION_0_ED (IRQ_SHPI_START + 67)
100#define IRQ_CA_MSG_PEND_NOTIFICATION_1_ED (IRQ_SHPI_START + 65)
101
102#define IRQ_CA_WAKE_REQ_V1 (IRQ_SHPI_START + 83)
103#define IRQ_AC_READ_NOTIFICATION_0_V1 (IRQ_SHPI_START + 78)
104#define IRQ_AC_READ_NOTIFICATION_1_V1 (IRQ_SHPI_START + 76)
105#define IRQ_CA_MSG_PEND_NOTIFICATION_0_V1 (IRQ_SHPI_START + 79)
106#define IRQ_CA_MSG_PEND_NOTIFICATION_1_V1 (IRQ_SHPI_START + 77)
107
108#ifdef CONFIG_UX500_SOC_DB8500
109
110/* Virtual interrupts corresponding to the PRCMU wakeups. */
111#define IRQ_PRCMU_BASE IRQ_SOC_START
112#define IRQ_PRCMU_END (IRQ_PRCMU_BASE + 23)
113
114/*
115 * We may have several SoCs, but only one will run at a
116 * time, so the one with most IRQs will bump this ahead,
117 * but the IRQ_SOC_START remains the same for either SoC.
118 */
119#if IRQ_SOC_END < IRQ_PRCMU_END
120#undef IRQ_SOC_END
121#define IRQ_SOC_END IRQ_PRCMU_END
122#endif
123
124#endif /* CONFIG_UX500_SOC_DB8500 */
125#endif
diff --git a/arch/arm/mach-ux500/irqs.h b/arch/arm/mach-ux500/irqs.h
deleted file mode 100644
index 15b2af698ed7..000000000000
--- a/arch/arm/mach-ux500/irqs.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Copyright (C) 2008 STMicroelectronics
3 * Copyright (C) 2009 ST-Ericsson.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10#ifndef ASM_ARCH_IRQS_H
11#define ASM_ARCH_IRQS_H
12
13#define IRQ_LOCALTIMER 29
14#define IRQ_LOCALWDOG 30
15
16/* Shared Peripheral Interrupt (SHPI) */
17#define IRQ_SHPI_START 32
18
19/*
20 * MTU0 preserved for now until plat-nomadik is taught not to use it. Don't
21 * add any other IRQs here, use the irqs-dbx500.h files.
22 */
23#define IRQ_MTU0 (IRQ_SHPI_START + 4)
24
25#define DBX500_NR_INTERNAL_IRQS 166
26
27/* After chip-specific IRQ numbers we have the GPIO ones */
28#define NOMADIK_NR_GPIO 288
29#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + DBX500_NR_INTERNAL_IRQS)
30#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - DBX500_NR_INTERNAL_IRQS)
31#define IRQ_GPIO_END NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
32
33#define IRQ_SOC_START IRQ_GPIO_END
34/* This will be overridden by SoC-specific irq headers */
35#define IRQ_SOC_END IRQ_SOC_START
36
37#include "irqs-db8500.h"
38
39#define IRQ_BOARD_START IRQ_SOC_END
40/* This will be overridden by board-specific irq headers */
41#define IRQ_BOARD_END IRQ_BOARD_START
42
43#ifdef CONFIG_MACH_MOP500
44#include "irqs-board-mop500.h"
45#endif
46
47#define UX500_NR_IRQS IRQ_BOARD_END
48
49#endif /* ASM_ARCH_IRQS_H */
diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c
index aaff683cd37d..a8ee4a36a1d8 100644
--- a/drivers/mfd/ab8500-core.c
+++ b/drivers/mfd/ab8500-core.c
@@ -592,7 +592,7 @@ static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
592 592
593 /* If ->irq_base is zero this will give a linear mapping */ 593 /* If ->irq_base is zero this will give a linear mapping */
594 ab8500->domain = irq_domain_add_simple(NULL, 594 ab8500->domain = irq_domain_add_simple(NULL,
595 num_irqs, ab8500->irq_base, 595 num_irqs, 0,
596 &ab8500_irq_ops, ab8500); 596 &ab8500_irq_ops, ab8500);
597 597
598 if (!ab8500->domain) { 598 if (!ab8500->domain) {
@@ -1583,14 +1583,13 @@ static int ab8500_probe(struct platform_device *pdev)
1583 if (!ab8500) 1583 if (!ab8500)
1584 return -ENOMEM; 1584 return -ENOMEM;
1585 1585
1586 if (plat)
1587 ab8500->irq_base = plat->irq_base;
1588
1589 ab8500->dev = &pdev->dev; 1586 ab8500->dev = &pdev->dev;
1590 1587
1591 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1588 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1592 if (!resource) 1589 if (!resource) {
1590 dev_err(&pdev->dev, "no IRQ resource\n");
1593 return -ENODEV; 1591 return -ENODEV;
1592 }
1594 1593
1595 ab8500->irq = resource->start; 1594 ab8500->irq = resource->start;
1596 1595
@@ -1612,8 +1611,10 @@ static int ab8500_probe(struct platform_device *pdev)
1612 else { 1611 else {
1613 ret = get_register_interruptible(ab8500, AB8500_MISC, 1612 ret = get_register_interruptible(ab8500, AB8500_MISC,
1614 AB8500_IC_NAME_REG, &value); 1613 AB8500_IC_NAME_REG, &value);
1615 if (ret < 0) 1614 if (ret < 0) {
1615 dev_err(&pdev->dev, "could not probe HW\n");
1616 return ret; 1616 return ret;
1617 }
1617 1618
1618 ab8500->version = value; 1619 ab8500->version = value;
1619 } 1620 }
@@ -1759,30 +1760,30 @@ static int ab8500_probe(struct platform_device *pdev)
1759 if (is_ab9540(ab8500)) 1760 if (is_ab9540(ab8500))
1760 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1761 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1761 ARRAY_SIZE(ab9540_devs), NULL, 1762 ARRAY_SIZE(ab9540_devs), NULL,
1762 ab8500->irq_base, ab8500->domain); 1763 0, ab8500->domain);
1763 else if (is_ab8540(ab8500)) { 1764 else if (is_ab8540(ab8500)) {
1764 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs, 1765 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1765 ARRAY_SIZE(ab8540_devs), NULL, 1766 ARRAY_SIZE(ab8540_devs), NULL,
1766 ab8500->irq_base, NULL); 1767 0, ab8500->domain);
1767 if (ret) 1768 if (ret)
1768 return ret; 1769 return ret;
1769 1770
1770 if (is_ab8540_1p2_or_earlier(ab8500)) 1771 if (is_ab8540_1p2_or_earlier(ab8500))
1771 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs, 1772 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1772 ARRAY_SIZE(ab8540_cut1_devs), NULL, 1773 ARRAY_SIZE(ab8540_cut1_devs), NULL,
1773 ab8500->irq_base, NULL); 1774 0, ab8500->domain);
1774 else /* ab8540 >= cut2 */ 1775 else /* ab8540 >= cut2 */
1775 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs, 1776 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1776 ARRAY_SIZE(ab8540_cut2_devs), NULL, 1777 ARRAY_SIZE(ab8540_cut2_devs), NULL,
1777 ab8500->irq_base, NULL); 1778 0, ab8500->domain);
1778 } else if (is_ab8505(ab8500)) 1779 } else if (is_ab8505(ab8500))
1779 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs, 1780 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1780 ARRAY_SIZE(ab8505_devs), NULL, 1781 ARRAY_SIZE(ab8505_devs), NULL,
1781 ab8500->irq_base, ab8500->domain); 1782 0, ab8500->domain);
1782 else 1783 else
1783 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 1784 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1784 ARRAY_SIZE(ab8500_devs), NULL, 1785 ARRAY_SIZE(ab8500_devs), NULL,
1785 ab8500->irq_base, ab8500->domain); 1786 0, ab8500->domain);
1786 if (ret) 1787 if (ret)
1787 return ret; 1788 return ret;
1788 1789
@@ -1790,7 +1791,7 @@ static int ab8500_probe(struct platform_device *pdev)
1790 /* Add battery management devices */ 1791 /* Add battery management devices */
1791 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 1792 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1792 ARRAY_SIZE(ab8500_bm_devs), NULL, 1793 ARRAY_SIZE(ab8500_bm_devs), NULL,
1793 ab8500->irq_base, ab8500->domain); 1794 0, ab8500->domain);
1794 if (ret) 1795 if (ret)
1795 dev_err(ab8500->dev, "error adding bm devices\n"); 1796 dev_err(ab8500->dev, "error adding bm devices\n");
1796 } 1797 }
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index e43e6e821117..7694e0700d34 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -25,6 +25,7 @@
25#include <linux/bitops.h> 25#include <linux/bitops.h>
26#include <linux/fs.h> 26#include <linux/fs.h>
27#include <linux/of.h> 27#include <linux/of.h>
28#include <linux/of_irq.h>
28#include <linux/platform_device.h> 29#include <linux/platform_device.h>
29#include <linux/uaccess.h> 30#include <linux/uaccess.h>
30#include <linux/mfd/core.h> 31#include <linux/mfd/core.h>
@@ -2678,16 +2679,12 @@ static struct irq_domain_ops db8500_irq_ops = {
2678 .xlate = irq_domain_xlate_twocell, 2679 .xlate = irq_domain_xlate_twocell,
2679}; 2680};
2680 2681
2681static int db8500_irq_init(struct device_node *np, int irq_base) 2682static int db8500_irq_init(struct device_node *np)
2682{ 2683{
2683 int i; 2684 int i;
2684 2685
2685 /* In the device tree case, just take some IRQs */
2686 if (np)
2687 irq_base = 0;
2688
2689 db8500_irq_domain = irq_domain_add_simple( 2686 db8500_irq_domain = irq_domain_add_simple(
2690 np, NUM_PRCMU_WAKEUPS, irq_base, 2687 np, NUM_PRCMU_WAKEUPS, 0,
2691 &db8500_irq_ops, NULL); 2688 &db8500_irq_ops, NULL);
2692 2689
2693 if (!db8500_irq_domain) { 2690 if (!db8500_irq_domain) {
@@ -3114,10 +3111,10 @@ static void db8500_prcmu_update_cpufreq(void)
3114} 3111}
3115 3112
3116static int db8500_prcmu_register_ab8500(struct device *parent, 3113static int db8500_prcmu_register_ab8500(struct device *parent,
3117 struct ab8500_platform_data *pdata, 3114 struct ab8500_platform_data *pdata)
3118 int irq)
3119{ 3115{
3120 struct resource ab8500_resource = DEFINE_RES_IRQ(irq); 3116 struct device_node *np;
3117 struct resource ab8500_resource;
3121 struct mfd_cell ab8500_cell = { 3118 struct mfd_cell ab8500_cell = {
3122 .name = "ab8500-core", 3119 .name = "ab8500-core",
3123 .of_compatible = "stericsson,ab8500", 3120 .of_compatible = "stericsson,ab8500",
@@ -3128,6 +3125,20 @@ static int db8500_prcmu_register_ab8500(struct device *parent,
3128 .num_resources = 1, 3125 .num_resources = 1,
3129 }; 3126 };
3130 3127
3128 if (!parent->of_node)
3129 return -ENODEV;
3130
3131 /* Look up the device node, sneak the IRQ out of it */
3132 for_each_child_of_node(parent->of_node, np) {
3133 if (of_device_is_compatible(np, ab8500_cell.of_compatible))
3134 break;
3135 }
3136 if (!np) {
3137 dev_info(parent, "could not find AB8500 node in the device tree\n");
3138 return -ENODEV;
3139 }
3140 of_irq_to_resource_table(np, &ab8500_resource, 1);
3141
3131 return mfd_add_devices(parent, 0, &ab8500_cell, 1, NULL, 0, NULL); 3142 return mfd_add_devices(parent, 0, &ab8500_cell, 1, NULL, 0, NULL);
3132} 3143}
3133 3144
@@ -3180,7 +3191,7 @@ static int db8500_prcmu_probe(struct platform_device *pdev)
3180 goto no_irq_return; 3191 goto no_irq_return;
3181 } 3192 }
3182 3193
3183 db8500_irq_init(np, pdata->irq_base); 3194 db8500_irq_init(np);
3184 3195
3185 prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); 3196 prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET);
3186 3197
@@ -3205,8 +3216,7 @@ static int db8500_prcmu_probe(struct platform_device *pdev)
3205 } 3216 }
3206 } 3217 }
3207 3218
3208 err = db8500_prcmu_register_ab8500(&pdev->dev, pdata->ab_platdata, 3219 err = db8500_prcmu_register_ab8500(&pdev->dev, pdata->ab_platdata);
3209 pdata->ab_irq);
3210 if (err) { 3220 if (err) {
3211 mfd_remove_devices(&pdev->dev); 3221 mfd_remove_devices(&pdev->dev);
3212 pr_err("prcmu: Failed to add ab8500 subdevice\n"); 3222 pr_err("prcmu: Failed to add ab8500 subdevice\n");
diff --git a/include/linux/mfd/abx500/ab8500.h b/include/linux/mfd/abx500/ab8500.h
index a86ca1406fb8..4e7fe7417fc9 100644
--- a/include/linux/mfd/abx500/ab8500.h
+++ b/include/linux/mfd/abx500/ab8500.h
@@ -347,7 +347,6 @@ struct ab8500 {
347 struct mutex lock; 347 struct mutex lock;
348 struct mutex irq_lock; 348 struct mutex irq_lock;
349 atomic_t transfer_ongoing; 349 atomic_t transfer_ongoing;
350 int irq_base;
351 int irq; 350 int irq;
352 struct irq_domain *domain; 351 struct irq_domain *domain;
353 enum ab8500_version version; 352 enum ab8500_version version;
@@ -378,7 +377,6 @@ struct ab8500_sysctrl_platform_data;
378 * @regulator: machine-specific constraints for regulators 377 * @regulator: machine-specific constraints for regulators
379 */ 378 */
380struct ab8500_platform_data { 379struct ab8500_platform_data {
381 int irq_base;
382 void (*init) (struct ab8500 *); 380 void (*init) (struct ab8500 *);
383 struct ab8500_regulator_platform_data *regulator; 381 struct ab8500_regulator_platform_data *regulator;
384 struct ab8500_codec_platform_data *codec; 382 struct ab8500_codec_platform_data *codec;
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index 060e11256fbc..bf5109d38a26 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -183,8 +183,6 @@ struct prcmu_pdata
183 bool enable_set_ddr_opp; 183 bool enable_set_ddr_opp;
184 bool enable_ape_opp_100_voltage; 184 bool enable_ape_opp_100_voltage;
185 struct ab8500_platform_data *ab_platdata; 185 struct ab8500_platform_data *ab_platdata;
186 int ab_irq;
187 int irq_base;
188 u32 version_offset; 186 u32 version_offset;
189 u32 legacy_offset; 187 u32 legacy_offset;
190 u32 adt_offset; 188 u32 adt_offset;
generated by cgit v1.2.2 (git 2.25.0) at 2026-07-22 11:47:08 -0400