diff options
-rw-r--r-- | arch/arm/mach-davinci/include/mach/irqs.h | 97 |
1 files changed, 97 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index 354af71798dc..ec76c7775c2e 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h | |||
@@ -401,6 +401,103 @@ | |||
401 | 401 | ||
402 | #define DA850_N_CP_INTC_IRQ 101 | 402 | #define DA850_N_CP_INTC_IRQ 101 |
403 | 403 | ||
404 | |||
405 | /* TNETV107X specific interrupts */ | ||
406 | #define IRQ_TNETV107X_TDM1_TXDMA 0 | ||
407 | #define IRQ_TNETV107X_EXT_INT_0 1 | ||
408 | #define IRQ_TNETV107X_EXT_INT_1 2 | ||
409 | #define IRQ_TNETV107X_GPIO_INT12 3 | ||
410 | #define IRQ_TNETV107X_GPIO_INT13 4 | ||
411 | #define IRQ_TNETV107X_TIMER_0_TINT12 5 | ||
412 | #define IRQ_TNETV107X_TIMER_1_TINT12 6 | ||
413 | #define IRQ_TNETV107X_UART0 7 | ||
414 | #define IRQ_TNETV107X_TDM1_RXDMA 8 | ||
415 | #define IRQ_TNETV107X_MCDMA_INT0 9 | ||
416 | #define IRQ_TNETV107X_MCDMA_INT1 10 | ||
417 | #define IRQ_TNETV107X_TPCC 11 | ||
418 | #define IRQ_TNETV107X_TPCC_INT0 12 | ||
419 | #define IRQ_TNETV107X_TPCC_INT1 13 | ||
420 | #define IRQ_TNETV107X_TPCC_INT2 14 | ||
421 | #define IRQ_TNETV107X_TPCC_INT3 15 | ||
422 | #define IRQ_TNETV107X_TPTC0 16 | ||
423 | #define IRQ_TNETV107X_TPTC1 17 | ||
424 | #define IRQ_TNETV107X_TIMER_0_TINT34 18 | ||
425 | #define IRQ_TNETV107X_ETHSS 19 | ||
426 | #define IRQ_TNETV107X_TIMER_1_TINT34 20 | ||
427 | #define IRQ_TNETV107X_DSP2ARM_INT0 21 | ||
428 | #define IRQ_TNETV107X_DSP2ARM_INT1 22 | ||
429 | #define IRQ_TNETV107X_ARM_NPMUIRQ 23 | ||
430 | #define IRQ_TNETV107X_USB1 24 | ||
431 | #define IRQ_TNETV107X_VLYNQ 25 | ||
432 | #define IRQ_TNETV107X_UART0_DMATX 26 | ||
433 | #define IRQ_TNETV107X_UART0_DMARX 27 | ||
434 | #define IRQ_TNETV107X_TDM1_TXMCSP 28 | ||
435 | #define IRQ_TNETV107X_SSP 29 | ||
436 | #define IRQ_TNETV107X_MCDMA_INT2 30 | ||
437 | #define IRQ_TNETV107X_MCDMA_INT3 31 | ||
438 | #define IRQ_TNETV107X_TDM_CODECIF_EOT 32 | ||
439 | #define IRQ_TNETV107X_IMCOP_SQR_ARM 33 | ||
440 | #define IRQ_TNETV107X_USB0 34 | ||
441 | #define IRQ_TNETV107X_USB_CDMA 35 | ||
442 | #define IRQ_TNETV107X_LCD 36 | ||
443 | #define IRQ_TNETV107X_KEYPAD 37 | ||
444 | #define IRQ_TNETV107X_KEYPAD_FREE 38 | ||
445 | #define IRQ_TNETV107X_RNG 39 | ||
446 | #define IRQ_TNETV107X_PKA 40 | ||
447 | #define IRQ_TNETV107X_TDM0_TXDMA 41 | ||
448 | #define IRQ_TNETV107X_TDM0_RXDMA 42 | ||
449 | #define IRQ_TNETV107X_TDM0_TXMCSP 43 | ||
450 | #define IRQ_TNETV107X_TDM0_RXMCSP 44 | ||
451 | #define IRQ_TNETV107X_TDM1_RXMCSP 45 | ||
452 | #define IRQ_TNETV107X_SDIO1 46 | ||
453 | #define IRQ_TNETV107X_SDIO0 47 | ||
454 | #define IRQ_TNETV107X_TSC 48 | ||
455 | #define IRQ_TNETV107X_TS 49 | ||
456 | #define IRQ_TNETV107X_UART1 50 | ||
457 | #define IRQ_TNETV107X_MBX_LITE 51 | ||
458 | #define IRQ_TNETV107X_GPIO_INT00 52 | ||
459 | #define IRQ_TNETV107X_GPIO_INT01 53 | ||
460 | #define IRQ_TNETV107X_GPIO_INT02 54 | ||
461 | #define IRQ_TNETV107X_GPIO_INT03 55 | ||
462 | #define IRQ_TNETV107X_UART2 56 | ||
463 | #define IRQ_TNETV107X_UART2_DMATX 57 | ||
464 | #define IRQ_TNETV107X_UART2_DMARX 58 | ||
465 | #define IRQ_TNETV107X_IMCOP_IMX 59 | ||
466 | #define IRQ_TNETV107X_IMCOP_VLCD 60 | ||
467 | #define IRQ_TNETV107X_AES 61 | ||
468 | #define IRQ_TNETV107X_DES 62 | ||
469 | #define IRQ_TNETV107X_SHAMD5 63 | ||
470 | #define IRQ_TNETV107X_TPCC_ERR 68 | ||
471 | #define IRQ_TNETV107X_TPCC_PROT 69 | ||
472 | #define IRQ_TNETV107X_TPTC0_ERR 70 | ||
473 | #define IRQ_TNETV107X_TPTC1_ERR 71 | ||
474 | #define IRQ_TNETV107X_UART0_ERR 72 | ||
475 | #define IRQ_TNETV107X_UART1_ERR 73 | ||
476 | #define IRQ_TNETV107X_AEMIF_ERR 74 | ||
477 | #define IRQ_TNETV107X_DDR_ERR 75 | ||
478 | #define IRQ_TNETV107X_WDTARM_INT0 76 | ||
479 | #define IRQ_TNETV107X_MCDMA_ERR 77 | ||
480 | #define IRQ_TNETV107X_GPIO_ERR 78 | ||
481 | #define IRQ_TNETV107X_MPU_ADDR 79 | ||
482 | #define IRQ_TNETV107X_MPU_PROT 80 | ||
483 | #define IRQ_TNETV107X_IOPU_ADDR 81 | ||
484 | #define IRQ_TNETV107X_IOPU_PROT 82 | ||
485 | #define IRQ_TNETV107X_KEYPAD_ADDR_ERR 83 | ||
486 | #define IRQ_TNETV107X_WDT0_ADDR_ERR 84 | ||
487 | #define IRQ_TNETV107X_WDT1_ADDR_ERR 85 | ||
488 | #define IRQ_TNETV107X_CLKCTL_ADDR_ERR 86 | ||
489 | #define IRQ_TNETV107X_PLL_UNLOCK 87 | ||
490 | #define IRQ_TNETV107X_WDTDSP_INT0 88 | ||
491 | #define IRQ_TNETV107X_SEC_CTRL_VIOLATION 89 | ||
492 | #define IRQ_TNETV107X_KEY_MNG_VIOLATION 90 | ||
493 | #define IRQ_TNETV107X_PBIST_CPU 91 | ||
494 | #define IRQ_TNETV107X_WDTARM 92 | ||
495 | #define IRQ_TNETV107X_PSC 93 | ||
496 | #define IRQ_TNETV107X_MMC0 94 | ||
497 | #define IRQ_TNETV107X_MMC1 95 | ||
498 | |||
499 | #define TNETV107X_N_CP_INTC_IRQ 96 | ||
500 | |||
404 | /* da850 currently has the most gpio pins (144) */ | 501 | /* da850 currently has the most gpio pins (144) */ |
405 | #define DAVINCI_N_GPIO 144 | 502 | #define DAVINCI_N_GPIO 144 |
406 | /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ | 503 | /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ |