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-rw-r--r--arch/arm/mach-clps711x/board-autcpu12.c2
-rw-r--r--arch/arm/mach-clps711x/board-cdb89712.c2
-rw-r--r--arch/arm/mach-clps711x/board-clep7312.c2
-rw-r--r--arch/arm/mach-clps711x/board-edb7211.c2
-rw-r--r--arch/arm/mach-clps711x/board-p720t.c2
-rw-r--r--arch/arm/mach-clps711x/common.c201
-rw-r--r--arch/arm/mach-clps711x/common.h2
-rw-r--r--arch/arm/mach-clps711x/include/mach/clps711x.h16
8 files changed, 3 insertions, 226 deletions
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
index f8d71a89644a..eb945b2a0042 100644
--- a/arch/arm/mach-clps711x/board-autcpu12.c
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -265,14 +265,12 @@ static void __init autcpu12_init_late(void)
265MACHINE_START(AUTCPU12, "autronix autcpu12") 265MACHINE_START(AUTCPU12, "autronix autcpu12")
266 /* Maintainer: Thomas Gleixner */ 266 /* Maintainer: Thomas Gleixner */
267 .atag_offset = 0x20000, 267 .atag_offset = 0x20000,
268 .nr_irqs = CLPS711X_NR_IRQS,
269 .map_io = clps711x_map_io, 268 .map_io = clps711x_map_io,
270 .init_early = clps711x_init_early, 269 .init_early = clps711x_init_early,
271 .init_irq = clps711x_init_irq, 270 .init_irq = clps711x_init_irq,
272 .init_time = clps711x_timer_init, 271 .init_time = clps711x_timer_init,
273 .init_machine = autcpu12_init, 272 .init_machine = autcpu12_init,
274 .init_late = autcpu12_init_late, 273 .init_late = autcpu12_init_late,
275 .handle_irq = clps711x_handle_irq,
276 .restart = clps711x_restart, 274 .restart = clps711x_restart,
277MACHINE_END 275MACHINE_END
278 276
diff --git a/arch/arm/mach-clps711x/board-cdb89712.c b/arch/arm/mach-clps711x/board-cdb89712.c
index a9e38c6bcfb4..e261a47f2aff 100644
--- a/arch/arm/mach-clps711x/board-cdb89712.c
+++ b/arch/arm/mach-clps711x/board-cdb89712.c
@@ -139,12 +139,10 @@ static void __init cdb89712_init(void)
139MACHINE_START(CDB89712, "Cirrus-CDB89712") 139MACHINE_START(CDB89712, "Cirrus-CDB89712")
140 /* Maintainer: Ray Lehtiniemi */ 140 /* Maintainer: Ray Lehtiniemi */
141 .atag_offset = 0x100, 141 .atag_offset = 0x100,
142 .nr_irqs = CLPS711X_NR_IRQS,
143 .map_io = clps711x_map_io, 142 .map_io = clps711x_map_io,
144 .init_early = clps711x_init_early, 143 .init_early = clps711x_init_early,
145 .init_irq = clps711x_init_irq, 144 .init_irq = clps711x_init_irq,
146 .init_time = clps711x_timer_init, 145 .init_time = clps711x_timer_init,
147 .init_machine = cdb89712_init, 146 .init_machine = cdb89712_init,
148 .handle_irq = clps711x_handle_irq,
149 .restart = clps711x_restart, 147 .restart = clps711x_restart,
150MACHINE_END 148MACHINE_END
diff --git a/arch/arm/mach-clps711x/board-clep7312.c b/arch/arm/mach-clps711x/board-clep7312.c
index b4764246d0f8..221b9de32dd6 100644
--- a/arch/arm/mach-clps711x/board-clep7312.c
+++ b/arch/arm/mach-clps711x/board-clep7312.c
@@ -36,12 +36,10 @@ fixup_clep7312(struct tag *tags, char **cmdline, struct meminfo *mi)
36MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312") 36MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
37 /* Maintainer: Nobody */ 37 /* Maintainer: Nobody */
38 .atag_offset = 0x0100, 38 .atag_offset = 0x0100,
39 .nr_irqs = CLPS711X_NR_IRQS,
40 .fixup = fixup_clep7312, 39 .fixup = fixup_clep7312,
41 .map_io = clps711x_map_io, 40 .map_io = clps711x_map_io,
42 .init_early = clps711x_init_early, 41 .init_early = clps711x_init_early,
43 .init_irq = clps711x_init_irq, 42 .init_irq = clps711x_init_irq,
44 .init_time = clps711x_timer_init, 43 .init_time = clps711x_timer_init,
45 .handle_irq = clps711x_handle_irq,
46 .restart = clps711x_restart, 44 .restart = clps711x_restart,
47MACHINE_END 45MACHINE_END
diff --git a/arch/arm/mach-clps711x/board-edb7211.c b/arch/arm/mach-clps711x/board-edb7211.c
index fe6184ead896..077609841f14 100644
--- a/arch/arm/mach-clps711x/board-edb7211.c
+++ b/arch/arm/mach-clps711x/board-edb7211.c
@@ -177,7 +177,6 @@ static void __init edb7211_init_late(void)
177MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") 177MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
178 /* Maintainer: Jon McClintock */ 178 /* Maintainer: Jon McClintock */
179 .atag_offset = VIDEORAM_SIZE + 0x100, 179 .atag_offset = VIDEORAM_SIZE + 0x100,
180 .nr_irqs = CLPS711X_NR_IRQS,
181 .fixup = fixup_edb7211, 180 .fixup = fixup_edb7211,
182 .reserve = edb7211_reserve, 181 .reserve = edb7211_reserve,
183 .map_io = clps711x_map_io, 182 .map_io = clps711x_map_io,
@@ -186,6 +185,5 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
186 .init_time = clps711x_timer_init, 185 .init_time = clps711x_timer_init,
187 .init_machine = edb7211_init, 186 .init_machine = edb7211_init,
188 .init_late = edb7211_init_late, 187 .init_late = edb7211_init_late,
189 .handle_irq = clps711x_handle_irq,
190 .restart = clps711x_restart, 188 .restart = clps711x_restart,
191MACHINE_END 189MACHINE_END
diff --git a/arch/arm/mach-clps711x/board-p720t.c b/arch/arm/mach-clps711x/board-p720t.c
index dd81b06f68fe..67b733744ed7 100644
--- a/arch/arm/mach-clps711x/board-p720t.c
+++ b/arch/arm/mach-clps711x/board-p720t.c
@@ -363,7 +363,6 @@ static void __init p720t_init_late(void)
363MACHINE_START(P720T, "ARM-Prospector720T") 363MACHINE_START(P720T, "ARM-Prospector720T")
364 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 364 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
365 .atag_offset = 0x100, 365 .atag_offset = 0x100,
366 .nr_irqs = CLPS711X_NR_IRQS,
367 .fixup = fixup_p720t, 366 .fixup = fixup_p720t,
368 .map_io = clps711x_map_io, 367 .map_io = clps711x_map_io,
369 .init_early = clps711x_init_early, 368 .init_early = clps711x_init_early,
@@ -371,6 +370,5 @@ MACHINE_START(P720T, "ARM-Prospector720T")
371 .init_time = clps711x_timer_init, 370 .init_time = clps711x_timer_init,
372 .init_machine = p720t_init, 371 .init_machine = p720t_init,
373 .init_late = p720t_init_late, 372 .init_late = p720t_init_late,
374 .handle_irq = clps711x_handle_irq,
375 .restart = clps711x_restart, 373 .restart = clps711x_restart,
376MACHINE_END 374MACHINE_END
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index a1935911e4f1..aee81fa46ccf 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -31,14 +31,14 @@
31#include <linux/clk-provider.h> 31#include <linux/clk-provider.h>
32#include <linux/sched_clock.h> 32#include <linux/sched_clock.h>
33 33
34#include <asm/exception.h>
35#include <asm/mach/irq.h>
36#include <asm/mach/map.h> 34#include <asm/mach/map.h>
37#include <asm/mach/time.h> 35#include <asm/mach/time.h>
38#include <asm/system_misc.h> 36#include <asm/system_misc.h>
39 37
40#include <mach/hardware.h> 38#include <mach/hardware.h>
41 39
40#include "common.h"
41
42static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh, 42static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh,
43 *clk_tint, *clk_spi; 43 *clk_tint, *clk_spi;
44 44
@@ -59,204 +59,9 @@ void __init clps711x_map_io(void)
59 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc)); 59 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
60} 60}
61 61
62static void int1_mask(struct irq_data *d)
63{
64 u32 intmr1;
65
66 intmr1 = clps_readl(INTMR1);
67 intmr1 &= ~(1 << d->irq);
68 clps_writel(intmr1, INTMR1);
69}
70
71static void int1_eoi(struct irq_data *d)
72{
73 switch (d->irq) {
74 case IRQ_CSINT: clps_writel(0, COEOI); break;
75 case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
76 case IRQ_TC2OI: clps_writel(0, TC2EOI); break;
77 case IRQ_RTCMI: clps_writel(0, RTCEOI); break;
78 case IRQ_TINT: clps_writel(0, TEOI); break;
79 case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
80 }
81}
82
83static void int1_unmask(struct irq_data *d)
84{
85 u32 intmr1;
86
87 intmr1 = clps_readl(INTMR1);
88 intmr1 |= 1 << d->irq;
89 clps_writel(intmr1, INTMR1);
90}
91
92static struct irq_chip int1_chip = {
93 .name = "Interrupt Vector 1",
94 .irq_eoi = int1_eoi,
95 .irq_mask = int1_mask,
96 .irq_unmask = int1_unmask,
97};
98
99static void int2_mask(struct irq_data *d)
100{
101 u32 intmr2;
102
103 intmr2 = clps_readl(INTMR2);
104 intmr2 &= ~(1 << (d->irq - 16));
105 clps_writel(intmr2, INTMR2);
106}
107
108static void int2_eoi(struct irq_data *d)
109{
110 switch (d->irq) {
111 case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
112 }
113}
114
115static void int2_unmask(struct irq_data *d)
116{
117 u32 intmr2;
118
119 intmr2 = clps_readl(INTMR2);
120 intmr2 |= 1 << (d->irq - 16);
121 clps_writel(intmr2, INTMR2);
122}
123
124static struct irq_chip int2_chip = {
125 .name = "Interrupt Vector 2",
126 .irq_eoi = int2_eoi,
127 .irq_mask = int2_mask,
128 .irq_unmask = int2_unmask,
129};
130
131static void int3_mask(struct irq_data *d)
132{
133 u32 intmr3;
134
135 intmr3 = clps_readl(INTMR3);
136 intmr3 &= ~(1 << (d->irq - 32));
137 clps_writel(intmr3, INTMR3);
138}
139
140static void int3_unmask(struct irq_data *d)
141{
142 u32 intmr3;
143
144 intmr3 = clps_readl(INTMR3);
145 intmr3 |= 1 << (d->irq - 32);
146 clps_writel(intmr3, INTMR3);
147}
148
149static struct irq_chip int3_chip = {
150 .name = "Interrupt Vector 3",
151 .irq_mask = int3_mask,
152 .irq_unmask = int3_unmask,
153};
154
155static struct {
156 int nr;
157 struct irq_chip *chip;
158 irq_flow_handler_t handle;
159} clps711x_irqdescs[] __initdata = {
160 { IRQ_CSINT, &int1_chip, handle_fasteoi_irq, },
161 { IRQ_EINT1, &int1_chip, handle_level_irq, },
162 { IRQ_EINT2, &int1_chip, handle_level_irq, },
163 { IRQ_EINT3, &int1_chip, handle_level_irq, },
164 { IRQ_TC1OI, &int1_chip, handle_fasteoi_irq, },
165 { IRQ_TC2OI, &int1_chip, handle_fasteoi_irq, },
166 { IRQ_RTCMI, &int1_chip, handle_fasteoi_irq, },
167 { IRQ_TINT, &int1_chip, handle_fasteoi_irq, },
168 { IRQ_UTXINT1, &int1_chip, handle_level_irq, },
169 { IRQ_URXINT1, &int1_chip, handle_level_irq, },
170 { IRQ_UMSINT, &int1_chip, handle_fasteoi_irq, },
171 { IRQ_SSEOTI, &int1_chip, handle_level_irq, },
172 { IRQ_KBDINT, &int2_chip, handle_fasteoi_irq, },
173 { IRQ_SS2RX, &int2_chip, handle_level_irq, },
174 { IRQ_SS2TX, &int2_chip, handle_level_irq, },
175 { IRQ_UTXINT2, &int2_chip, handle_level_irq, },
176 { IRQ_URXINT2, &int2_chip, handle_level_irq, },
177};
178
179void __init clps711x_init_irq(void) 62void __init clps711x_init_irq(void)
180{ 63{
181 unsigned int i; 64 clps711x_intc_init(CLPS711X_PHYS_BASE, SZ_16K);
182
183 /* Disable interrupts */
184 clps_writel(0, INTMR1);
185 clps_writel(0, INTMR2);
186 clps_writel(0, INTMR3);
187
188 /* Clear down any pending interrupts */
189 clps_writel(0, BLEOI);
190 clps_writel(0, MCEOI);
191 clps_writel(0, COEOI);
192 clps_writel(0, TC1EOI);
193 clps_writel(0, TC2EOI);
194 clps_writel(0, RTCEOI);
195 clps_writel(0, TEOI);
196 clps_writel(0, UMSEOI);
197 clps_writel(0, KBDEOI);
198 clps_writel(0, SRXEOF);
199 clps_writel(0xffffffff, DAISR);
200
201 for (i = 0; i < ARRAY_SIZE(clps711x_irqdescs); i++) {
202 irq_set_chip_and_handler(clps711x_irqdescs[i].nr,
203 clps711x_irqdescs[i].chip,
204 clps711x_irqdescs[i].handle);
205 set_irq_flags(clps711x_irqdescs[i].nr,
206 IRQF_VALID | IRQF_PROBE);
207 }
208
209 if (IS_ENABLED(CONFIG_FIQ)) {
210 init_FIQ(0);
211 irq_set_chip_and_handler(IRQ_DAIINT, &int3_chip,
212 handle_bad_irq);
213 set_irq_flags(IRQ_DAIINT,
214 IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
215 }
216}
217
218static inline u32 fls16(u32 x)
219{
220 u32 r = 15;
221
222 if (!(x & 0xff00)) {
223 x <<= 8;
224 r -= 8;
225 }
226 if (!(x & 0xf000)) {
227 x <<= 4;
228 r -= 4;
229 }
230 if (!(x & 0xc000)) {
231 x <<= 2;
232 r -= 2;
233 }
234 if (!(x & 0x8000))
235 r--;
236
237 return r;
238}
239
240asmlinkage void __exception_irq_entry clps711x_handle_irq(struct pt_regs *regs)
241{
242 do {
243 u32 irqstat;
244 void __iomem *base = CLPS711X_VIRT_BASE;
245
246 irqstat = readw_relaxed(base + INTSR1) &
247 readw_relaxed(base + INTMR1);
248 if (irqstat)
249 handle_IRQ(fls16(irqstat), regs);
250
251 irqstat = readw_relaxed(base + INTSR2) &
252 readw_relaxed(base + INTMR2);
253 if (irqstat) {
254 handle_IRQ(fls16(irqstat) + 16, regs);
255 continue;
256 }
257
258 break;
259 } while (1);
260} 65}
261 66
262static u64 notrace clps711x_sched_clock_read(void) 67static u64 notrace clps711x_sched_clock_read(void)
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index f6b43a972047..7489139d5d63 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -6,14 +6,12 @@
6 6
7#include <linux/reboot.h> 7#include <linux/reboot.h>
8 8
9#define CLPS711X_NR_IRQS (33)
10#define CLPS711X_NR_GPIO (4 * 8 + 3) 9#define CLPS711X_NR_GPIO (4 * 8 + 3)
11#define CLPS711X_GPIO(prt, bit) ((prt) * 8 + (bit)) 10#define CLPS711X_GPIO(prt, bit) ((prt) * 8 + (bit))
12 11
13extern void clps711x_map_io(void); 12extern void clps711x_map_io(void);
14extern void clps711x_init_irq(void); 13extern void clps711x_init_irq(void);
15extern void clps711x_timer_init(void); 14extern void clps711x_timer_init(void);
16extern void clps711x_handle_irq(struct pt_regs *regs);
17extern void clps711x_restart(enum reboot_mode mode, const char *cmd); 15extern void clps711x_restart(enum reboot_mode mode, const char *cmd);
18extern void clps711x_init_early(void); 16extern void clps711x_init_early(void);
19 17
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index 0286f4bf9945..eb052a11aa9d 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -40,8 +40,6 @@
40#define MEMCFG1 (0x0180) 40#define MEMCFG1 (0x0180)
41#define MEMCFG2 (0x01c0) 41#define MEMCFG2 (0x01c0)
42#define DRFPR (0x0200) 42#define DRFPR (0x0200)
43#define INTSR1 (0x0240)
44#define INTMR1 (0x0280)
45#define LCDCON (0x02c0) 43#define LCDCON (0x02c0)
46#define TC1D (0x0300) 44#define TC1D (0x0300)
47#define TC2D (0x0340) 45#define TC2D (0x0340)
@@ -55,28 +53,16 @@
55#define PALLSW (0x0540) 53#define PALLSW (0x0540)
56#define PALMSW (0x0580) 54#define PALMSW (0x0580)
57#define STFCLR (0x05c0) 55#define STFCLR (0x05c0)
58#define BLEOI (0x0600)
59#define MCEOI (0x0640)
60#define TEOI (0x0680)
61#define TC1EOI (0x06c0)
62#define TC2EOI (0x0700)
63#define RTCEOI (0x0740)
64#define UMSEOI (0x0780)
65#define COEOI (0x07c0)
66#define HALT (0x0800) 56#define HALT (0x0800)
67#define STDBY (0x0840) 57#define STDBY (0x0840)
68 58
69#define FBADDR (0x1000) 59#define FBADDR (0x1000)
70#define SYSCON2 (0x1100) 60#define SYSCON2 (0x1100)
71#define SYSFLG2 (0x1140) 61#define SYSFLG2 (0x1140)
72#define INTSR2 (0x1240)
73#define INTMR2 (0x1280)
74#define UARTDR2 (0x1480) 62#define UARTDR2 (0x1480)
75#define UBRLCR2 (0x14c0) 63#define UBRLCR2 (0x14c0)
76#define SS2DR (0x1500) 64#define SS2DR (0x1500)
77#define SRXEOF (0x1600)
78#define SS2POP (0x16c0) 65#define SS2POP (0x16c0)
79#define KBDEOI (0x1700)
80 66
81#define DAIR (0x2000) 67#define DAIR (0x2000)
82#define DAIDR0 (0x2040) 68#define DAIDR0 (0x2040)
@@ -84,8 +70,6 @@
84#define DAIDR2 (0x20c0) 70#define DAIDR2 (0x20c0)
85#define DAISR (0x2100) 71#define DAISR (0x2100)
86#define SYSCON3 (0x2200) 72#define SYSCON3 (0x2200)
87#define INTSR3 (0x2240)
88#define INTMR3 (0x2280)
89#define LEDFLSH (0x22c0) 73#define LEDFLSH (0x22c0)
90#define SDCONF (0x2300) 74#define SDCONF (0x2300)
91#define SDRFPR (0x2340) 75#define SDRFPR (0x2340)