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-rw-r--r--drivers/net/usb/r8152.c36
1 files changed, 32 insertions, 4 deletions
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index e9685ce98327..7d2dd80c4a7a 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -59,6 +59,7 @@
59#define PLA_WDT6_CTRL 0xe428 59#define PLA_WDT6_CTRL 0xe428
60#define PLA_TCR0 0xe610 60#define PLA_TCR0 0xe610
61#define PLA_TCR1 0xe612 61#define PLA_TCR1 0xe612
62#define PLA_MTPS 0xe615
62#define PLA_TXFIFO_CTRL 0xe618 63#define PLA_TXFIFO_CTRL 0xe618
63#define PLA_RSTTALLY 0xe800 64#define PLA_RSTTALLY 0xe800
64#define PLA_CR 0xe813 65#define PLA_CR 0xe813
@@ -180,6 +181,10 @@
180/* PLA_TCR1 */ 181/* PLA_TCR1 */
181#define VERSION_MASK 0x7cf0 182#define VERSION_MASK 0x7cf0
182 183
184/* PLA_MTPS */
185#define MTPS_JUMBO (12 * 1024 / 64)
186#define MTPS_DEFAULT (6 * 1024 / 64)
187
183/* PLA_RSTTALLY */ 188/* PLA_RSTTALLY */
184#define TALLY_RESET 0x0001 189#define TALLY_RESET 0x0001
185 190
@@ -440,7 +445,10 @@ enum rtl_register_content {
440#define BYTE_EN_START_MASK 0x0f 445#define BYTE_EN_START_MASK 0x0f
441#define BYTE_EN_END_MASK 0xf0 446#define BYTE_EN_END_MASK 0xf0
442 447
448#define RTL8153_MAX_PACKET 9216 /* 9K */
449#define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
443#define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN) 450#define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
451#define RTL8153_RMS RTL8153_MAX_PACKET
444#define RTL8152_TX_TIMEOUT (5 * HZ) 452#define RTL8152_TX_TIMEOUT (5 * HZ)
445 453
446/* rtl8152 flags */ 454/* rtl8152 flags */
@@ -2522,7 +2530,8 @@ static void r8153_first_init(struct r8152 *tp)
2522 ocp_data &= ~CPCR_RX_VLAN; 2530 ocp_data &= ~CPCR_RX_VLAN;
2523 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); 2531 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2524 2532
2525 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS); 2533 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2534 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2526 2535
2527 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0); 2536 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2528 ocp_data |= TCR0_AUTO_FIFO; 2537 ocp_data |= TCR0_AUTO_FIFO;
@@ -2572,7 +2581,7 @@ static void r8153_enter_oob(struct r8152 *tp)
2572 mdelay(1); 2581 mdelay(1);
2573 } 2582 }
2574 2583
2575 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS); 2584 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2576 2585
2577 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG); 2586 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2578 ocp_data &= ~TEREDO_WAKE_MASK; 2587 ocp_data &= ~TEREDO_WAKE_MASK;
@@ -3284,6 +3293,26 @@ out:
3284 return res; 3293 return res;
3285} 3294}
3286 3295
3296static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3297{
3298 struct r8152 *tp = netdev_priv(dev);
3299
3300 switch (tp->version) {
3301 case RTL_VER_01:
3302 case RTL_VER_02:
3303 return eth_change_mtu(dev, new_mtu);
3304 default:
3305 break;
3306 }
3307
3308 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3309 return -EINVAL;
3310
3311 dev->mtu = new_mtu;
3312
3313 return 0;
3314}
3315
3287static const struct net_device_ops rtl8152_netdev_ops = { 3316static const struct net_device_ops rtl8152_netdev_ops = {
3288 .ndo_open = rtl8152_open, 3317 .ndo_open = rtl8152_open,
3289 .ndo_stop = rtl8152_close, 3318 .ndo_stop = rtl8152_close,
@@ -3292,8 +3321,7 @@ static const struct net_device_ops rtl8152_netdev_ops = {
3292 .ndo_tx_timeout = rtl8152_tx_timeout, 3321 .ndo_tx_timeout = rtl8152_tx_timeout,
3293 .ndo_set_rx_mode = rtl8152_set_rx_mode, 3322 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3294 .ndo_set_mac_address = rtl8152_set_mac_address, 3323 .ndo_set_mac_address = rtl8152_set_mac_address,
3295 3324 .ndo_change_mtu = rtl8152_change_mtu,
3296 .ndo_change_mtu = eth_change_mtu,
3297 .ndo_validate_addr = eth_validate_addr, 3325 .ndo_validate_addr = eth_validate_addr,
3298}; 3326};
3299 3327