4 files changed, 51 insertions, 20 deletions

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
index 6a2a288dc253..a0514d3de615 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
@@ -982,6 +982,44 @@ nvc0_grctx_pack_tpc[] = {
  * PGRAPH context implementation
  ******************************************************************************/
 
+int
+nvc0_grctx_mmio_data(struct nvc0_grctx *info, u32 size, u32 align, u32 access)
+{
+        if (info->data) {
+                info->buffer[info->buffer_nr] = round_up(info->addr, align);
+                info->addr = info->buffer[info->buffer_nr] + size;
+                info->data->size = size;
+                info->data->align = align;
+                info->data->access = access;
+                info->data++;
+                return info->buffer_nr++;
+        }
+        return -1;
+}
+
+void
+nvc0_grctx_mmio_item(struct nvc0_grctx *info, u32 addr, u32 data,
+                     int shift, int buffer)
+{
+        if (info->data) {
+                if (shift >= 0) {
+                        info->mmio->addr = addr;
+                        info->mmio->data = data;
+                        info->mmio->shift = shift;
+                        info->mmio->buffer = buffer;
+                        if (buffer >= 0)
+                                data |= info->buffer[buffer] >> shift;
+                        info->mmio++;
+                } else
+                        return;
+        } else {
+                if (buffer >= 0)
+                        return;
+        }
+
+        nv_wr32(info->priv, addr, data);
+}
+
 void
 nvc0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
 {
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h
index 03a934457c26..0579542cde3a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h
@@ -12,6 +12,17 @@ struct nvc0_grctx {
         u64 addr;
 };
 
+int  nvc0_grctx_mmio_data(struct nvc0_grctx *, u32 size, u32 align, u32 access);
+void nvc0_grctx_mmio_item(struct nvc0_grctx *, u32 addr, u32 data, int s, int);
+
+#define mmio_data(a,b,c) nvc0_grctx_mmio_data(info, (a), (b), (c))
+#define mmio_list(a,b,c,d) nvc0_grctx_mmio_item(info, (a), (b), (c), (d))
+
+#define mmio_vram(a,b,c,d) nvc0_grctx_mmio_data((a), (b), (c), (d))
+#define mmio_refn(a,b,c,d,e) nvc0_grctx_mmio_item((a), (b), (c), (d), (e))
+#define mmio_skip(a,b,c) mmio_refn((a), (b), (c), -1, -1)
+#define mmio_wr32(a,b,c) mmio_refn((a), (b), (c),  0, -1)
+
 struct nvc0_grctx_oclass {
         struct nouveau_oclass base;
         /* main context generation function */
@@ -30,24 +41,6 @@ struct nvc0_grctx_oclass {
         const struct nvc0_graph_pack *mthd;
 };
 
-#define mmio_data(s,a,p) do {                                                  \
-        info->buffer[info->buffer_nr] = round_up(info->addr, (a));             \
-        info->addr = info->buffer[info->buffer_nr++] + (s);                    \
-        info->data->size = (s);                                                \
-        info->data->align = (a);                                               \
-        info->data->access = (p);                                              \
-        info->data++;                                                          \
-} while(0)
-
-#define mmio_list(r,d,s,b) do {                                                \
-        info->mmio->addr = (r);                                                \
-        info->mmio->data = (d);                                                \
-        info->mmio->shift = (s);                                               \
-        info->mmio->buffer = (b);                                              \
-        info->mmio++;                                                          \
-        nv_wr32(priv, (r), (d) | ((s) ? (info->buffer[(b)] >> (s)) : 0));      \
-} while(0)
-
 extern struct nouveau_oclass *nvc0_grctx_oclass;
 int  nvc0_grctx_generate(struct nvc0_graph_priv *);
 void nvc0_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *);
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
index 0156862fb34d..0f9847237347 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
@@ -283,7 +283,7 @@ nvc0_graph_context_ctor(struct nouveau_object *parent,
                 u32 addr = mmio->addr;
                 u32 data = mmio->data;
 
-                if (mmio->shift) {
+                if (mmio->buffer >= 0) {
                         u64 info = chan->data[mmio->buffer].vma.offset;
                         data |= info >> mmio->shift;
                 }
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
index bfe9bdddbec8..fde401017556 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
@@ -65,7 +65,7 @@ struct nvc0_graph_mmio {
         u32 addr;
         u32 data;
         u32 shift;
-        u32 buffer;
+        int buffer;
 };
 
 struct nvc0_graph_fuc {