diff options
59 files changed, 410 insertions, 108 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5ca86e7ab66d..1005367d0f9d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -394,7 +394,7 @@ config ARCH_EP93XX | |||
| 394 | select ARCH_REQUIRE_GPIOLIB | 394 | select ARCH_REQUIRE_GPIOLIB |
| 395 | select ARCH_HAS_HOLES_MEMORYMODEL | 395 | select ARCH_HAS_HOLES_MEMORYMODEL |
| 396 | select ARCH_USES_GETTIMEOFFSET | 396 | select ARCH_USES_GETTIMEOFFSET |
| 397 | select NEED_MEMORY_H | 397 | select NEED_MACH_MEMORY_H |
| 398 | help | 398 | help |
| 399 | This enables support for the Cirrus EP93xx series of CPUs. | 399 | This enables support for the Cirrus EP93xx series of CPUs. |
| 400 | 400 | ||
| @@ -2044,6 +2044,7 @@ config CPU_FREQ_PXA | |||
| 2044 | bool | 2044 | bool |
| 2045 | depends on CPU_FREQ && ARCH_PXA && PXA25x | 2045 | depends on CPU_FREQ && ARCH_PXA && PXA25x |
| 2046 | default y | 2046 | default y |
| 2047 | select CPU_FREQ_TABLE | ||
| 2047 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | 2048 | select CPU_FREQ_DEFAULT_GOV_USERSPACE |
| 2048 | 2049 | ||
| 2049 | config CPU_FREQ_S3C | 2050 | config CPU_FREQ_S3C |
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts index e5818668d091..0e225b86b652 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra-harmony.dts | |||
| @@ -66,5 +66,6 @@ | |||
| 66 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ | 66 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ |
| 67 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ | 67 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ |
| 68 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | 68 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ |
| 69 | support-8bit; | ||
| 69 | }; | 70 | }; |
| 70 | }; | 71 | }; |
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index 64cedca6fc79..a72299b8e668 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts | |||
| @@ -25,4 +25,8 @@ | |||
| 25 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | 25 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
| 26 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | 26 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ |
| 27 | }; | 27 | }; |
| 28 | |||
| 29 | sdhci@c8000600 { | ||
| 30 | support-8bit; | ||
| 31 | }; | ||
| 28 | }; | 32 | }; |
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig new file mode 100644 index 000000000000..c5876d244f4b --- /dev/null +++ b/arch/arm/configs/at91sam9g45_defconfig | |||
| @@ -0,0 +1,214 @@ | |||
| 1 | CONFIG_EXPERIMENTAL=y | ||
| 2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 3 | # CONFIG_SWAP is not set | ||
| 4 | CONFIG_SYSVIPC=y | ||
| 5 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 6 | CONFIG_SYSFS_DEPRECATED=y | ||
| 7 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 8 | CONFIG_BLK_DEV_INITRD=y | ||
| 9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 10 | CONFIG_EMBEDDED=y | ||
| 11 | CONFIG_SLAB=y | ||
| 12 | CONFIG_MODULES=y | ||
| 13 | CONFIG_MODULE_UNLOAD=y | ||
| 14 | # CONFIG_LBDAF is not set | ||
| 15 | # CONFIG_BLK_DEV_BSG is not set | ||
| 16 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 17 | # CONFIG_IOSCHED_CFQ is not set | ||
| 18 | CONFIG_ARCH_AT91=y | ||
| 19 | CONFIG_ARCH_AT91SAM9G45=y | ||
| 20 | CONFIG_MACH_AT91SAM9M10G45EK=y | ||
| 21 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
| 22 | CONFIG_AT91_SLOW_CLOCK=y | ||
| 23 | CONFIG_AEABI=y | ||
| 24 | # CONFIG_OABI_COMPAT is not set | ||
| 25 | CONFIG_LEDS=y | ||
| 26 | CONFIG_LEDS_CPU=y | ||
| 27 | CONFIG_UACCESS_WITH_MEMCPY=y | ||
| 28 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 29 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 30 | CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x71100000,25165824 root=/dev/ram0 rw" | ||
| 31 | CONFIG_AUTO_ZRELADDR=y | ||
| 32 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 33 | CONFIG_NET=y | ||
| 34 | CONFIG_PACKET=y | ||
| 35 | CONFIG_UNIX=y | ||
| 36 | CONFIG_INET=y | ||
| 37 | CONFIG_IP_MULTICAST=y | ||
| 38 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 39 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 40 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 41 | # CONFIG_INET_DIAG is not set | ||
| 42 | CONFIG_IPV6=y | ||
| 43 | # CONFIG_INET6_XFRM_MODE_TRANSPORT is not set | ||
| 44 | # CONFIG_INET6_XFRM_MODE_TUNNEL is not set | ||
| 45 | # CONFIG_INET6_XFRM_MODE_BEET is not set | ||
| 46 | CONFIG_IPV6_SIT_6RD=y | ||
| 47 | CONFIG_CFG80211=y | ||
| 48 | CONFIG_LIB80211=y | ||
| 49 | CONFIG_MAC80211=y | ||
| 50 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 51 | CONFIG_DEVTMPFS=y | ||
| 52 | CONFIG_DEVTMPFS_MOUNT=y | ||
| 53 | # CONFIG_STANDALONE is not set | ||
| 54 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
| 55 | CONFIG_MTD=y | ||
| 56 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 57 | CONFIG_MTD_CHAR=y | ||
| 58 | CONFIG_MTD_BLOCK=y | ||
| 59 | CONFIG_MTD_DATAFLASH=y | ||
| 60 | CONFIG_MTD_NAND=y | ||
| 61 | CONFIG_MTD_NAND_ATMEL=y | ||
| 62 | CONFIG_MTD_UBI=y | ||
| 63 | CONFIG_BLK_DEV_LOOP=y | ||
| 64 | CONFIG_BLK_DEV_RAM=y | ||
| 65 | CONFIG_BLK_DEV_RAM_COUNT=4 | ||
| 66 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
| 67 | CONFIG_MISC_DEVICES=y | ||
| 68 | CONFIG_ATMEL_PWM=y | ||
| 69 | CONFIG_ATMEL_TCLIB=y | ||
| 70 | CONFIG_SCSI=y | ||
| 71 | CONFIG_BLK_DEV_SD=y | ||
| 72 | CONFIG_SCSI_MULTI_LUN=y | ||
| 73 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 74 | CONFIG_NETDEVICES=y | ||
| 75 | CONFIG_MII=y | ||
| 76 | CONFIG_DAVICOM_PHY=y | ||
| 77 | CONFIG_NET_ETHERNET=y | ||
| 78 | CONFIG_MACB=y | ||
| 79 | # CONFIG_NETDEV_1000 is not set | ||
| 80 | # CONFIG_NETDEV_10000 is not set | ||
| 81 | CONFIG_LIBERTAS_THINFIRM=m | ||
| 82 | CONFIG_LIBERTAS_THINFIRM_USB=m | ||
| 83 | CONFIG_AT76C50X_USB=m | ||
| 84 | CONFIG_USB_ZD1201=m | ||
| 85 | CONFIG_RTL8187=m | ||
| 86 | CONFIG_ATH_COMMON=m | ||
| 87 | CONFIG_ATH9K=m | ||
| 88 | CONFIG_CARL9170=m | ||
| 89 | CONFIG_B43=m | ||
| 90 | CONFIG_B43_PHY_N=y | ||
| 91 | CONFIG_LIBERTAS=m | ||
| 92 | CONFIG_LIBERTAS_USB=m | ||
| 93 | CONFIG_LIBERTAS_SDIO=m | ||
| 94 | CONFIG_LIBERTAS_SPI=m | ||
| 95 | CONFIG_RT2X00=m | ||
| 96 | CONFIG_RT2500USB=m | ||
| 97 | CONFIG_RT73USB=m | ||
| 98 | CONFIG_RT2800USB=m | ||
| 99 | CONFIG_RT2800USB_RT53XX=y | ||
| 100 | CONFIG_RT2800USB_UNKNOWN=y | ||
| 101 | CONFIG_RTL8192CU=m | ||
| 102 | CONFIG_WL1251=m | ||
| 103 | CONFIG_WL1251_SDIO=m | ||
| 104 | CONFIG_WL12XX_MENU=m | ||
| 105 | CONFIG_WL12XX=m | ||
| 106 | CONFIG_WL12XX_SDIO=m | ||
| 107 | CONFIG_ZD1211RW=m | ||
| 108 | CONFIG_MWIFIEX=m | ||
| 109 | CONFIG_MWIFIEX_SDIO=m | ||
| 110 | CONFIG_INPUT_POLLDEV=m | ||
| 111 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 112 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 | ||
| 113 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272 | ||
| 114 | CONFIG_INPUT_JOYDEV=y | ||
| 115 | CONFIG_INPUT_EVDEV=y | ||
| 116 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 117 | CONFIG_KEYBOARD_QT1070=m | ||
| 118 | CONFIG_KEYBOARD_QT2160=m | ||
| 119 | CONFIG_KEYBOARD_GPIO=y | ||
| 120 | # CONFIG_INPUT_MOUSE is not set | ||
| 121 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 122 | CONFIG_TOUCHSCREEN_ATMEL_MXT=m | ||
| 123 | CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y | ||
| 124 | # CONFIG_SERIO is not set | ||
| 125 | CONFIG_LEGACY_PTY_COUNT=4 | ||
| 126 | CONFIG_SERIAL_ATMEL=y | ||
| 127 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
| 128 | CONFIG_HW_RANDOM=y | ||
| 129 | CONFIG_I2C=y | ||
| 130 | CONFIG_I2C_GPIO=y | ||
| 131 | CONFIG_SPI=y | ||
| 132 | CONFIG_SPI_ATMEL=y | ||
| 133 | # CONFIG_HWMON is not set | ||
| 134 | # CONFIG_MFD_SUPPORT is not set | ||
| 135 | CONFIG_FB=y | ||
| 136 | CONFIG_FB_ATMEL=y | ||
| 137 | CONFIG_FB_UDL=m | ||
| 138 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 139 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
| 140 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
| 141 | CONFIG_BACKLIGHT_ATMEL_LCDC=y | ||
| 142 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
| 143 | CONFIG_SOUND=y | ||
| 144 | CONFIG_SND=y | ||
| 145 | CONFIG_SND_SEQUENCER=y | ||
| 146 | CONFIG_SND_MIXER_OSS=y | ||
| 147 | CONFIG_SND_PCM_OSS=y | ||
| 148 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
| 149 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
| 150 | # CONFIG_SND_DRIVERS is not set | ||
| 151 | # CONFIG_SND_ARM is not set | ||
| 152 | CONFIG_SND_ATMEL_AC97C=y | ||
| 153 | # CONFIG_SND_SPI is not set | ||
| 154 | CONFIG_SND_USB_AUDIO=m | ||
| 155 | # CONFIG_USB_HID is not set | ||
| 156 | CONFIG_USB=y | ||
| 157 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 158 | CONFIG_USB_DEVICEFS=y | ||
| 159 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 160 | CONFIG_USB_EHCI_HCD=y | ||
| 161 | CONFIG_USB_OHCI_HCD=y | ||
| 162 | CONFIG_USB_ACM=y | ||
| 163 | CONFIG_USB_STORAGE=y | ||
| 164 | CONFIG_USB_GADGET=y | ||
| 165 | CONFIG_USB_ATMEL_USBA=m | ||
| 166 | CONFIG_USB_ZERO=m | ||
| 167 | CONFIG_USB_AUDIO=m | ||
| 168 | CONFIG_USB_ETH=m | ||
| 169 | CONFIG_USB_ETH_EEM=y | ||
| 170 | CONFIG_USB_MASS_STORAGE=m | ||
| 171 | CONFIG_USB_G_SERIAL=m | ||
| 172 | CONFIG_USB_CDC_COMPOSITE=m | ||
| 173 | CONFIG_USB_G_MULTI=m | ||
| 174 | CONFIG_USB_G_MULTI_CDC=y | ||
| 175 | CONFIG_MMC=y | ||
| 176 | # CONFIG_MMC_BLOCK_BOUNCE is not set | ||
| 177 | CONFIG_SDIO_UART=m | ||
| 178 | CONFIG_MMC_ATMELMCI=y | ||
| 179 | CONFIG_MMC_ATMELMCI_DMA=y | ||
| 180 | CONFIG_LEDS_ATMEL_PWM=y | ||
| 181 | CONFIG_LEDS_GPIO=y | ||
| 182 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
| 183 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 184 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
| 185 | CONFIG_RTC_CLASS=y | ||
| 186 | CONFIG_RTC_DRV_AT91RM9200=y | ||
| 187 | CONFIG_DMADEVICES=y | ||
| 188 | CONFIG_AT_HDMAC=y | ||
| 189 | CONFIG_DMATEST=m | ||
| 190 | # CONFIG_IOMMU_SUPPORT is not set | ||
| 191 | CONFIG_EXT2_FS=y | ||
| 192 | CONFIG_FANOTIFY=y | ||
| 193 | CONFIG_VFAT_FS=y | ||
| 194 | CONFIG_TMPFS=y | ||
| 195 | CONFIG_JFFS2_FS=y | ||
| 196 | CONFIG_JFFS2_SUMMARY=y | ||
| 197 | CONFIG_CRAMFS=m | ||
| 198 | CONFIG_SQUASHFS=m | ||
| 199 | CONFIG_SQUASHFS_EMBEDDED=y | ||
| 200 | CONFIG_NFS_FS=y | ||
| 201 | CONFIG_NFS_V3=y | ||
| 202 | CONFIG_NLS_CODEPAGE_437=y | ||
| 203 | CONFIG_NLS_CODEPAGE_850=y | ||
| 204 | CONFIG_NLS_ISO8859_1=y | ||
| 205 | CONFIG_STRIP_ASM_SYMS=y | ||
| 206 | # CONFIG_SCHED_DEBUG is not set | ||
| 207 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 208 | # CONFIG_FTRACE is not set | ||
| 209 | CONFIG_DEBUG_USER=y | ||
| 210 | CONFIG_CRYPTO_ECB=y | ||
| 211 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 212 | CONFIG_CRYPTO_USER_API_HASH=m | ||
| 213 | CONFIG_CRYPTO_USER_API_SKCIPHER=m | ||
| 214 | # CONFIG_CRYPTO_HW is not set | ||
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h index b3fea38d55c6..43cab498bc27 100644 --- a/arch/arm/include/asm/hardware/it8152.h +++ b/arch/arm/include/asm/hardware/it8152.h | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | 9 | ||
| 10 | #ifndef __ASM_HARDWARE_IT8152_H | 10 | #ifndef __ASM_HARDWARE_IT8152_H |
| 11 | #define __ASM_HARDWARE_IT8152_H | 11 | #define __ASM_HARDWARE_IT8152_H |
| 12 | extern unsigned long it8152_base_address; | 12 | extern void __iomem *it8152_base_address; |
| 13 | 13 | ||
| 14 | #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) | 14 | #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) |
| 15 | #define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000) | 15 | #define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000) |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 0519dd7f034b..e9c2968005dc 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
| @@ -449,6 +449,7 @@ config MACH_MX31_3DS | |||
| 449 | select IMX_HAVE_PLATFORM_IMX_UART | 449 | select IMX_HAVE_PLATFORM_IMX_UART |
| 450 | select IMX_HAVE_PLATFORM_IPU_CORE | 450 | select IMX_HAVE_PLATFORM_IPU_CORE |
| 451 | select IMX_HAVE_PLATFORM_MXC_EHCI | 451 | select IMX_HAVE_PLATFORM_MXC_EHCI |
| 452 | select IMX_HAVE_PLATFORM_MXC_MMC | ||
| 452 | select IMX_HAVE_PLATFORM_MXC_NAND | 453 | select IMX_HAVE_PLATFORM_MXC_NAND |
| 453 | select IMX_HAVE_PLATFORM_SPI_IMX | 454 | select IMX_HAVE_PLATFORM_SPI_IMX |
| 454 | select MXC_ULPI if USB_ULPI | 455 | select MXC_ULPI if USB_ULPI |
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 6484db525bd7..0de4d1835ea4 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c | |||
| @@ -540,7 +540,7 @@ static const struct mxc_nand_platform_data | |||
| 540 | mx31_3ds_nand_board_info __initconst = { | 540 | mx31_3ds_nand_board_info __initconst = { |
| 541 | .width = 1, | 541 | .width = 1, |
| 542 | .hw_ecc = 1, | 542 | .hw_ecc = 1, |
| 543 | #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT | 543 | #ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT |
| 544 | .flash_bbt = 1, | 544 | .flash_bbt = 1, |
| 545 | #endif | 545 | #endif |
| 546 | }; | 546 | }; |
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index 56ef5f6c8116..323d4c9e9f44 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig | |||
| @@ -77,7 +77,7 @@ config MACH_TETON_BGA | |||
| 77 | Say 'Y' here if you want to support the Marvell PXA168-based | 77 | Say 'Y' here if you want to support the Marvell PXA168-based |
| 78 | Teton BGA Development Board. | 78 | Teton BGA Development Board. |
| 79 | 79 | ||
| 80 | config MACH_SHEEVAD | 80 | config MACH_GPLUGD |
| 81 | bool "Marvell's PXA168 GuruPlug Display (gplugD) Board" | 81 | bool "Marvell's PXA168 GuruPlug Display (gplugD) Board" |
| 82 | select CPU_PXA168 | 82 | select CPU_PXA168 |
| 83 | help | 83 | help |
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index b0ac942327aa..8f948f981646 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile | |||
| @@ -19,4 +19,4 @@ obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o | |||
| 19 | obj-$(CONFIG_MACH_FLINT) += flint.o | 19 | obj-$(CONFIG_MACH_FLINT) += flint.o |
| 20 | obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o | 20 | obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o |
| 21 | obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o | 21 | obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o |
| 22 | obj-$(CONFIG_MACH_SHEEVAD) += gplugd.o | 22 | obj-$(CONFIG_MACH_GPLUGD) += gplugd.o |
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h index 3143e994e672..149b30cd1469 100644 --- a/arch/arm/mach-mmp/clock.h +++ b/arch/arm/mach-mmp/clock.h | |||
| @@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops; | |||
| 30 | 30 | ||
| 31 | #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ | 31 | #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ |
| 32 | struct clk clk_##_name = { \ | 32 | struct clk clk_##_name = { \ |
| 33 | .clk_rst = (void __iomem *)APBC_##_reg, \ | 33 | .clk_rst = APBC_##_reg, \ |
| 34 | .fnclksel = _fnclksel, \ | 34 | .fnclksel = _fnclksel, \ |
| 35 | .rate = _rate, \ | 35 | .rate = _rate, \ |
| 36 | .ops = &apbc_clk_ops, \ | 36 | .ops = &apbc_clk_ops, \ |
| @@ -38,7 +38,7 @@ struct clk clk_##_name = { \ | |||
| 38 | 38 | ||
| 39 | #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ | 39 | #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ |
| 40 | struct clk clk_##_name = { \ | 40 | struct clk clk_##_name = { \ |
| 41 | .clk_rst = (void __iomem *)APBC_##_reg, \ | 41 | .clk_rst = APBC_##_reg, \ |
| 42 | .fnclksel = _fnclksel, \ | 42 | .fnclksel = _fnclksel, \ |
| 43 | .rate = _rate, \ | 43 | .rate = _rate, \ |
| 44 | .ops = _ops, \ | 44 | .ops = _ops, \ |
| @@ -46,7 +46,7 @@ struct clk clk_##_name = { \ | |||
| 46 | 46 | ||
| 47 | #define APMU_CLK(_name, _reg, _eval, _rate) \ | 47 | #define APMU_CLK(_name, _reg, _eval, _rate) \ |
| 48 | struct clk clk_##_name = { \ | 48 | struct clk clk_##_name = { \ |
| 49 | .clk_rst = (void __iomem *)APMU_##_reg, \ | 49 | .clk_rst = APMU_##_reg, \ |
| 50 | .enable_val = _eval, \ | 50 | .enable_val = _eval, \ |
| 51 | .rate = _rate, \ | 51 | .rate = _rate, \ |
| 52 | .ops = &apmu_clk_ops, \ | 52 | .ops = &apmu_clk_ops, \ |
| @@ -54,7 +54,7 @@ struct clk clk_##_name = { \ | |||
| 54 | 54 | ||
| 55 | #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ | 55 | #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ |
| 56 | struct clk clk_##_name = { \ | 56 | struct clk clk_##_name = { \ |
| 57 | .clk_rst = (void __iomem *)APMU_##_reg, \ | 57 | .clk_rst = APMU_##_reg, \ |
| 58 | .enable_val = _eval, \ | 58 | .enable_val = _eval, \ |
| 59 | .rate = _rate, \ | 59 | .rate = _rate, \ |
| 60 | .ops = _ops, \ | 60 | .ops = _ops, \ |
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c index 0ec0ca80bb3e..5720674739f0 100644 --- a/arch/arm/mach-mmp/common.c +++ b/arch/arm/mach-mmp/common.c | |||
| @@ -27,12 +27,12 @@ EXPORT_SYMBOL(mmp_chip_id); | |||
| 27 | static struct map_desc standard_io_desc[] __initdata = { | 27 | static struct map_desc standard_io_desc[] __initdata = { |
| 28 | { | 28 | { |
| 29 | .pfn = __phys_to_pfn(APB_PHYS_BASE), | 29 | .pfn = __phys_to_pfn(APB_PHYS_BASE), |
| 30 | .virtual = APB_VIRT_BASE, | 30 | .virtual = (unsigned long)APB_VIRT_BASE, |
| 31 | .length = APB_PHYS_SIZE, | 31 | .length = APB_PHYS_SIZE, |
| 32 | .type = MT_DEVICE, | 32 | .type = MT_DEVICE, |
| 33 | }, { | 33 | }, { |
| 34 | .pfn = __phys_to_pfn(AXI_PHYS_BASE), | 34 | .pfn = __phys_to_pfn(AXI_PHYS_BASE), |
| 35 | .virtual = AXI_VIRT_BASE, | 35 | .virtual = (unsigned long)AXI_VIRT_BASE, |
| 36 | .length = AXI_PHYS_SIZE, | 36 | .length = AXI_PHYS_SIZE, |
| 37 | .type = MT_DEVICE, | 37 | .type = MT_DEVICE, |
| 38 | }, | 38 | }, |
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c index 32776f3739f1..69156568bc41 100644 --- a/arch/arm/mach-mmp/gplugd.c +++ b/arch/arm/mach-mmp/gplugd.c | |||
| @@ -188,7 +188,7 @@ static void __init gplugd_init(void) | |||
| 188 | pxa168_add_eth(&gplugd_eth_platform_data); | 188 | pxa168_add_eth(&gplugd_eth_platform_data); |
| 189 | } | 189 | } |
| 190 | 190 | ||
| 191 | MACHINE_START(SHEEVAD, "PXA168-based GuruPlug Display (gplugD) Platform") | 191 | MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform") |
| 192 | .map_io = mmp_map_io, | 192 | .map_io = mmp_map_io, |
| 193 | .nr_irqs = IRQ_BOARD_START, | 193 | .nr_irqs = IRQ_BOARD_START, |
| 194 | .init_irq = pxa168_init_irq, | 194 | .init_irq = pxa168_init_irq, |
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h index 3254089a644d..3e404acd6ff4 100644 --- a/arch/arm/mach-mmp/include/mach/addr-map.h +++ b/arch/arm/mach-mmp/include/mach/addr-map.h | |||
| @@ -11,6 +11,12 @@ | |||
| 11 | #ifndef __ASM_MACH_ADDR_MAP_H | 11 | #ifndef __ASM_MACH_ADDR_MAP_H |
| 12 | #define __ASM_MACH_ADDR_MAP_H | 12 | #define __ASM_MACH_ADDR_MAP_H |
| 13 | 13 | ||
| 14 | #ifndef __ASSEMBLER__ | ||
| 15 | #define IOMEM(x) ((void __iomem *)(x)) | ||
| 16 | #else | ||
| 17 | #define IOMEM(x) (x) | ||
| 18 | #endif | ||
| 19 | |||
| 14 | /* APB - Application Subsystem Peripheral Bus | 20 | /* APB - Application Subsystem Peripheral Bus |
| 15 | * | 21 | * |
| 16 | * NOTE: the DMA controller registers are actually on the AXI fabric #1 | 22 | * NOTE: the DMA controller registers are actually on the AXI fabric #1 |
| @@ -18,11 +24,11 @@ | |||
| 18 | * peripherals on APB, let's count it into the ABP mapping area. | 24 | * peripherals on APB, let's count it into the ABP mapping area. |
| 19 | */ | 25 | */ |
| 20 | #define APB_PHYS_BASE 0xd4000000 | 26 | #define APB_PHYS_BASE 0xd4000000 |
| 21 | #define APB_VIRT_BASE 0xfe000000 | 27 | #define APB_VIRT_BASE IOMEM(0xfe000000) |
| 22 | #define APB_PHYS_SIZE 0x00200000 | 28 | #define APB_PHYS_SIZE 0x00200000 |
| 23 | 29 | ||
| 24 | #define AXI_PHYS_BASE 0xd4200000 | 30 | #define AXI_PHYS_BASE 0xd4200000 |
| 25 | #define AXI_VIRT_BASE 0xfe200000 | 31 | #define AXI_VIRT_BASE IOMEM(0xfe200000) |
| 26 | #define AXI_PHYS_SIZE 0x00200000 | 32 | #define AXI_PHYS_SIZE 0x00200000 |
| 27 | 33 | ||
| 28 | /* Static Memory Controller - Chip Select 0 and 1 */ | 34 | /* Static Memory Controller - Chip Select 0 and 1 */ |
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h index c017a983eced..d14eeaf16322 100644 --- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h +++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | #define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) | 7 | #define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) |
| 8 | 8 | ||
| 9 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | 9 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
| 10 | #define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) | 10 | #define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) |
| 11 | 11 | ||
| 12 | #define NR_BUILTIN_GPIO IRQ_GPIO_NUM | 12 | #define NR_BUILTIN_GPIO IRQ_GPIO_NUM |
| 13 | 13 | ||
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 65d8689e40c9..7a7e8e4dde41 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c | |||
| @@ -86,7 +86,8 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = { | |||
| 86 | 86 | ||
| 87 | void mmp2_clear_pmic_int(void) | 87 | void mmp2_clear_pmic_int(void) |
| 88 | { | 88 | { |
| 89 | unsigned long mfpr_pmic, data; | 89 | void __iomem *mfpr_pmic; |
| 90 | unsigned long data; | ||
| 90 | 91 | ||
| 91 | mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4; | 92 | mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4; |
| 92 | data = __raw_readl(mfpr_pmic); | 93 | data = __raw_readl(mfpr_pmic); |
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c index e4529af0da72..be19e9ce839a 100644 --- a/arch/arm/mach-mx5/pm-imx5.c +++ b/arch/arm/mach-mx5/pm-imx5.c | |||
| @@ -19,9 +19,13 @@ | |||
| 19 | 19 | ||
| 20 | static struct clk *gpc_dvfs_clk; | 20 | static struct clk *gpc_dvfs_clk; |
| 21 | 21 | ||
| 22 | static int mx5_suspend_prepare(void) | ||
| 23 | { | ||
| 24 | return clk_enable(gpc_dvfs_clk); | ||
| 25 | } | ||
| 26 | |||
| 22 | static int mx5_suspend_enter(suspend_state_t state) | 27 | static int mx5_suspend_enter(suspend_state_t state) |
| 23 | { | 28 | { |
| 24 | clk_enable(gpc_dvfs_clk); | ||
| 25 | switch (state) { | 29 | switch (state) { |
| 26 | case PM_SUSPEND_MEM: | 30 | case PM_SUSPEND_MEM: |
| 27 | mx5_cpu_lp_set(STOP_POWER_OFF); | 31 | mx5_cpu_lp_set(STOP_POWER_OFF); |
| @@ -42,11 +46,14 @@ static int mx5_suspend_enter(suspend_state_t state) | |||
| 42 | __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); | 46 | __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); |
| 43 | } | 47 | } |
| 44 | cpu_do_idle(); | 48 | cpu_do_idle(); |
| 45 | clk_disable(gpc_dvfs_clk); | ||
| 46 | |||
| 47 | return 0; | 49 | return 0; |
| 48 | } | 50 | } |
| 49 | 51 | ||
| 52 | static void mx5_suspend_finish(void) | ||
| 53 | { | ||
| 54 | clk_disable(gpc_dvfs_clk); | ||
| 55 | } | ||
| 56 | |||
| 50 | static int mx5_pm_valid(suspend_state_t state) | 57 | static int mx5_pm_valid(suspend_state_t state) |
| 51 | { | 58 | { |
| 52 | return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); | 59 | return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); |
| @@ -54,7 +61,9 @@ static int mx5_pm_valid(suspend_state_t state) | |||
| 54 | 61 | ||
| 55 | static const struct platform_suspend_ops mx5_suspend_ops = { | 62 | static const struct platform_suspend_ops mx5_suspend_ops = { |
| 56 | .valid = mx5_pm_valid, | 63 | .valid = mx5_pm_valid, |
| 64 | .prepare = mx5_suspend_prepare, | ||
| 57 | .enter = mx5_suspend_enter, | 65 | .enter = mx5_suspend_enter, |
| 66 | .finish = mx5_suspend_finish, | ||
| 58 | }; | 67 | }; |
| 59 | 68 | ||
| 60 | static int __init mx5_pm_init(void) | 69 | static int __init mx5_pm_init(void) |
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index 5dcc59d5b9ec..ba532279d1a1 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c | |||
| @@ -349,7 +349,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ | |||
| 349 | \ | 349 | \ |
| 350 | reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ | 350 | reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ |
| 351 | reg &= ~BM_CLKCTRL_##fr##_##fs##FRAC; \ | 351 | reg &= ~BM_CLKCTRL_##fr##_##fs##FRAC; \ |
| 352 | reg |= frac; \ | 352 | reg |= frac << BP_CLKCTRL_##fr##_##fs##FRAC; \ |
| 353 | __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ | 353 | __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ |
| 354 | } \ | 354 | } \ |
| 355 | \ | 355 | \ |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 484cec54882a..a3e37ff3ad18 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
| @@ -133,7 +133,7 @@ static const int sdp4430_keymap[] = { | |||
| 133 | KEY(7, 6, KEY_OK), | 133 | KEY(7, 6, KEY_OK), |
| 134 | KEY(7, 7, KEY_DOWN), | 134 | KEY(7, 7, KEY_DOWN), |
| 135 | }; | 135 | }; |
| 136 | static struct omap_device_pad keypad_pads[] __initdata = { | 136 | static struct omap_device_pad keypad_pads[] = { |
| 137 | { .name = "kpd_col1.kpd_col1", | 137 | { .name = "kpd_col1.kpd_col1", |
| 138 | .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1, | 138 | .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1, |
| 139 | }, | 139 | }, |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 3a12f7586a4c..65f1be6a182c 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
| @@ -165,8 +165,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs) | |||
| 165 | 165 | ||
| 166 | omap_irq_bank_init_one(bank); | 166 | omap_irq_bank_init_one(bank); |
| 167 | 167 | ||
| 168 | for (i = 0, j = 0; i < bank->nr_irqs; i += 32, j += 0x20) | 168 | for (j = 0; j < bank->nr_irqs; j += 32) |
| 169 | omap_alloc_gc(bank->base_reg + j, i, 32); | 169 | omap_alloc_gc(bank->base_reg + j, j, 32); |
| 170 | 170 | ||
| 171 | nr_of_irqs += bank->nr_irqs; | 171 | nr_of_irqs += bank->nr_irqs; |
| 172 | nr_banks++; | 172 | nr_banks++; |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index cd19309fd3b8..61d3c72ded84 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
| @@ -2,6 +2,27 @@ if ARCH_PXA | |||
| 2 | 2 | ||
| 3 | menu "Intel PXA2xx/PXA3xx Implementations" | 3 | menu "Intel PXA2xx/PXA3xx Implementations" |
| 4 | 4 | ||
| 5 | config ARCH_PXA_V7 | ||
| 6 | bool "ARMv7 (PXA95x) based systems" | ||
| 7 | |||
| 8 | if ARCH_PXA_V7 | ||
| 9 | comment "Marvell Dev Platforms (sorted by hardware release time)" | ||
| 10 | config MACH_TAVOREVB3 | ||
| 11 | bool "PXA95x Development Platform (aka TavorEVB III)" | ||
| 12 | select CPU_PXA955 | ||
| 13 | |||
| 14 | config MACH_SAARB | ||
| 15 | bool "PXA955 Handheld Platform (aka SAARB)" | ||
| 16 | select CPU_PXA955 | ||
| 17 | endif | ||
| 18 | |||
| 19 | config PXA_V7_MACH_AUTO | ||
| 20 | def_bool y | ||
| 21 | depends on ARCH_PXA_V7 | ||
| 22 | depends on !MACH_SAARB | ||
| 23 | select MACH_TAVOREVB3 | ||
| 24 | |||
| 25 | if !ARCH_PXA_V7 | ||
| 5 | comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" | 26 | comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" |
| 6 | 27 | ||
| 7 | config ARCH_LUBBOCK | 28 | config ARCH_LUBBOCK |
| @@ -41,19 +62,11 @@ config MACH_TAVOREVB | |||
| 41 | select PXA3xx | 62 | select PXA3xx |
| 42 | select CPU_PXA930 | 63 | select CPU_PXA930 |
| 43 | 64 | ||
| 44 | config MACH_TAVOREVB3 | ||
| 45 | bool "PXA95x Development Platform (aka TavorEVB III)" | ||
| 46 | select CPU_PXA950 | ||
| 47 | |||
| 48 | config MACH_SAAR | 65 | config MACH_SAAR |
| 49 | bool "PXA930 Handheld Platform (aka SAAR)" | 66 | bool "PXA930 Handheld Platform (aka SAAR)" |
| 50 | select PXA3xx | 67 | select PXA3xx |
| 51 | select CPU_PXA930 | 68 | select CPU_PXA930 |
| 52 | 69 | ||
| 53 | config MACH_SAARB | ||
| 54 | bool "PXA955 Handheld Platform (aka SAARB)" | ||
| 55 | select CPU_PXA955 | ||
| 56 | |||
| 57 | comment "Third Party Dev Platforms (sorted by vendor name)" | 70 | comment "Third Party Dev Platforms (sorted by vendor name)" |
| 58 | 71 | ||
| 59 | config ARCH_PXA_IDP | 72 | config ARCH_PXA_IDP |
| @@ -414,6 +427,7 @@ config MACH_CENTRO | |||
| 414 | bool "Palm Centro 685 (GSM)" | 427 | bool "Palm Centro 685 (GSM)" |
| 415 | default y | 428 | default y |
| 416 | depends on ARCH_PXA_PALM | 429 | depends on ARCH_PXA_PALM |
| 430 | select MACH_PALM27X | ||
| 417 | select PXA27x | 431 | select PXA27x |
| 418 | select IWMMXT | 432 | select IWMMXT |
| 419 | select PALM_TREO | 433 | select PALM_TREO |
| @@ -425,6 +439,7 @@ config MACH_TREO680 | |||
| 425 | bool "Palm Treo 680" | 439 | bool "Palm Treo 680" |
| 426 | default y | 440 | default y |
| 427 | depends on ARCH_PXA_PALM | 441 | depends on ARCH_PXA_PALM |
| 442 | select MACH_PALM27X | ||
| 428 | select PXA27x | 443 | select PXA27x |
| 429 | select IWMMXT | 444 | select IWMMXT |
| 430 | select PALM_TREO | 445 | select PALM_TREO |
| @@ -436,15 +451,18 @@ config MACH_RAUMFELD_RC | |||
| 436 | bool "Raumfeld Controller" | 451 | bool "Raumfeld Controller" |
| 437 | select PXA3xx | 452 | select PXA3xx |
| 438 | select CPU_PXA300 | 453 | select CPU_PXA300 |
| 454 | select POWER_SUPPLY | ||
| 439 | select HAVE_PWM | 455 | select HAVE_PWM |
| 440 | 456 | ||
| 441 | config MACH_RAUMFELD_CONNECTOR | 457 | config MACH_RAUMFELD_CONNECTOR |
| 442 | bool "Raumfeld Connector" | 458 | bool "Raumfeld Connector" |
| 459 | select POWER_SUPPLY | ||
| 443 | select PXA3xx | 460 | select PXA3xx |
| 444 | select CPU_PXA300 | 461 | select CPU_PXA300 |
| 445 | 462 | ||
| 446 | config MACH_RAUMFELD_SPEAKER | 463 | config MACH_RAUMFELD_SPEAKER |
| 447 | bool "Raumfeld Speaker" | 464 | bool "Raumfeld Speaker" |
| 465 | select POWER_SUPPLY | ||
| 448 | select PXA3xx | 466 | select PXA3xx |
| 449 | select CPU_PXA300 | 467 | select CPU_PXA300 |
| 450 | 468 | ||
| @@ -598,7 +616,7 @@ config MACH_ZIPIT2 | |||
| 598 | bool "Zipit Z2 Handheld" | 616 | bool "Zipit Z2 Handheld" |
| 599 | select PXA27x | 617 | select PXA27x |
| 600 | select HAVE_PWM | 618 | select HAVE_PWM |
| 601 | 619 | endif | |
| 602 | endmenu | 620 | endmenu |
| 603 | 621 | ||
| 604 | config PXA25x | 622 | config PXA25x |
| @@ -688,6 +706,8 @@ config SHARPSL_PM | |||
| 688 | config SHARPSL_PM_MAX1111 | 706 | config SHARPSL_PM_MAX1111 |
| 689 | bool | 707 | bool |
| 690 | select HWMON | 708 | select HWMON |
| 709 | select SPI | ||
| 710 | select SPI_MASTER | ||
| 691 | select SENSORS_MAX1111 | 711 | select SENSORS_MAX1111 |
| 692 | 712 | ||
| 693 | config PXA_HAVE_ISA_IRQS | 713 | config PXA_HAVE_ISA_IRQS |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index cc39d17b2e07..be0f7df8685c 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
| @@ -19,7 +19,7 @@ endif | |||
| 19 | obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o | 19 | obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o |
| 20 | obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o | 20 | obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o |
| 21 | obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o | 21 | obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o |
| 22 | obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o | 22 | obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o |
| 23 | obj-$(CONFIG_CPU_PXA300) += pxa300.o | 23 | obj-$(CONFIG_CPU_PXA300) += pxa300.o |
| 24 | obj-$(CONFIG_CPU_PXA320) += pxa320.o | 24 | obj-$(CONFIG_CPU_PXA320) += pxa320.o |
| 25 | obj-$(CONFIG_CPU_PXA930) += pxa930.o | 25 | obj-$(CONFIG_CPU_PXA930) += pxa930.o |
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 7765d677adbb..fc0b8544e174 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c | |||
| @@ -591,7 +591,7 @@ static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ct | |||
| 591 | BALLOON3_NAND_CONTROL_REG); | 591 | BALLOON3_NAND_CONTROL_REG); |
| 592 | if (balloon3_ctl_set) | 592 | if (balloon3_ctl_set) |
| 593 | __raw_writel(balloon3_ctl_set, | 593 | __raw_writel(balloon3_ctl_set, |
| 594 | BALLOON3_NAND_CONTROL_REG | | 594 | BALLOON3_NAND_CONTROL_REG + |
| 595 | BALLOON3_FPGA_SETnCLR); | 595 | BALLOON3_FPGA_SETnCLR); |
| 596 | } | 596 | } |
| 597 | 597 | ||
| @@ -608,7 +608,7 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip) | |||
| 608 | __raw_writew( | 608 | __raw_writew( |
| 609 | BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | | 609 | BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | |
| 610 | BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3, | 610 | BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3, |
| 611 | BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); | 611 | BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR); |
| 612 | 612 | ||
| 613 | /* Deassert correct nCE line */ | 613 | /* Deassert correct nCE line */ |
| 614 | __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, | 614 | __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, |
| @@ -626,7 +626,7 @@ static int balloon3_nand_probe(struct platform_device *pdev) | |||
| 626 | int ret; | 626 | int ret; |
| 627 | 627 | ||
| 628 | __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, | 628 | __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, |
| 629 | BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR); | 629 | BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR); |
| 630 | 630 | ||
| 631 | ver = __raw_readw(BALLOON3_FPGA_VER); | 631 | ver = __raw_readw(BALLOON3_FPGA_VER); |
| 632 | if (ver < 0x4f08) | 632 | if (ver < 0x4f08) |
| @@ -649,7 +649,7 @@ static int balloon3_nand_probe(struct platform_device *pdev) | |||
| 649 | BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | | 649 | BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | |
| 650 | BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | | 650 | BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | |
| 651 | BALLOON3_NAND_CONTROL_FLWP, | 651 | BALLOON3_NAND_CONTROL_FLWP, |
| 652 | BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); | 652 | BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR); |
| 653 | return 0; | 653 | return 0; |
| 654 | 654 | ||
| 655 | err2: | 655 | err2: |
| @@ -807,7 +807,7 @@ static void __init balloon3_init(void) | |||
| 807 | 807 | ||
| 808 | static struct map_desc balloon3_io_desc[] __initdata = { | 808 | static struct map_desc balloon3_io_desc[] __initdata = { |
| 809 | { /* CPLD/FPGA */ | 809 | { /* CPLD/FPGA */ |
| 810 | .virtual = BALLOON3_FPGA_VIRT, | 810 | .virtual = (unsigned long)BALLOON3_FPGA_VIRT, |
| 811 | .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS), | 811 | .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS), |
| 812 | .length = BALLOON3_FPGA_LENGTH, | 812 | .length = BALLOON3_FPGA_LENGTH, |
| 813 | .type = MT_DEVICE, | 813 | .type = MT_DEVICE, |
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index 6bf479d9b5ac..ebd9259f5ac9 100644 --- a/arch/arm/mach-pxa/cm-x2xx-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c | |||
| @@ -26,7 +26,7 @@ | |||
| 26 | 26 | ||
| 27 | #include <asm/hardware/it8152.h> | 27 | #include <asm/hardware/it8152.h> |
| 28 | 28 | ||
| 29 | unsigned long it8152_base_address; | 29 | void __iomem *it8152_base_address; |
| 30 | static int cmx2xx_it8152_irq_gpio; | 30 | static int cmx2xx_it8152_irq_gpio; |
| 31 | 31 | ||
| 32 | static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) | 32 | static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) |
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index 349896c53abd..f2e4190080cb 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
| @@ -39,7 +39,7 @@ extern void cmx270_init(void); | |||
| 39 | #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40) | 39 | #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40) |
| 40 | 40 | ||
| 41 | /* virtual addresses for statically mapped regions */ | 41 | /* virtual addresses for statically mapped regions */ |
| 42 | #define CMX2XX_VIRT_BASE (0xe8000000) | 42 | #define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000) |
| 43 | #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) | 43 | #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) |
| 44 | 44 | ||
| 45 | /* physical address if local-bus attached devices */ | 45 | /* physical address if local-bus attached devices */ |
| @@ -482,7 +482,7 @@ static void __init cmx2xx_init_irq(void) | |||
| 482 | /* Map PCI companion statically */ | 482 | /* Map PCI companion statically */ |
| 483 | static struct map_desc cmx2xx_io_desc[] __initdata = { | 483 | static struct map_desc cmx2xx_io_desc[] __initdata = { |
| 484 | [0] = { /* PCI bridge */ | 484 | [0] = { /* PCI bridge */ |
| 485 | .virtual = CMX2XX_IT8152_VIRT, | 485 | .virtual = (unsigned long)CMX2XX_IT8152_VIRT, |
| 486 | .pfn = __phys_to_pfn(PXA_CS4_PHYS), | 486 | .pfn = __phys_to_pfn(PXA_CS4_PHYS), |
| 487 | .length = SZ_64M, | 487 | .length = SZ_64M, |
| 488 | .type = MT_DEVICE | 488 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index d2da301619f0..3a7387f93c38 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c | |||
| @@ -775,7 +775,6 @@ static struct gpio cm_x300_wi2wi_gpios[] __initdata = { | |||
| 775 | 775 | ||
| 776 | static void __init cm_x300_init_wi2wi(void) | 776 | static void __init cm_x300_init_wi2wi(void) |
| 777 | { | 777 | { |
| 778 | int bt_reset, wlan_en; | ||
| 779 | int err; | 778 | int err; |
| 780 | 779 | ||
| 781 | if (system_rev < 130) { | 780 | if (system_rev < 130) { |
| @@ -791,12 +790,11 @@ static void __init cm_x300_init_wi2wi(void) | |||
| 791 | } | 790 | } |
| 792 | 791 | ||
| 793 | udelay(10); | 792 | udelay(10); |
| 794 | gpio_set_value(bt_reset, 0); | 793 | gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0); |
| 795 | udelay(10); | 794 | udelay(10); |
| 796 | gpio_set_value(bt_reset, 1); | 795 | gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1); |
| 797 | 796 | ||
| 798 | gpio_free(wlan_en); | 797 | gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); |
| 799 | gpio_free(bt_reset); | ||
| 800 | } | 798 | } |
| 801 | 799 | ||
| 802 | /* MFP */ | 800 | /* MFP */ |
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h index f4c03659168c..bbf9df37ad4b 100644 --- a/arch/arm/mach-pxa/include/mach/addr-map.h +++ b/arch/arm/mach-pxa/include/mach/addr-map.h | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | * Peripheral Bus | 20 | * Peripheral Bus |
| 21 | */ | 21 | */ |
| 22 | #define PERIPH_PHYS 0x40000000 | 22 | #define PERIPH_PHYS 0x40000000 |
| 23 | #define PERIPH_VIRT 0xf2000000 | 23 | #define PERIPH_VIRT IOMEM(0xf2000000) |
| 24 | #define PERIPH_SIZE 0x02000000 | 24 | #define PERIPH_SIZE 0x02000000 |
| 25 | 25 | ||
| 26 | /* | 26 | /* |
| @@ -28,21 +28,21 @@ | |||
| 28 | */ | 28 | */ |
| 29 | #define PXA2XX_SMEMC_PHYS 0x48000000 | 29 | #define PXA2XX_SMEMC_PHYS 0x48000000 |
| 30 | #define PXA3XX_SMEMC_PHYS 0x4a000000 | 30 | #define PXA3XX_SMEMC_PHYS 0x4a000000 |
| 31 | #define SMEMC_VIRT 0xf6000000 | 31 | #define SMEMC_VIRT IOMEM(0xf6000000) |
| 32 | #define SMEMC_SIZE 0x00100000 | 32 | #define SMEMC_SIZE 0x00100000 |
| 33 | 33 | ||
| 34 | /* | 34 | /* |
| 35 | * Dynamic Memory Controller (only on PXA3xx) | 35 | * Dynamic Memory Controller (only on PXA3xx) |
| 36 | */ | 36 | */ |
| 37 | #define DMEMC_PHYS 0x48100000 | 37 | #define DMEMC_PHYS 0x48100000 |
| 38 | #define DMEMC_VIRT 0xf6100000 | 38 | #define DMEMC_VIRT IOMEM(0xf6100000) |
| 39 | #define DMEMC_SIZE 0x00100000 | 39 | #define DMEMC_SIZE 0x00100000 |
| 40 | 40 | ||
| 41 | /* | 41 | /* |
| 42 | * Internal Memory Controller (PXA27x and later) | 42 | * Internal Memory Controller (PXA27x and later) |
| 43 | */ | 43 | */ |
| 44 | #define IMEMC_PHYS 0x58000000 | 44 | #define IMEMC_PHYS 0x58000000 |
| 45 | #define IMEMC_VIRT 0xfe000000 | 45 | #define IMEMC_VIRT IOMEM(0xfe000000) |
| 46 | #define IMEMC_SIZE 0x00100000 | 46 | #define IMEMC_SIZE 0x00100000 |
| 47 | 47 | ||
| 48 | #endif /* __ASM_MACH_ADDR_MAP_H */ | 48 | #endif /* __ASM_MACH_ADDR_MAP_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h index 7074e76146c9..6d7eab3d0867 100644 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/arch/arm/mach-pxa/include/mach/balloon3.h | |||
| @@ -23,7 +23,7 @@ enum balloon3_features { | |||
| 23 | }; | 23 | }; |
| 24 | 24 | ||
| 25 | #define BALLOON3_FPGA_PHYS PXA_CS4_PHYS | 25 | #define BALLOON3_FPGA_PHYS PXA_CS4_PHYS |
| 26 | #define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ | 26 | #define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ |
| 27 | #define BALLOON3_FPGA_LENGTH 0x01000000 | 27 | #define BALLOON3_FPGA_LENGTH 0x01000000 |
| 28 | 28 | ||
| 29 | #define BALLOON3_FPGA_SETnCLR (0x1000) | 29 | #define BALLOON3_FPGA_SETnCLR (0x1000) |
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h index 41b4c93a96c2..576868f8b8c5 100644 --- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h +++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h | |||
| @@ -25,7 +25,7 @@ | |||
| 25 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) | 25 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) |
| 26 | 26 | ||
| 27 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | 27 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
| 28 | #define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) | 28 | #define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) |
| 29 | 29 | ||
| 30 | /* GPIO Pin Level Registers */ | 30 | /* GPIO Pin Level Registers */ |
| 31 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) | 31 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) |
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index de63ca3016b4..8184669dde28 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
| @@ -36,22 +36,23 @@ | |||
| 36 | * Note that not all PXA2xx chips implement all those addresses, and the | 36 | * Note that not all PXA2xx chips implement all those addresses, and the |
| 37 | * kernel only maps the minimum needed range of this mapping. | 37 | * kernel only maps the minimum needed range of this mapping. |
| 38 | */ | 38 | */ |
| 39 | #define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) | ||
| 40 | #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) | 39 | #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) |
| 40 | #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) | ||
| 41 | 41 | ||
| 42 | #ifndef __ASSEMBLY__ | 42 | #ifndef __ASSEMBLY__ |
| 43 | 43 | # define IOMEM(x) ((void __iomem *)(x)) | |
| 44 | # define __REG(x) (*((volatile u32 *)io_p2v(x))) | 44 | # define __REG(x) (*((volatile u32 __iomem *)io_p2v(x))) |
| 45 | 45 | ||
| 46 | /* With indexed regs we don't want to feed the index through io_p2v() | 46 | /* With indexed regs we don't want to feed the index through io_p2v() |
| 47 | especially if it is a variable, otherwise horrible code will result. */ | 47 | especially if it is a variable, otherwise horrible code will result. */ |
| 48 | # define __REG2(x,y) \ | 48 | # define __REG2(x,y) \ |
| 49 | (*(volatile u32 *)((u32)&__REG(x) + (y))) | 49 | (*(volatile u32 __iomem*)((u32)&__REG(x) + (y))) |
| 50 | 50 | ||
| 51 | # define __PREG(x) (io_v2p((u32)&(x))) | 51 | # define __PREG(x) (io_v2p((u32)&(x))) |
| 52 | 52 | ||
| 53 | #else | 53 | #else |
| 54 | 54 | ||
| 55 | # define IOMEM(x) x | ||
| 55 | # define __REG(x) io_p2v(x) | 56 | # define __REG(x) io_p2v(x) |
| 56 | # define __PREG(x) io_v2p(x) | 57 | # define __PREG(x) io_v2p(x) |
| 57 | 58 | ||
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h index cd070092b6eb..4edc712a2de8 100644 --- a/arch/arm/mach-pxa/include/mach/lpd270.h +++ b/arch/arm/mach-pxa/include/mach/lpd270.h | |||
| @@ -13,13 +13,13 @@ | |||
| 13 | #define __ASM_ARCH_LPD270_H | 13 | #define __ASM_ARCH_LPD270_H |
| 14 | 14 | ||
| 15 | #define LPD270_CPLD_PHYS PXA_CS2_PHYS | 15 | #define LPD270_CPLD_PHYS PXA_CS2_PHYS |
| 16 | #define LPD270_CPLD_VIRT 0xf0000000 | 16 | #define LPD270_CPLD_VIRT IOMEM(0xf0000000) |
| 17 | #define LPD270_CPLD_SIZE 0x00100000 | 17 | #define LPD270_CPLD_SIZE 0x00100000 |
| 18 | 18 | ||
| 19 | #define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) | 19 | #define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) |
| 20 | 20 | ||
| 21 | /* CPLD registers */ | 21 | /* CPLD registers */ |
| 22 | #define LPD270_CPLD_REG(x) ((unsigned long)(LPD270_CPLD_VIRT + (x))) | 22 | #define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x)) |
| 23 | #define LPD270_CONTROL LPD270_CPLD_REG(0x00) | 23 | #define LPD270_CONTROL LPD270_CPLD_REG(0x00) |
| 24 | #define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) | 24 | #define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) |
| 25 | #define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) | 25 | #define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) |
diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h index 297387ec3618..990d2bf2fb45 100644 --- a/arch/arm/mach-pxa/include/mach/mtd-xip.h +++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h | |||
| @@ -16,7 +16,6 @@ | |||
| 16 | #define __ARCH_PXA_MTD_XIP_H__ | 16 | #define __ARCH_PXA_MTD_XIP_H__ |
| 17 | 17 | ||
| 18 | #include <mach/regs-ost.h> | 18 | #include <mach/regs-ost.h> |
| 19 | #include <mach/regs-intc.h> | ||
| 20 | 19 | ||
| 21 | #define xip_irqpending() (ICIP & ICMR) | 20 | #define xip_irqpending() (ICIP & ICMR) |
| 22 | 21 | ||
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h index 0a5e5eadebf5..f80bbe246afe 100644 --- a/arch/arm/mach-pxa/include/mach/palm27x.h +++ b/arch/arm/mach-pxa/include/mach/palm27x.h | |||
| @@ -34,7 +34,7 @@ extern struct pxafb_mode_info palm_320x320_new_lcd_mode; | |||
| 34 | extern void __init palm27x_lcd_init(int power, | 34 | extern void __init palm27x_lcd_init(int power, |
| 35 | struct pxafb_mode_info *mode); | 35 | struct pxafb_mode_info *mode); |
| 36 | #else | 36 | #else |
| 37 | static inline void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {} | 37 | #define palm27x_lcd_init(power, mode) do {} while (0) |
| 38 | #endif | 38 | #endif |
| 39 | 39 | ||
| 40 | #if defined(CONFIG_USB_GADGET_PXA27X) || \ | 40 | #if defined(CONFIG_USB_GADGET_PXA27X) || \ |
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h index 10abc4f2e8e4..7074a6ed46c6 100644 --- a/arch/arm/mach-pxa/include/mach/palmtx.h +++ b/arch/arm/mach-pxa/include/mach/palmtx.h | |||
| @@ -71,7 +71,7 @@ | |||
| 71 | 71 | ||
| 72 | /* Various addresses */ | 72 | /* Various addresses */ |
| 73 | #define PALMTX_PCMCIA_PHYS 0x28000000 | 73 | #define PALMTX_PCMCIA_PHYS 0x28000000 |
| 74 | #define PALMTX_PCMCIA_VIRT 0xf0000000 | 74 | #define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) |
| 75 | #define PALMTX_PCMCIA_SIZE 0x100000 | 75 | #define PALMTX_PCMCIA_SIZE 0x100000 |
| 76 | 76 | ||
| 77 | #define PALMTX_PHYS_RAM_START 0xa0000000 | 77 | #define PALMTX_PHYS_RAM_START 0xa0000000 |
| @@ -84,8 +84,8 @@ | |||
| 84 | 84 | ||
| 85 | #define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) | 85 | #define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) |
| 86 | #define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) | 86 | #define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) |
| 87 | #define PALMTX_NAND_ALE_VIRT 0xff100000 | 87 | #define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) |
| 88 | #define PALMTX_NAND_CLE_VIRT 0xff200000 | 88 | #define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) |
| 89 | 89 | ||
| 90 | /* TOUCHSCREEN */ | 90 | /* TOUCHSCREEN */ |
| 91 | #define AC97_LINK_FRAME 21 | 91 | #define AC97_LINK_FRAME 21 |
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index b9b1bdc4bacc..7cff640582b8 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | #ifndef __MACH_PXA27x_H | 1 | #ifndef __MACH_PXA27x_H |
| 2 | #define __MACH_PXA27x_H | 2 | #define __MACH_PXA27x_H |
| 3 | 3 | ||
| 4 | #include <linux/suspend.h> | ||
| 4 | #include <mach/hardware.h> | 5 | #include <mach/hardware.h> |
| 5 | #include <mach/pxa2xx-regs.h> | 6 | #include <mach/pxa2xx-regs.h> |
| 6 | #include <mach/mfp-pxa27x.h> | 7 | #include <mach/mfp-pxa27x.h> |
| @@ -21,6 +22,7 @@ | |||
| 21 | extern void __init pxa27x_map_io(void); | 22 | extern void __init pxa27x_map_io(void); |
| 22 | extern void __init pxa27x_init_irq(void); | 23 | extern void __init pxa27x_init_irq(void); |
| 23 | extern int __init pxa27x_set_pwrmode(unsigned int mode); | 24 | extern int __init pxa27x_set_pwrmode(unsigned int mode); |
| 25 | extern void pxa27x_cpu_pm_enter(suspend_state_t state); | ||
| 24 | 26 | ||
| 25 | #define pxa27x_handle_irq ichp_handle_irq | 27 | #define pxa27x_handle_irq ichp_handle_irq |
| 26 | 28 | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h new file mode 100644 index 000000000000..cbb097c4cb1f --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa95x.h | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | #ifndef __MACH_PXA95X_H | ||
| 2 | #define __MACH_PXA95X_H | ||
| 3 | |||
| 4 | #include <mach/pxa3xx.h> | ||
| 5 | #include <mach/mfp-pxa930.h> | ||
| 6 | |||
| 7 | #endif /* __MACH_PXA95X_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h index 01a45ac48114..486b4c519ae2 100644 --- a/arch/arm/mach-pxa/include/mach/pxafb.h +++ b/arch/arm/mach-pxa/include/mach/pxafb.h | |||
| @@ -158,5 +158,18 @@ struct pxafb_mach_info { | |||
| 158 | void pxa_set_fb_info(struct device *, struct pxafb_mach_info *); | 158 | void pxa_set_fb_info(struct device *, struct pxafb_mach_info *); |
| 159 | unsigned long pxafb_get_hsync_time(struct device *dev); | 159 | unsigned long pxafb_get_hsync_time(struct device *dev); |
| 160 | 160 | ||
| 161 | #ifdef CONFIG_FB_PXA_SMARTPANEL | ||
| 161 | extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); | 162 | extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); |
| 162 | extern int pxafb_smart_flush(struct fb_info *info); | 163 | extern int pxafb_smart_flush(struct fb_info *info); |
| 164 | #else | ||
| 165 | static inline int pxafb_smart_queue(struct fb_info *info, | ||
| 166 | uint16_t *cmds, int n) | ||
| 167 | { | ||
| 168 | return 0; | ||
| 169 | } | ||
| 170 | |||
| 171 | static inline int pxafb_smart_flush(struct fb_info *info) | ||
| 172 | { | ||
| 173 | return 0; | ||
| 174 | } | ||
| 175 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h index 654adc90c9a0..b7de471b273a 100644 --- a/arch/arm/mach-pxa/include/mach/smemc.h +++ b/arch/arm/mach-pxa/include/mach/smemc.h | |||
| @@ -13,7 +13,7 @@ | |||
| 13 | 13 | ||
| 14 | #define PXA2XX_SMEMC_BASE 0x48000000 | 14 | #define PXA2XX_SMEMC_BASE 0x48000000 |
| 15 | #define PXA3XX_SMEMC_BASE 0x4a000000 | 15 | #define PXA3XX_SMEMC_BASE 0x4a000000 |
| 16 | #define SMEMC_VIRT 0xf6000000 | 16 | #define SMEMC_VIRT IOMEM(0xf6000000) |
| 17 | 17 | ||
| 18 | #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */ | 18 | #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */ |
| 19 | #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */ | 19 | #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */ |
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h index 0641f31a56b7..56024f81d57e 100644 --- a/arch/arm/mach-pxa/include/mach/zeus.h +++ b/arch/arm/mach-pxa/include/mach/zeus.h | |||
| @@ -68,7 +68,7 @@ | |||
| 68 | * Be gentle, and remap that over 32kB... | 68 | * Be gentle, and remap that over 32kB... |
| 69 | */ | 69 | */ |
| 70 | 70 | ||
| 71 | #define ZEUS_CPLD (0xf0000000) | 71 | #define ZEUS_CPLD IOMEM(0xf0000000) |
| 72 | #define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) | 72 | #define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) |
| 73 | #define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) | 73 | #define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) |
| 74 | #define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) | 74 | #define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) |
| @@ -76,7 +76,7 @@ | |||
| 76 | /* CPLD register bits */ | 76 | /* CPLD register bits */ |
| 77 | #define ZEUS_CPLD_CONTROL_CF_RST 0x01 | 77 | #define ZEUS_CPLD_CONTROL_CF_RST 0x01 |
| 78 | 78 | ||
| 79 | #define ZEUS_PC104IO (0xf1000000) | 79 | #define ZEUS_PC104IO IOMEM(0xf1000000) |
| 80 | 80 | ||
| 81 | #define ZEUS_SRAM_SIZE (256 * 1024) | 81 | #define ZEUS_SRAM_SIZE (256 * 1024) |
| 82 | 82 | ||
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h index ea24998b923c..ecca976f03d2 100644 --- a/arch/arm/mach-pxa/include/mach/zylonite.h +++ b/arch/arm/mach-pxa/include/mach/zylonite.h | |||
| @@ -19,7 +19,7 @@ extern int wm9713_irq; | |||
| 19 | extern int lcd_id; | 19 | extern int lcd_id; |
| 20 | extern int lcd_orientation; | 20 | extern int lcd_orientation; |
| 21 | 21 | ||
| 22 | #ifdef CONFIG_CPU_PXA300 | 22 | #ifdef CONFIG_MACH_ZYLONITE300 |
| 23 | extern void zylonite_pxa300_init(void); | 23 | extern void zylonite_pxa300_init(void); |
| 24 | #else | 24 | #else |
| 25 | static inline void zylonite_pxa300_init(void) | 25 | static inline void zylonite_pxa300_init(void) |
| @@ -29,7 +29,7 @@ static inline void zylonite_pxa300_init(void) | |||
| 29 | } | 29 | } |
| 30 | #endif | 30 | #endif |
| 31 | 31 | ||
| 32 | #ifdef CONFIG_CPU_PXA320 | 32 | #ifdef CONFIG_MACH_ZYLONITE320 |
| 33 | extern void zylonite_pxa320_init(void); | 33 | extern void zylonite_pxa320_init(void); |
| 34 | #else | 34 | #else |
| 35 | static inline void zylonite_pxa320_init(void) | 35 | static inline void zylonite_pxa320_init(void) |
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 8d9200f92268..532c5d3a97d2 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
| @@ -26,7 +26,7 @@ | |||
| 26 | 26 | ||
| 27 | #include "generic.h" | 27 | #include "generic.h" |
| 28 | 28 | ||
| 29 | #define IRQ_BASE (void __iomem *)io_p2v(0x40d00000) | 29 | #define IRQ_BASE io_p2v(0x40d00000) |
| 30 | 30 | ||
| 31 | #define ICIP (0x000) | 31 | #define ICIP (0x000) |
| 32 | #define ICMR (0x004) | 32 | #define ICMR (0x004) |
| @@ -64,7 +64,7 @@ static inline void __iomem *irq_base(int i) | |||
| 64 | 0x40d00130, | 64 | 0x40d00130, |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | return (void __iomem *)io_p2v(phys_base[i]); | 67 | return io_p2v(phys_base[i]); |
| 68 | } | 68 | } |
| 69 | 69 | ||
| 70 | void pxa_mask_irq(struct irq_data *d) | 70 | void pxa_mask_irq(struct irq_data *d) |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 64540d908958..1dd530279e0b 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
| @@ -479,7 +479,7 @@ static void __init lpd270_init(void) | |||
| 479 | 479 | ||
| 480 | static struct map_desc lpd270_io_desc[] __initdata = { | 480 | static struct map_desc lpd270_io_desc[] __initdata = { |
| 481 | { | 481 | { |
| 482 | .virtual = LPD270_CPLD_VIRT, | 482 | .virtual = (unsigned long)LPD270_CPLD_VIRT, |
| 483 | .pfn = __phys_to_pfn(LPD270_CPLD_PHYS), | 483 | .pfn = __phys_to_pfn(LPD270_CPLD_PHYS), |
| 484 | .length = LPD270_CPLD_SIZE, | 484 | .length = LPD270_CPLD_SIZE, |
| 485 | .type = MT_DEVICE, | 485 | .type = MT_DEVICE, |
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 7346fbfa8101..94e9708b349d 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c | |||
| @@ -423,6 +423,7 @@ static void __init palmphone_common_init(void) | |||
| 423 | palmtreo_leds_init(); | 423 | palmtreo_leds_init(); |
| 424 | } | 424 | } |
| 425 | 425 | ||
| 426 | #ifdef CONFIG_MACH_TREO680 | ||
| 426 | static void __init treo680_init(void) | 427 | static void __init treo680_init(void) |
| 427 | { | 428 | { |
| 428 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); | 429 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); |
| @@ -430,7 +431,9 @@ static void __init treo680_init(void) | |||
| 430 | palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY, | 431 | palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY, |
| 431 | GPIO_NR_TREO680_SD_POWER, 0); | 432 | GPIO_NR_TREO680_SD_POWER, 0); |
| 432 | } | 433 | } |
| 434 | #endif | ||
| 433 | 435 | ||
| 436 | #ifdef CONFIG_MACH_CENTRO | ||
| 434 | static void __init centro_init(void) | 437 | static void __init centro_init(void) |
| 435 | { | 438 | { |
| 436 | pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); | 439 | pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); |
| @@ -438,7 +441,9 @@ static void __init centro_init(void) | |||
| 438 | palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1, | 441 | palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1, |
| 439 | GPIO_NR_CENTRO_SD_POWER, 1); | 442 | GPIO_NR_CENTRO_SD_POWER, 1); |
| 440 | } | 443 | } |
| 444 | #endif | ||
| 441 | 445 | ||
| 446 | #ifdef CONFIG_MACH_TREO680 | ||
| 442 | MACHINE_START(TREO680, "Palm Treo 680") | 447 | MACHINE_START(TREO680, "Palm Treo 680") |
| 443 | .atag_offset = 0x100, | 448 | .atag_offset = 0x100, |
| 444 | .map_io = pxa27x_map_io, | 449 | .map_io = pxa27x_map_io, |
| @@ -448,7 +453,9 @@ MACHINE_START(TREO680, "Palm Treo 680") | |||
| 448 | .timer = &pxa_timer, | 453 | .timer = &pxa_timer, |
| 449 | .init_machine = treo680_init, | 454 | .init_machine = treo680_init, |
| 450 | MACHINE_END | 455 | MACHINE_END |
| 456 | #endif | ||
| 451 | 457 | ||
| 458 | #ifdef CONFIG_MACH_CENTRO | ||
| 452 | MACHINE_START(CENTRO, "Palm Centro 685") | 459 | MACHINE_START(CENTRO, "Palm Centro 685") |
| 453 | .atag_offset = 0x100, | 460 | .atag_offset = 0x100, |
| 454 | .map_io = pxa27x_map_io, | 461 | .map_io = pxa27x_map_io, |
| @@ -458,3 +465,4 @@ MACHINE_START(CENTRO, "Palm Centro 685") | |||
| 458 | .timer = &pxa_timer, | 465 | .timer = &pxa_timer, |
| 459 | .init_machine = centro_init, | 466 | .init_machine = centro_init, |
| 460 | MACHINE_END | 467 | MACHINE_END |
| 468 | #endif | ||
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 2b9e76fc2c90..4e3e45927e95 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
| @@ -247,7 +247,7 @@ static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, | |||
| 247 | unsigned int ctrl) | 247 | unsigned int ctrl) |
| 248 | { | 248 | { |
| 249 | struct nand_chip *this = mtd->priv; | 249 | struct nand_chip *this = mtd->priv; |
| 250 | unsigned long nandaddr = (unsigned long)this->IO_ADDR_W; | 250 | char __iomem *nandaddr = this->IO_ADDR_W; |
| 251 | 251 | ||
| 252 | if (cmd == NAND_CMD_NONE) | 252 | if (cmd == NAND_CMD_NONE) |
| 253 | return; | 253 | return; |
| @@ -315,17 +315,17 @@ static inline void palmtx_nand_init(void) {} | |||
| 315 | ******************************************************************************/ | 315 | ******************************************************************************/ |
| 316 | static struct map_desc palmtx_io_desc[] __initdata = { | 316 | static struct map_desc palmtx_io_desc[] __initdata = { |
| 317 | { | 317 | { |
| 318 | .virtual = PALMTX_PCMCIA_VIRT, | 318 | .virtual = (unsigned long)PALMTX_PCMCIA_VIRT, |
| 319 | .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS), | 319 | .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS), |
| 320 | .length = PALMTX_PCMCIA_SIZE, | 320 | .length = PALMTX_PCMCIA_SIZE, |
| 321 | .type = MT_DEVICE, | 321 | .type = MT_DEVICE, |
| 322 | }, { | 322 | }, { |
| 323 | .virtual = PALMTX_NAND_ALE_VIRT, | 323 | .virtual = (unsigned long)PALMTX_NAND_ALE_VIRT, |
| 324 | .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS), | 324 | .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS), |
| 325 | .length = SZ_1M, | 325 | .length = SZ_1M, |
| 326 | .type = MT_DEVICE, | 326 | .type = MT_DEVICE, |
| 327 | }, { | 327 | }, { |
| 328 | .virtual = PALMTX_NAND_CLE_VIRT, | 328 | .virtual = (unsigned long)PALMTX_NAND_CLE_VIRT, |
| 329 | .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS), | 329 | .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS), |
| 330 | .length = SZ_1M, | 330 | .length = SZ_1M, |
| 331 | .type = MT_DEVICE, | 331 | .type = MT_DEVICE, |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 8746e1090b6e..f05f9486b0cb 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
| @@ -325,7 +325,7 @@ void __init pxa26x_init_irq(void) | |||
| 325 | 325 | ||
| 326 | static struct map_desc pxa25x_io_desc[] __initdata = { | 326 | static struct map_desc pxa25x_io_desc[] __initdata = { |
| 327 | { /* Mem Ctl */ | 327 | { /* Mem Ctl */ |
| 328 | .virtual = SMEMC_VIRT, | 328 | .virtual = (unsigned long)SMEMC_VIRT, |
| 329 | .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), | 329 | .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), |
| 330 | .length = 0x00200000, | 330 | .length = 0x00200000, |
| 331 | .type = MT_DEVICE | 331 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 2bb5cf8ba6ec..bc5a98ebaa72 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
| @@ -391,7 +391,7 @@ void __init pxa27x_init_irq(void) | |||
| 391 | 391 | ||
| 392 | static struct map_desc pxa27x_io_desc[] __initdata = { | 392 | static struct map_desc pxa27x_io_desc[] __initdata = { |
| 393 | { /* Mem Ctl */ | 393 | { /* Mem Ctl */ |
| 394 | .virtual = SMEMC_VIRT, | 394 | .virtual = (unsigned long)SMEMC_VIRT, |
| 395 | .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), | 395 | .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), |
| 396 | .length = 0x00200000, | 396 | .length = 0x00200000, |
| 397 | .type = MT_DEVICE | 397 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c index ce7168b233e2..e28dfb88827f 100644 --- a/arch/arm/mach-pxa/pxa3xx-ulpi.c +++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c | |||
| @@ -265,6 +265,7 @@ int pxa3xx_u2d_start_hc(struct usb_bus *host) | |||
| 265 | 265 | ||
| 266 | return err; | 266 | return err; |
| 267 | } | 267 | } |
| 268 | EXPORT_SYMBOL_GPL(pxa3xx_u2d_start_hc); | ||
| 268 | 269 | ||
| 269 | void pxa3xx_u2d_stop_hc(struct usb_bus *host) | 270 | void pxa3xx_u2d_stop_hc(struct usb_bus *host) |
| 270 | { | 271 | { |
| @@ -277,6 +278,7 @@ void pxa3xx_u2d_stop_hc(struct usb_bus *host) | |||
| 277 | 278 | ||
| 278 | clk_disable(u2d->clk); | 279 | clk_disable(u2d->clk); |
| 279 | } | 280 | } |
| 281 | EXPORT_SYMBOL_GPL(pxa3xx_u2d_stop_hc); | ||
| 280 | 282 | ||
| 281 | static int pxa3xx_u2d_probe(struct platform_device *pdev) | 283 | static int pxa3xx_u2d_probe(struct platform_device *pdev) |
| 282 | { | 284 | { |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index f940a1345531..0737c59b88ae 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
| @@ -393,7 +393,7 @@ void __init pxa3xx_init_irq(void) | |||
| 393 | 393 | ||
| 394 | static struct map_desc pxa3xx_io_desc[] __initdata = { | 394 | static struct map_desc pxa3xx_io_desc[] __initdata = { |
| 395 | { /* Mem Ctl */ | 395 | { /* Mem Ctl */ |
| 396 | .virtual = SMEMC_VIRT, | 396 | .virtual = (unsigned long)SMEMC_VIRT, |
| 397 | .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE), | 397 | .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE), |
| 398 | .length = 0x00200000, | 398 | .length = 0x00200000, |
| 399 | .type = MT_DEVICE | 399 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index 3c988b6f718f..3e999e308a2d 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
| 25 | #include <mach/mfp.h> | 25 | #include <mach/mfp.h> |
| 26 | #include <mach/mfp-pxa930.h> | 26 | #include <mach/mfp-pxa930.h> |
| 27 | #include <mach/pxa95x.h> | ||
| 27 | 28 | ||
| 28 | #include "generic.h" | 29 | #include "generic.h" |
| 29 | 30 | ||
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index 84ed72de53b5..ead32c90fec1 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c | |||
| @@ -686,7 +686,8 @@ static void z2_power_off(void) | |||
| 686 | */ | 686 | */ |
| 687 | PSPR = 0x0; | 687 | PSPR = 0x0; |
| 688 | local_irq_disable(); | 688 | local_irq_disable(); |
| 689 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PHYS_OFFSET - PAGE_OFFSET); | 689 | pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP); |
| 690 | pxa27x_cpu_pm_enter(PM_SUSPEND_MEM); | ||
| 690 | } | 691 | } |
| 691 | #else | 692 | #else |
| 692 | #define z2_power_off NULL | 693 | #define z2_power_off NULL |
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index c424e7d85ce3..498b83b089f3 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
| @@ -860,25 +860,25 @@ static void __init zeus_init(void) | |||
| 860 | 860 | ||
| 861 | static struct map_desc zeus_io_desc[] __initdata = { | 861 | static struct map_desc zeus_io_desc[] __initdata = { |
| 862 | { | 862 | { |
| 863 | .virtual = ZEUS_CPLD_VERSION, | 863 | .virtual = (unsigned long)ZEUS_CPLD_VERSION, |
| 864 | .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS), | 864 | .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS), |
| 865 | .length = 0x1000, | 865 | .length = 0x1000, |
| 866 | .type = MT_DEVICE, | 866 | .type = MT_DEVICE, |
| 867 | }, | 867 | }, |
| 868 | { | 868 | { |
| 869 | .virtual = ZEUS_CPLD_ISA_IRQ, | 869 | .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ, |
| 870 | .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS), | 870 | .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS), |
| 871 | .length = 0x1000, | 871 | .length = 0x1000, |
| 872 | .type = MT_DEVICE, | 872 | .type = MT_DEVICE, |
| 873 | }, | 873 | }, |
| 874 | { | 874 | { |
| 875 | .virtual = ZEUS_CPLD_CONTROL, | 875 | .virtual = (unsigned long)ZEUS_CPLD_CONTROL, |
| 876 | .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS), | 876 | .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS), |
| 877 | .length = 0x1000, | 877 | .length = 0x1000, |
| 878 | .type = MT_DEVICE, | 878 | .type = MT_DEVICE, |
| 879 | }, | 879 | }, |
| 880 | { | 880 | { |
| 881 | .virtual = ZEUS_PC104IO, | 881 | .virtual = (unsigned long)ZEUS_PC104IO, |
| 882 | .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), | 882 | .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), |
| 883 | .length = 0x00800000, | 883 | .length = 0x00800000, |
| 884 | .type = MT_DEVICE, | 884 | .type = MT_DEVICE, |
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 1da23bb87c16..8aa104a4711a 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
| @@ -99,7 +99,27 @@ static void ux500_l2x0_inv_all(void) | |||
| 99 | ux500_cache_sync(); | 99 | ux500_cache_sync(); |
| 100 | } | 100 | } |
| 101 | 101 | ||
| 102 | static int ux500_l2x0_init(void) | 102 | static int __init ux500_l2x0_unlock(void) |
| 103 | { | ||
| 104 | int i; | ||
| 105 | |||
| 106 | /* | ||
| 107 | * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions | ||
| 108 | * apparently locks both caches before jumping to the kernel. The | ||
| 109 | * l2x0 core will not touch the unlock registers if the l2x0 is | ||
| 110 | * already enabled, so we do it right here instead. The PL310 has | ||
| 111 | * 8 sets of registers, one per possible CPU. | ||
| 112 | */ | ||
| 113 | for (i = 0; i < 8; i++) { | ||
| 114 | writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + | ||
| 115 | i * L2X0_LOCKDOWN_STRIDE); | ||
| 116 | writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + | ||
| 117 | i * L2X0_LOCKDOWN_STRIDE); | ||
| 118 | } | ||
| 119 | return 0; | ||
| 120 | } | ||
| 121 | |||
| 122 | static int __init ux500_l2x0_init(void) | ||
| 103 | { | 123 | { |
| 104 | if (cpu_is_u5500()) | 124 | if (cpu_is_u5500()) |
| 105 | l2x0_base = __io_address(U5500_L2CC_BASE); | 125 | l2x0_base = __io_address(U5500_L2CC_BASE); |
| @@ -108,6 +128,9 @@ static int ux500_l2x0_init(void) | |||
| 108 | else | 128 | else |
| 109 | ux500_unknown_soc(); | 129 | ux500_unknown_soc(); |
| 110 | 130 | ||
| 131 | /* Unlock before init */ | ||
| 132 | ux500_l2x0_unlock(); | ||
| 133 | |||
| 111 | /* 64KB way size, 8 way associativity, force WA */ | 134 | /* 64KB way size, 8 way associativity, force WA */ |
| 112 | l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff); | 135 | l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff); |
| 113 | 136 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index ebbce33097a7..45099566fecc 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h | |||
| @@ -89,11 +89,11 @@ typedef u64 iomux_v3_cfg_t; | |||
| 89 | #define PAD_CTL_HYS (1 << 8) | 89 | #define PAD_CTL_HYS (1 << 8) |
| 90 | 90 | ||
| 91 | #define PAD_CTL_PKE (1 << 7) | 91 | #define PAD_CTL_PKE (1 << 7) |
| 92 | #define PAD_CTL_PUE (1 << 6) | 92 | #define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) |
| 93 | #define PAD_CTL_PUS_100K_DOWN (0 << 4) | 93 | #define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) |
| 94 | #define PAD_CTL_PUS_47K_UP (1 << 4) | 94 | #define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) |
| 95 | #define PAD_CTL_PUS_100K_UP (2 << 4) | 95 | #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) |
| 96 | #define PAD_CTL_PUS_22K_UP (3 << 4) | 96 | #define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) |
| 97 | 97 | ||
| 98 | #define PAD_CTL_ODE (1 << 3) | 98 | #define PAD_CTL_ODE (1 << 3) |
| 99 | 99 | ||
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h index 89e68e07b0a8..5c79c29f2833 100644 --- a/arch/arm/plat-pxa/include/plat/mfp.h +++ b/arch/arm/plat-pxa/include/plat/mfp.h | |||
| @@ -456,7 +456,7 @@ struct mfp_addr_map { | |||
| 456 | 456 | ||
| 457 | #define MFP_ADDR_END { MFP_PIN_INVALID, 0 } | 457 | #define MFP_ADDR_END { MFP_PIN_INVALID, 0 } |
| 458 | 458 | ||
| 459 | void __init mfp_init_base(unsigned long mfpr_base); | 459 | void __init mfp_init_base(void __iomem *mfpr_base); |
| 460 | void __init mfp_init_addr(struct mfp_addr_map *map); | 460 | void __init mfp_init_addr(struct mfp_addr_map *map); |
| 461 | 461 | ||
| 462 | /* | 462 | /* |
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c index be12eadcce20..2c4dbb1f4236 100644 --- a/arch/arm/plat-pxa/mfp.c +++ b/arch/arm/plat-pxa/mfp.c | |||
| @@ -229,7 +229,7 @@ void mfp_write(int mfp, unsigned long val) | |||
| 229 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | 229 | spin_unlock_irqrestore(&mfp_spin_lock, flags); |
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | void __init mfp_init_base(unsigned long mfpr_base) | 232 | void __init mfp_init_base(void __iomem *mfpr_base) |
| 233 | { | 233 | { |
| 234 | int i; | 234 | int i; |
| 235 | 235 | ||
| @@ -237,7 +237,7 @@ void __init mfp_init_base(unsigned long mfpr_base) | |||
| 237 | for (i = 0; i < ARRAY_SIZE(mfp_table); i++) | 237 | for (i = 0; i < ARRAY_SIZE(mfp_table); i++) |
| 238 | mfp_table[i].config = -1; | 238 | mfp_table[i].config = -1; |
| 239 | 239 | ||
| 240 | mfpr_mmio_base = (void __iomem *)mfpr_base; | 240 | mfpr_mmio_base = mfpr_base; |
| 241 | } | 241 | } |
| 242 | 242 | ||
| 243 | void __init mfp_init_addr(struct mfp_addr_map *map) | 243 | void __init mfp_init_addr(struct mfp_addr_map *map) |
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 9052925c6fa2..ee137712f9db 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c | |||
| @@ -122,7 +122,7 @@ static int __init pxa_init_gpio_chip(int gpio_end) | |||
| 122 | struct gpio_chip *c = &chips[i].chip; | 122 | struct gpio_chip *c = &chips[i].chip; |
| 123 | 123 | ||
| 124 | sprintf(chips[i].label, "gpio-%d", i); | 124 | sprintf(chips[i].label, "gpio-%d", i); |
| 125 | chips[i].regbase = (void __iomem *)GPIO_BANK(i); | 125 | chips[i].regbase = GPIO_BANK(i); |
| 126 | 126 | ||
| 127 | c->base = gpio; | 127 | c->base = gpio; |
| 128 | c->label = chips[i].label; | 128 | c->label = chips[i].label; |
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 50d5f27f09d0..d593878d66d0 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig | |||
| @@ -63,7 +63,7 @@ config AD525X_DPOT_SPI | |||
| 63 | 63 | ||
| 64 | config ATMEL_PWM | 64 | config ATMEL_PWM |
| 65 | tristate "Atmel AT32/AT91 PWM support" | 65 | tristate "Atmel AT32/AT91 PWM support" |
| 66 | depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 | 66 | depends on HAVE_CLK |
| 67 | help | 67 | help |
| 68 | This option enables device driver support for the PWM channels | 68 | This option enables device driver support for the PWM channels |
| 69 | on certain Atmel processors. Pulse Width Modulation is used for | 69 | on certain Atmel processors. Pulse Width Modulation is used for |
diff --git a/drivers/pcmcia/pxa2xx_balloon3.c b/drivers/pcmcia/pxa2xx_balloon3.c index f56d7de7c751..22a75e610f12 100644 --- a/drivers/pcmcia/pxa2xx_balloon3.c +++ b/drivers/pcmcia/pxa2xx_balloon3.c | |||
| @@ -97,7 +97,7 @@ static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, | |||
| 97 | static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, | 97 | static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, |
| 98 | const socket_state_t *state) | 98 | const socket_state_t *state) |
| 99 | { | 99 | { |
| 100 | __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG | | 100 | __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG + |
| 101 | ((state->flags & SS_RESET) ? | 101 | ((state->flags & SS_RESET) ? |
| 102 | BALLOON3_FPGA_SETnCLR : 0)); | 102 | BALLOON3_FPGA_SETnCLR : 0)); |
| 103 | return 0; | 103 | return 0; |
diff --git a/drivers/video/mbx/mbxfb.c b/drivers/video/mbx/mbxfb.c index afea9abbd678..6ce34160da78 100644 --- a/drivers/video/mbx/mbxfb.c +++ b/drivers/video/mbx/mbxfb.c | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | #include "regs.h" | 34 | #include "regs.h" |
| 35 | #include "reg_bits.h" | 35 | #include "reg_bits.h" |
| 36 | 36 | ||
| 37 | static unsigned long virt_base_2700; | 37 | static void __iomem *virt_base_2700; |
| 38 | 38 | ||
| 39 | #define write_reg(val, reg) do { writel((val), (reg)); } while(0) | 39 | #define write_reg(val, reg) do { writel((val), (reg)); } while(0) |
| 40 | 40 | ||
| @@ -850,7 +850,7 @@ static int mbxfb_suspend(struct platform_device *dev, pm_message_t state) | |||
| 850 | { | 850 | { |
| 851 | /* make frame buffer memory enter self-refresh mode */ | 851 | /* make frame buffer memory enter self-refresh mode */ |
| 852 | write_reg_dly(LMPWR_MC_PWR_SRM, LMPWR); | 852 | write_reg_dly(LMPWR_MC_PWR_SRM, LMPWR); |
| 853 | while (LMPWRSTAT != LMPWRSTAT_MC_PWR_SRM) | 853 | while (readl(LMPWRSTAT) != LMPWRSTAT_MC_PWR_SRM) |
| 854 | ; /* empty statement */ | 854 | ; /* empty statement */ |
| 855 | 855 | ||
| 856 | /* reset the device, since it's initial state is 'mostly sleeping' */ | 856 | /* reset the device, since it's initial state is 'mostly sleeping' */ |
| @@ -946,7 +946,7 @@ static int __devinit mbxfb_probe(struct platform_device *dev) | |||
| 946 | ret = -EINVAL; | 946 | ret = -EINVAL; |
| 947 | goto err3; | 947 | goto err3; |
| 948 | } | 948 | } |
| 949 | virt_base_2700 = (unsigned long)mfbi->reg_virt_addr; | 949 | virt_base_2700 = mfbi->reg_virt_addr; |
| 950 | 950 | ||
| 951 | mfbi->fb_virt_addr = ioremap_nocache(mfbi->fb_phys_addr, | 951 | mfbi->fb_virt_addr = ioremap_nocache(mfbi->fb_phys_addr, |
| 952 | res_size(mfbi->fb_req)); | 952 | res_size(mfbi->fb_req)); |
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index e89778f4081f..1d1e4f175e78 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c | |||
| @@ -1309,16 +1309,6 @@ static int pxafb_smart_init(struct pxafb_info *fbi) | |||
| 1309 | return 0; | 1309 | return 0; |
| 1310 | } | 1310 | } |
| 1311 | #else | 1311 | #else |
| 1312 | int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int n_cmds) | ||
| 1313 | { | ||
| 1314 | return 0; | ||
| 1315 | } | ||
| 1316 | |||
| 1317 | int pxafb_smart_flush(struct fb_info *info) | ||
| 1318 | { | ||
| 1319 | return 0; | ||
| 1320 | } | ||
| 1321 | |||
| 1322 | static inline int pxafb_smart_init(struct pxafb_info *fbi) { return 0; } | 1312 | static inline int pxafb_smart_init(struct pxafb_info *fbi) { return 0; } |
| 1323 | #endif /* CONFIG_FB_PXA_SMARTPANEL */ | 1313 | #endif /* CONFIG_FB_PXA_SMARTPANEL */ |
| 1324 | 1314 | ||
