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-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c6
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 521a09ef4ffe..079951be4122 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -98,7 +98,7 @@ static struct plat_sci_port scif3_platform_data = {
98 .flags = UPF_BOOT_AUTOCONF, 98 .flags = UPF_BOOT_AUTOCONF,
99 .port_reg = SCIx_NOT_SUPPORTED, 99 .port_reg = SCIx_NOT_SUPPORTED,
100 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 100 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
101 .scbrr_algo_id = SCBRR_ALGO_3, 101 .sampling_rate = 8,
102 .type = PORT_SCIFA, 102 .type = PORT_SCIFA,
103}; 103};
104 104
@@ -121,7 +121,7 @@ static struct plat_sci_port scif4_platform_data = {
121 .port_reg = SCIx_NOT_SUPPORTED, 121 .port_reg = SCIx_NOT_SUPPORTED,
122 .flags = UPF_BOOT_AUTOCONF, 122 .flags = UPF_BOOT_AUTOCONF,
123 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 123 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
124 .scbrr_algo_id = SCBRR_ALGO_3, 124 .sampling_rate = 8,
125 .type = PORT_SCIFA, 125 .type = PORT_SCIFA,
126}; 126};
127 127
@@ -144,7 +144,7 @@ static struct plat_sci_port scif5_platform_data = {
144 .port_reg = SCIx_NOT_SUPPORTED, 144 .port_reg = SCIx_NOT_SUPPORTED,
145 .flags = UPF_BOOT_AUTOCONF, 145 .flags = UPF_BOOT_AUTOCONF,
146 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 146 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
147 .scbrr_algo_id = SCBRR_ALGO_3, 147 .sampling_rate = 8,
148 .type = PORT_SCIFA, 148 .type = PORT_SCIFA,
149}; 149};
150 150
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index fb0a23749147..59c359469f13 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -365,7 +365,7 @@ static struct plat_sci_port scif3_platform_data = {
365 .port_reg = SCIx_NOT_SUPPORTED, 365 .port_reg = SCIx_NOT_SUPPORTED,
366 .flags = UPF_BOOT_AUTOCONF, 366 .flags = UPF_BOOT_AUTOCONF,
367 .scscr = SCSCR_RE | SCSCR_TE, 367 .scscr = SCSCR_RE | SCSCR_TE,
368 .scbrr_algo_id = SCBRR_ALGO_3, 368 .sampling_rate = 8,
369 .type = PORT_SCIFA, 369 .type = PORT_SCIFA,
370}; 370};
371 371
@@ -388,7 +388,7 @@ static struct plat_sci_port scif4_platform_data = {
388 .port_reg = SCIx_NOT_SUPPORTED, 388 .port_reg = SCIx_NOT_SUPPORTED,
389 .flags = UPF_BOOT_AUTOCONF, 389 .flags = UPF_BOOT_AUTOCONF,
390 .scscr = SCSCR_RE | SCSCR_TE, 390 .scscr = SCSCR_RE | SCSCR_TE,
391 .scbrr_algo_id = SCBRR_ALGO_3, 391 .sampling_rate = 8,
392 .type = PORT_SCIFA, 392 .type = PORT_SCIFA,
393}; 393};
394 394
@@ -411,7 +411,7 @@ static struct plat_sci_port scif5_platform_data = {
411 .port_reg = SCIx_NOT_SUPPORTED, 411 .port_reg = SCIx_NOT_SUPPORTED,
412 .flags = UPF_BOOT_AUTOCONF, 412 .flags = UPF_BOOT_AUTOCONF,
413 .scscr = SCSCR_RE | SCSCR_TE, 413 .scscr = SCSCR_RE | SCSCR_TE,
414 .scbrr_algo_id = SCBRR_ALGO_3, 414 .sampling_rate = 8,
415 .type = PORT_SCIFA, 415 .type = PORT_SCIFA,
416}; 416};
417 417