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-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi4
-rw-r--r--arch/arm/mach-imx/clk-imx25.c2
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c3
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h1
-rw-r--r--arch/arm/plat-samsung/clock.c10
10 files changed, 33 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 66389c1c6f62..7c95f76398de 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -104,6 +104,7 @@
104 #gpio-cells = <2>; 104 #gpio-cells = <2>;
105 gpio-controller; 105 gpio-controller;
106 interrupt-controller; 106 interrupt-controller;
107 #interrupt-cells = <2>;
107 }; 108 };
108 109
109 pioB: gpio@fffff600 { 110 pioB: gpio@fffff600 {
@@ -113,6 +114,7 @@
113 #gpio-cells = <2>; 114 #gpio-cells = <2>;
114 gpio-controller; 115 gpio-controller;
115 interrupt-controller; 116 interrupt-controller;
117 #interrupt-cells = <2>;
116 }; 118 };
117 119
118 pioC: gpio@fffff800 { 120 pioC: gpio@fffff800 {
@@ -122,6 +124,7 @@
122 #gpio-cells = <2>; 124 #gpio-cells = <2>;
123 gpio-controller; 125 gpio-controller;
124 interrupt-controller; 126 interrupt-controller;
127 #interrupt-cells = <2>;
125 }; 128 };
126 129
127 dbgu: serial@fffff200 { 130 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index b460d6ce9eb5..195019b7ca0e 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -95,6 +95,7 @@
95 #gpio-cells = <2>; 95 #gpio-cells = <2>;
96 gpio-controller; 96 gpio-controller;
97 interrupt-controller; 97 interrupt-controller;
98 #interrupt-cells = <2>;
98 }; 99 };
99 100
100 pioB: gpio@fffff400 { 101 pioB: gpio@fffff400 {
@@ -104,6 +105,7 @@
104 #gpio-cells = <2>; 105 #gpio-cells = <2>;
105 gpio-controller; 106 gpio-controller;
106 interrupt-controller; 107 interrupt-controller;
108 #interrupt-cells = <2>;
107 }; 109 };
108 110
109 pioC: gpio@fffff600 { 111 pioC: gpio@fffff600 {
@@ -113,6 +115,7 @@
113 #gpio-cells = <2>; 115 #gpio-cells = <2>;
114 gpio-controller; 116 gpio-controller;
115 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
116 }; 119 };
117 120
118 pioD: gpio@fffff800 { 121 pioD: gpio@fffff800 {
@@ -122,6 +125,7 @@
122 #gpio-cells = <2>; 125 #gpio-cells = <2>;
123 gpio-controller; 126 gpio-controller;
124 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
125 }; 129 };
126 130
127 pioE: gpio@fffffa00 { 131 pioE: gpio@fffffa00 {
@@ -131,6 +135,7 @@
131 #gpio-cells = <2>; 135 #gpio-cells = <2>;
132 gpio-controller; 136 gpio-controller;
133 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <2>;
134 }; 139 };
135 140
136 dbgu: serial@ffffee00 { 141 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index bafa8806fc17..63751b1e744b 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -113,6 +113,7 @@
113 #gpio-cells = <2>; 113 #gpio-cells = <2>;
114 gpio-controller; 114 gpio-controller;
115 interrupt-controller; 115 interrupt-controller;
116 #interrupt-cells = <2>;
116 }; 117 };
117 118
118 pioB: gpio@fffff400 { 119 pioB: gpio@fffff400 {
@@ -122,6 +123,7 @@
122 #gpio-cells = <2>; 123 #gpio-cells = <2>;
123 gpio-controller; 124 gpio-controller;
124 interrupt-controller; 125 interrupt-controller;
126 #interrupt-cells = <2>;
125 }; 127 };
126 128
127 pioC: gpio@fffff600 { 129 pioC: gpio@fffff600 {
@@ -131,6 +133,7 @@
131 #gpio-cells = <2>; 133 #gpio-cells = <2>;
132 gpio-controller; 134 gpio-controller;
133 interrupt-controller; 135 interrupt-controller;
136 #interrupt-cells = <2>;
134 }; 137 };
135 138
136 pioD: gpio@fffff800 { 139 pioD: gpio@fffff800 {
@@ -140,6 +143,7 @@
140 #gpio-cells = <2>; 143 #gpio-cells = <2>;
141 gpio-controller; 144 gpio-controller;
142 interrupt-controller; 145 interrupt-controller;
146 #interrupt-cells = <2>;
143 }; 147 };
144 148
145 pioE: gpio@fffffa00 { 149 pioE: gpio@fffffa00 {
@@ -149,6 +153,7 @@
149 #gpio-cells = <2>; 153 #gpio-cells = <2>;
150 gpio-controller; 154 gpio-controller;
151 interrupt-controller; 155 interrupt-controller;
156 #interrupt-cells = <2>;
152 }; 157 };
153 158
154 dbgu: serial@ffffee00 { 159 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index bfac0dfc332c..ef9336ae9614 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -107,6 +107,7 @@
107 #gpio-cells = <2>; 107 #gpio-cells = <2>;
108 gpio-controller; 108 gpio-controller;
109 interrupt-controller; 109 interrupt-controller;
110 #interrupt-cells = <2>;
110 }; 111 };
111 112
112 pioB: gpio@fffff600 { 113 pioB: gpio@fffff600 {
@@ -116,6 +117,7 @@
116 #gpio-cells = <2>; 117 #gpio-cells = <2>;
117 gpio-controller; 118 gpio-controller;
118 interrupt-controller; 119 interrupt-controller;
120 #interrupt-cells = <2>;
119 }; 121 };
120 122
121 pioC: gpio@fffff800 { 123 pioC: gpio@fffff800 {
@@ -125,6 +127,7 @@
125 #gpio-cells = <2>; 127 #gpio-cells = <2>;
126 gpio-controller; 128 gpio-controller;
127 interrupt-controller; 129 interrupt-controller;
130 #interrupt-cells = <2>;
128 }; 131 };
129 132
130 pioD: gpio@fffffa00 { 133 pioD: gpio@fffffa00 {
@@ -134,6 +137,7 @@
134 #gpio-cells = <2>; 137 #gpio-cells = <2>;
135 gpio-controller; 138 gpio-controller;
136 interrupt-controller; 139 interrupt-controller;
140 #interrupt-cells = <2>;
137 }; 141 };
138 142
139 dbgu: serial@fffff200 { 143 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 4a18c393b136..8a387a8d61b7 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -115,6 +115,7 @@
115 #gpio-cells = <2>; 115 #gpio-cells = <2>;
116 gpio-controller; 116 gpio-controller;
117 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
118 }; 119 };
119 120
120 pioB: gpio@fffff600 { 121 pioB: gpio@fffff600 {
@@ -124,6 +125,7 @@
124 #gpio-cells = <2>; 125 #gpio-cells = <2>;
125 gpio-controller; 126 gpio-controller;
126 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
127 }; 129 };
128 130
129 pioC: gpio@fffff800 { 131 pioC: gpio@fffff800 {
@@ -133,6 +135,7 @@
133 #gpio-cells = <2>; 135 #gpio-cells = <2>;
134 gpio-controller; 136 gpio-controller;
135 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <2>;
136 }; 139 };
137 140
138 pioD: gpio@fffffa00 { 141 pioD: gpio@fffffa00 {
@@ -142,6 +145,7 @@
142 #gpio-cells = <2>; 145 #gpio-cells = <2>;
143 gpio-controller; 146 gpio-controller;
144 interrupt-controller; 147 interrupt-controller;
148 #interrupt-cells = <2>;
145 }; 149 };
146 150
147 dbgu: serial@fffff200 { 151 dbgu: serial@fffff200 {
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 4431a62fff5b..d20d4795f4ea 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -241,6 +241,6 @@ int __init mx25_clocks_init(void)
241 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); 241 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
242 clk_register_clkdev(clk[iim_ipg], "iim", NULL); 242 clk_register_clkdev(clk[iim_ipg], "iim", NULL);
243 243
244 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 244 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
245 return 0; 245 return 0;
246} 246}
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 2c6ab3273f9e..5985ed1b8c98 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info); 526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
527 527
528 /* set NAND page size to 2k if not configured via boot mode pins */ 528 /* set NAND page size to 2k if not configured via boot mode pins */
529 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); 529 __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
530 (1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
530 531
531 /* RTC */ 532 /* RTC */
532 /* Get RTC IRQ and register the chip */ 533 /* Get RTC IRQ and register the chip */
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea92c32c..3b8a0171c3cb 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = {
346 .flags = IORESOURCE_MEM, 346 .flags = IORESOURCE_MEM,
347 }, 347 },
348 [1] = { 348 [1] = {
349 .start = gic_spi(141), 349 .start = gic_spi(140),
350 .flags = IORESOURCE_IRQ, 350 .flags = IORESOURCE_IRQ,
351 }, 351 },
352 [2] = { 352 [2] = {
353 .start = gic_spi(140), 353 .start = gic_spi(141),
354 .flags = IORESOURCE_IRQ, 354 .flags = IORESOURCE_IRQ,
355 }, 355 },
356}; 356};
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 627d94f1b010..ec466400a200 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -98,6 +98,7 @@
98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45) 98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51) 99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52) 100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
101#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
101#define MX25_INT_FEC (NR_IRQS_LEGACY + 57) 102#define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
102 103
103#define MX25_DMA_REQ_SSI2_RX1 22 104#define MX25_DMA_REQ_SSI2_RX1 22
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 65c5eca475e7..d1116e2dfbea 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
144 144
145int clk_set_rate(struct clk *clk, unsigned long rate) 145int clk_set_rate(struct clk *clk, unsigned long rate)
146{ 146{
147 unsigned long flags;
147 int ret; 148 int ret;
148 149
149 if (IS_ERR(clk)) 150 if (IS_ERR(clk))
@@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
159 if (clk->ops == NULL || clk->ops->set_rate == NULL) 160 if (clk->ops == NULL || clk->ops->set_rate == NULL)
160 return -EINVAL; 161 return -EINVAL;
161 162
162 spin_lock(&clocks_lock); 163 spin_lock_irqsave(&clocks_lock, flags);
163 ret = (clk->ops->set_rate)(clk, rate); 164 ret = (clk->ops->set_rate)(clk, rate);
164 spin_unlock(&clocks_lock); 165 spin_unlock_irqrestore(&clocks_lock, flags);
165 166
166 return ret; 167 return ret;
167} 168}
@@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk)
173 174
174int clk_set_parent(struct clk *clk, struct clk *parent) 175int clk_set_parent(struct clk *clk, struct clk *parent)
175{ 176{
177 unsigned long flags;
176 int ret = 0; 178 int ret = 0;
177 179
178 if (IS_ERR(clk)) 180 if (IS_ERR(clk))
179 return -EINVAL; 181 return -EINVAL;
180 182
181 spin_lock(&clocks_lock); 183 spin_lock_irqsave(&clocks_lock, flags);
182 184
183 if (clk->ops && clk->ops->set_parent) 185 if (clk->ops && clk->ops->set_parent)
184 ret = (clk->ops->set_parent)(clk, parent); 186 ret = (clk->ops->set_parent)(clk, parent);
185 187
186 spin_unlock(&clocks_lock); 188 spin_unlock_irqrestore(&clocks_lock, flags);
187 189
188 return ret; 190 return ret;
189} 191}
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-26 14:25:18 -0500