diff options
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca9.dts | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index a411274e8b6b..d949facba376 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts | |||
| @@ -33,28 +33,28 @@ | |||
| 33 | #address-cells = <1>; | 33 | #address-cells = <1>; |
| 34 | #size-cells = <0>; | 34 | #size-cells = <0>; |
| 35 | 35 | ||
| 36 | cpu@0 { | 36 | A9_0: cpu@0 { |
| 37 | device_type = "cpu"; | 37 | device_type = "cpu"; |
| 38 | compatible = "arm,cortex-a9"; | 38 | compatible = "arm,cortex-a9"; |
| 39 | reg = <0>; | 39 | reg = <0>; |
| 40 | next-level-cache = <&L2>; | 40 | next-level-cache = <&L2>; |
| 41 | }; | 41 | }; |
| 42 | 42 | ||
| 43 | cpu@1 { | 43 | A9_1: cpu@1 { |
| 44 | device_type = "cpu"; | 44 | device_type = "cpu"; |
| 45 | compatible = "arm,cortex-a9"; | 45 | compatible = "arm,cortex-a9"; |
| 46 | reg = <1>; | 46 | reg = <1>; |
| 47 | next-level-cache = <&L2>; | 47 | next-level-cache = <&L2>; |
| 48 | }; | 48 | }; |
| 49 | 49 | ||
| 50 | cpu@2 { | 50 | A9_2: cpu@2 { |
| 51 | device_type = "cpu"; | 51 | device_type = "cpu"; |
| 52 | compatible = "arm,cortex-a9"; | 52 | compatible = "arm,cortex-a9"; |
| 53 | reg = <2>; | 53 | reg = <2>; |
| 54 | next-level-cache = <&L2>; | 54 | next-level-cache = <&L2>; |
| 55 | }; | 55 | }; |
| 56 | 56 | ||
| 57 | cpu@3 { | 57 | A9_3: cpu@3 { |
| 58 | device_type = "cpu"; | 58 | device_type = "cpu"; |
| 59 | compatible = "arm,cortex-a9"; | 59 | compatible = "arm,cortex-a9"; |
| 60 | reg = <3>; | 60 | reg = <3>; |
| @@ -182,6 +182,8 @@ | |||
| 182 | <0 61 4>, | 182 | <0 61 4>, |
| 183 | <0 62 4>, | 183 | <0 62 4>, |
| 184 | <0 63 4>; | 184 | <0 63 4>; |
| 185 | interrupt-affinity = <&A9_0>, <&A9_1>, <&A9_2>, <&A9_3>; | ||
| 186 | |||
| 185 | }; | 187 | }; |
| 186 | 188 | ||
| 187 | dcc { | 189 | dcc { |
