diff options
-rw-r--r-- | drivers/gpu/drm/radeon/atombios.h | 127 |
1 files changed, 115 insertions, 12 deletions
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h index af10f8571d87..92be50c39ffd 100644 --- a/drivers/gpu/drm/radeon/atombios.h +++ b/drivers/gpu/drm/radeon/atombios.h | |||
@@ -1711,7 +1711,9 @@ typedef struct _PIXEL_CLOCK_PARAMETERS_V6 | |||
1711 | #define PIXEL_CLOCK_V6_MISC_HDMI_BPP_MASK 0x0c | 1711 | #define PIXEL_CLOCK_V6_MISC_HDMI_BPP_MASK 0x0c |
1712 | #define PIXEL_CLOCK_V6_MISC_HDMI_24BPP 0x00 | 1712 | #define PIXEL_CLOCK_V6_MISC_HDMI_24BPP 0x00 |
1713 | #define PIXEL_CLOCK_V6_MISC_HDMI_36BPP 0x04 | 1713 | #define PIXEL_CLOCK_V6_MISC_HDMI_36BPP 0x04 |
1714 | #define PIXEL_CLOCK_V6_MISC_HDMI_36BPP_V6 0x08 //for V6, the correct defintion for 36bpp should be 2 for 36bpp(2:1) | ||
1714 | #define PIXEL_CLOCK_V6_MISC_HDMI_30BPP 0x08 | 1715 | #define PIXEL_CLOCK_V6_MISC_HDMI_30BPP 0x08 |
1716 | #define PIXEL_CLOCK_V6_MISC_HDMI_30BPP_V6 0x04 //for V6, the correct defintion for 30bpp should be 1 for 36bpp(5:4) | ||
1715 | #define PIXEL_CLOCK_V6_MISC_HDMI_48BPP 0x0c | 1717 | #define PIXEL_CLOCK_V6_MISC_HDMI_48BPP 0x0c |
1716 | #define PIXEL_CLOCK_V6_MISC_REF_DIV_SRC 0x10 | 1718 | #define PIXEL_CLOCK_V6_MISC_REF_DIV_SRC 0x10 |
1717 | #define PIXEL_CLOCK_V6_MISC_GEN_DPREFCLK 0x40 | 1719 | #define PIXEL_CLOCK_V6_MISC_GEN_DPREFCLK 0x40 |
@@ -2223,7 +2225,7 @@ typedef struct _SET_VOLTAGE_PARAMETERS_V2 | |||
2223 | USHORT usVoltageLevel; // real voltage level | 2225 | USHORT usVoltageLevel; // real voltage level |
2224 | }SET_VOLTAGE_PARAMETERS_V2; | 2226 | }SET_VOLTAGE_PARAMETERS_V2; |
2225 | 2227 | ||
2226 | 2228 | // used by both SetVoltageTable v1.3 and v1.4 | |
2227 | typedef struct _SET_VOLTAGE_PARAMETERS_V1_3 | 2229 | typedef struct _SET_VOLTAGE_PARAMETERS_V1_3 |
2228 | { | 2230 | { |
2229 | UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI | 2231 | UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI |
@@ -2290,15 +2292,36 @@ typedef struct _GET_LEAKAGE_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_1 | |||
2290 | #define ATOM_GET_VOLTAGE_VID 0x00 | 2292 | #define ATOM_GET_VOLTAGE_VID 0x00 |
2291 | #define ATOM_GET_VOTLAGE_INIT_SEQ 0x03 | 2293 | #define ATOM_GET_VOTLAGE_INIT_SEQ 0x03 |
2292 | #define ATOM_GET_VOLTTAGE_PHASE_PHASE_VID 0x04 | 2294 | #define ATOM_GET_VOLTTAGE_PHASE_PHASE_VID 0x04 |
2293 | // for SI, this state map to 0xff02 voltage state in Power Play table, which is power boost state | 2295 | #define ATOM_GET_VOLTAGE_SVID2 0x07 //Get SVI2 Regulator Info |
2294 | #define ATOM_GET_VOLTAGE_STATE0_LEAKAGE_VID 0x10 | ||
2295 | 2296 | ||
2297 | // for SI, this state map to 0xff02 voltage state in Power Play table, which is power boost state | ||
2298 | #define ATOM_GET_VOLTAGE_STATE0_LEAKAGE_VID 0x10 | ||
2296 | // for SI, this state map to 0xff01 voltage state in Power Play table, which is performance state | 2299 | // for SI, this state map to 0xff01 voltage state in Power Play table, which is performance state |
2297 | #define ATOM_GET_VOLTAGE_STATE1_LEAKAGE_VID 0x11 | 2300 | #define ATOM_GET_VOLTAGE_STATE1_LEAKAGE_VID 0x11 |
2298 | // undefined power state | 2301 | |
2299 | #define ATOM_GET_VOLTAGE_STATE2_LEAKAGE_VID 0x12 | 2302 | #define ATOM_GET_VOLTAGE_STATE2_LEAKAGE_VID 0x12 |
2300 | #define ATOM_GET_VOLTAGE_STATE3_LEAKAGE_VID 0x13 | 2303 | #define ATOM_GET_VOLTAGE_STATE3_LEAKAGE_VID 0x13 |
2301 | 2304 | ||
2305 | // New Added from CI Hawaii for GetVoltageInfoTable, input parameter structure | ||
2306 | typedef struct _GET_VOLTAGE_INFO_INPUT_PARAMETER_V1_2 | ||
2307 | { | ||
2308 | UCHAR ucVoltageType; // Input: To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI | ||
2309 | UCHAR ucVoltageMode; // Input: Indicate action: Get voltage info | ||
2310 | USHORT usVoltageLevel; // Input: real voltage level in unit of mv or Voltage Phase (0, 1, 2, .. ) or Leakage Id | ||
2311 | ULONG ulSCLKFreq; // Input: when ucVoltageMode= ATOM_GET_VOLTAGE_EVV_VOLTAGE, DPM state SCLK frequency, Define in PPTable SCLK/Voltage dependence table | ||
2312 | }GET_VOLTAGE_INFO_INPUT_PARAMETER_V1_2; | ||
2313 | |||
2314 | // New in GetVoltageInfo v1.2 ucVoltageMode | ||
2315 | #define ATOM_GET_VOLTAGE_EVV_VOLTAGE 0x09 | ||
2316 | |||
2317 | // New Added from CI Hawaii for EVV feature | ||
2318 | typedef struct _GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_2 | ||
2319 | { | ||
2320 | USHORT usVoltageLevel; // real voltage level in unit of mv | ||
2321 | USHORT usVoltageId; // Voltage Id programmed in Voltage Regulator | ||
2322 | ULONG ulReseved; | ||
2323 | }GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_2; | ||
2324 | |||
2302 | /****************************************************************************/ | 2325 | /****************************************************************************/ |
2303 | // Structures used by TVEncoderControlTable | 2326 | // Structures used by TVEncoderControlTable |
2304 | /****************************************************************************/ | 2327 | /****************************************************************************/ |
@@ -3864,6 +3887,8 @@ typedef struct _ATOM_GPIO_PIN_ASSIGNMENT | |||
3864 | #define PP_AC_DC_SWITCH_GPIO_PINID 60 | 3887 | #define PP_AC_DC_SWITCH_GPIO_PINID 60 |
3865 | //from SMU7.x, if ucGPIO_ID=VDDC_REGULATOR_VRHOT_GPIO_PINID in GPIO_LUTable, VRHot feature is enable | 3888 | //from SMU7.x, if ucGPIO_ID=VDDC_REGULATOR_VRHOT_GPIO_PINID in GPIO_LUTable, VRHot feature is enable |
3866 | #define VDDC_VRHOT_GPIO_PINID 61 | 3889 | #define VDDC_VRHOT_GPIO_PINID 61 |
3890 | //if ucGPIO_ID=VDDC_PCC_GPIO_PINID in GPIO_LUTable, Peak Current Control feature is enabled | ||
3891 | #define VDDC_PCC_GPIO_PINID 62 | ||
3867 | 3892 | ||
3868 | typedef struct _ATOM_GPIO_PIN_LUT | 3893 | typedef struct _ATOM_GPIO_PIN_LUT |
3869 | { | 3894 | { |
@@ -4169,10 +4194,10 @@ typedef struct _ATOM_COMMON_RECORD_HEADER | |||
4169 | #define ATOM_OBJECT_LINK_RECORD_TYPE 18 //Once this record is present under one object, it indicats the oobject is linked to another obj described by the record | 4194 | #define ATOM_OBJECT_LINK_RECORD_TYPE 18 //Once this record is present under one object, it indicats the oobject is linked to another obj described by the record |
4170 | #define ATOM_CONNECTOR_REMOTE_CAP_RECORD_TYPE 19 | 4195 | #define ATOM_CONNECTOR_REMOTE_CAP_RECORD_TYPE 19 |
4171 | #define ATOM_ENCODER_CAP_RECORD_TYPE 20 | 4196 | #define ATOM_ENCODER_CAP_RECORD_TYPE 20 |
4172 | 4197 | #define ATOM_BRACKET_LAYOUT_RECORD_TYPE 21 | |
4173 | 4198 | ||
4174 | //Must be updated when new record type is added,equal to that record definition! | 4199 | //Must be updated when new record type is added,equal to that record definition! |
4175 | #define ATOM_MAX_OBJECT_RECORD_NUMBER ATOM_ENCODER_CAP_RECORD_TYPE | 4200 | #define ATOM_MAX_OBJECT_RECORD_NUMBER ATOM_BRACKET_LAYOUT_RECORD_TYPE |
4176 | 4201 | ||
4177 | typedef struct _ATOM_I2C_RECORD | 4202 | typedef struct _ATOM_I2C_RECORD |
4178 | { | 4203 | { |
@@ -4397,6 +4422,31 @@ typedef struct _ATOM_CONNECTOR_REMOTE_CAP_RECORD | |||
4397 | USHORT usReserved; | 4422 | USHORT usReserved; |
4398 | }ATOM_CONNECTOR_REMOTE_CAP_RECORD; | 4423 | }ATOM_CONNECTOR_REMOTE_CAP_RECORD; |
4399 | 4424 | ||
4425 | typedef struct _ATOM_CONNECTOR_LAYOUT_INFO | ||
4426 | { | ||
4427 | USHORT usConnectorObjectId; | ||
4428 | UCHAR ucConnectorType; | ||
4429 | UCHAR ucPosition; | ||
4430 | }ATOM_CONNECTOR_LAYOUT_INFO; | ||
4431 | |||
4432 | // define ATOM_CONNECTOR_LAYOUT_INFO.ucConnectorType to describe the display connector size | ||
4433 | #define CONNECTOR_TYPE_DVI_D 1 | ||
4434 | #define CONNECTOR_TYPE_DVI_I 2 | ||
4435 | #define CONNECTOR_TYPE_VGA 3 | ||
4436 | #define CONNECTOR_TYPE_HDMI 4 | ||
4437 | #define CONNECTOR_TYPE_DISPLAY_PORT 5 | ||
4438 | #define CONNECTOR_TYPE_MINI_DISPLAY_PORT 6 | ||
4439 | |||
4440 | typedef struct _ATOM_BRACKET_LAYOUT_RECORD | ||
4441 | { | ||
4442 | ATOM_COMMON_RECORD_HEADER sheader; | ||
4443 | UCHAR ucLength; | ||
4444 | UCHAR ucWidth; | ||
4445 | UCHAR ucConnNum; | ||
4446 | UCHAR ucReserved; | ||
4447 | ATOM_CONNECTOR_LAYOUT_INFO asConnInfo[1]; | ||
4448 | }ATOM_BRACKET_LAYOUT_RECORD; | ||
4449 | |||
4400 | /****************************************************************************/ | 4450 | /****************************************************************************/ |
4401 | // ASIC voltage data table | 4451 | // ASIC voltage data table |
4402 | /****************************************************************************/ | 4452 | /****************************************************************************/ |
@@ -4524,8 +4574,9 @@ typedef struct _ATOM_VOLTAGE_OBJECT_HEADER_V3{ | |||
4524 | #define VOLTAGE_OBJ_VR_I2C_INIT_SEQ 3 //VOLTAGE REGULATOR INIT sequece through I2C -> ATOM_I2C_VOLTAGE_OBJECT_V3 | 4574 | #define VOLTAGE_OBJ_VR_I2C_INIT_SEQ 3 //VOLTAGE REGULATOR INIT sequece through I2C -> ATOM_I2C_VOLTAGE_OBJECT_V3 |
4525 | #define VOLTAGE_OBJ_PHASE_LUT 4 //Set Vregulator Phase lookup table ->ATOM_GPIO_VOLTAGE_OBJECT_V3 | 4575 | #define VOLTAGE_OBJ_PHASE_LUT 4 //Set Vregulator Phase lookup table ->ATOM_GPIO_VOLTAGE_OBJECT_V3 |
4526 | #define VOLTAGE_OBJ_SVID2 7 //Indicate voltage control by SVID2 ->ATOM_SVID2_VOLTAGE_OBJECT_V3 | 4576 | #define VOLTAGE_OBJ_SVID2 7 //Indicate voltage control by SVID2 ->ATOM_SVID2_VOLTAGE_OBJECT_V3 |
4527 | #define VOLTAGE_OBJ_PWRBOOST_LEAKAGE_LUT 0x10 //Powerboost Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 | 4577 | #define VOLTAGE_OBJ_EVV 8 |
4528 | #define VOLTAGE_OBJ_HIGH_STATE_LEAKAGE_LUT 0x11 //High voltage state Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 | 4578 | #define VOLTAGE_OBJ_PWRBOOST_LEAKAGE_LUT 0x10 //Powerboost Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 |
4579 | #define VOLTAGE_OBJ_HIGH_STATE_LEAKAGE_LUT 0x11 //High voltage state Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 | ||
4529 | #define VOLTAGE_OBJ_HIGH1_STATE_LEAKAGE_LUT 0x12 //High1 voltage state Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 | 4580 | #define VOLTAGE_OBJ_HIGH1_STATE_LEAKAGE_LUT 0x12 //High1 voltage state Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 |
4530 | 4581 | ||
4531 | typedef struct _VOLTAGE_LUT_ENTRY_V2 | 4582 | typedef struct _VOLTAGE_LUT_ENTRY_V2 |
@@ -4552,6 +4603,10 @@ typedef struct _ATOM_I2C_VOLTAGE_OBJECT_V3 | |||
4552 | VOLTAGE_LUT_ENTRY asVolI2cLut[1]; // end with 0xff | 4603 | VOLTAGE_LUT_ENTRY asVolI2cLut[1]; // end with 0xff |
4553 | }ATOM_I2C_VOLTAGE_OBJECT_V3; | 4604 | }ATOM_I2C_VOLTAGE_OBJECT_V3; |
4554 | 4605 | ||
4606 | // ATOM_I2C_VOLTAGE_OBJECT_V3.ucVoltageControlFlag | ||
4607 | #define VOLTAGE_DATA_ONE_BYTE 0 | ||
4608 | #define VOLTAGE_DATA_TWO_BYTE 1 | ||
4609 | |||
4555 | typedef struct _ATOM_GPIO_VOLTAGE_OBJECT_V3 | 4610 | typedef struct _ATOM_GPIO_VOLTAGE_OBJECT_V3 |
4556 | { | 4611 | { |
4557 | ATOM_VOLTAGE_OBJECT_HEADER_V3 sHeader; // voltage mode = VOLTAGE_OBJ_GPIO_LUT or VOLTAGE_OBJ_PHASE_LUT | 4612 | ATOM_VOLTAGE_OBJECT_HEADER_V3 sHeader; // voltage mode = VOLTAGE_OBJ_GPIO_LUT or VOLTAGE_OBJ_PHASE_LUT |
@@ -4584,7 +4639,8 @@ typedef struct _ATOM_SVID2_VOLTAGE_OBJECT_V3 | |||
4584 | // 1:0 offset trim, | 4639 | // 1:0 offset trim, |
4585 | USHORT usLoadLine_PSI; | 4640 | USHORT usLoadLine_PSI; |
4586 | // GPU GPIO pin Id to SVID2 regulator VRHot pin. possible value 0~31. 0 means GPIO0, 31 means GPIO31 | 4641 | // GPU GPIO pin Id to SVID2 regulator VRHot pin. possible value 0~31. 0 means GPIO0, 31 means GPIO31 |
4587 | UCHAR ucReserved[2]; | 4642 | UCHAR ucSVDGpioId; //0~31 indicate GPIO0~31 |
4643 | UCHAR ucSVCGpioId; //0~31 indicate GPIO0~31 | ||
4588 | ULONG ulReserved; | 4644 | ULONG ulReserved; |
4589 | }ATOM_SVID2_VOLTAGE_OBJECT_V3; | 4645 | }ATOM_SVID2_VOLTAGE_OBJECT_V3; |
4590 | 4646 | ||
@@ -4637,6 +4693,49 @@ typedef struct _ATOM_ASIC_PROFILING_INFO_V2_1 | |||
4637 | USHORT usElbVDDCI_LevelArrayOffset; // offset of 2 dimension voltage level USHORT array | 4693 | USHORT usElbVDDCI_LevelArrayOffset; // offset of 2 dimension voltage level USHORT array |
4638 | }ATOM_ASIC_PROFILING_INFO_V2_1; | 4694 | }ATOM_ASIC_PROFILING_INFO_V2_1; |
4639 | 4695 | ||
4696 | typedef struct _ATOM_ASIC_PROFILING_INFO_V3_1 | ||
4697 | { | ||
4698 | ATOM_COMMON_TABLE_HEADER asHeader; | ||
4699 | ULONG ulEvvDerateTdp; | ||
4700 | ULONG ulEvvDerateTdc; | ||
4701 | ULONG ulBoardCoreTemp; | ||
4702 | ULONG ulMaxVddc; | ||
4703 | ULONG ulMinVddc; | ||
4704 | ULONG ulLoadLineSlop; | ||
4705 | ULONG ulLeakageTemp; | ||
4706 | ULONG ulLeakageVoltage; | ||
4707 | ULONG ulCACmEncodeRange; | ||
4708 | ULONG ulCACmEncodeAverage; | ||
4709 | ULONG ulCACbEncodeRange; | ||
4710 | ULONG ulCACbEncodeAverage; | ||
4711 | ULONG ulKt_bEncodeRange; | ||
4712 | ULONG ulKt_bEncodeAverage; | ||
4713 | ULONG ulKv_mEncodeRange; | ||
4714 | ULONG ulKv_mEncodeAverage; | ||
4715 | ULONG ulKv_bEncodeRange; | ||
4716 | ULONG ulKv_bEncodeAverage; | ||
4717 | ULONG ulLkgEncodeLn_MaxDivMin; | ||
4718 | ULONG ulLkgEncodeMin; | ||
4719 | ULONG ulEfuseLogisticAlpha; | ||
4720 | USHORT usPowerDpm0; | ||
4721 | USHORT usCurrentDpm0; | ||
4722 | USHORT usPowerDpm1; | ||
4723 | USHORT usCurrentDpm1; | ||
4724 | USHORT usPowerDpm2; | ||
4725 | USHORT usCurrentDpm2; | ||
4726 | USHORT usPowerDpm3; | ||
4727 | USHORT usCurrentDpm3; | ||
4728 | USHORT usPowerDpm4; | ||
4729 | USHORT usCurrentDpm4; | ||
4730 | USHORT usPowerDpm5; | ||
4731 | USHORT usCurrentDpm5; | ||
4732 | USHORT usPowerDpm6; | ||
4733 | USHORT usCurrentDpm6; | ||
4734 | USHORT usPowerDpm7; | ||
4735 | USHORT usCurrentDpm7; | ||
4736 | }ATOM_ASIC_PROFILING_INFO_V3_1; | ||
4737 | |||
4738 | |||
4640 | typedef struct _ATOM_POWER_SOURCE_OBJECT | 4739 | typedef struct _ATOM_POWER_SOURCE_OBJECT |
4641 | { | 4740 | { |
4642 | UCHAR ucPwrSrcId; // Power source | 4741 | UCHAR ucPwrSrcId; // Power source |
@@ -5808,6 +5907,8 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO_V3 | |||
5808 | #define ATOM_S7_DOS_MODE_PIXEL_DEPTHb0 0x0C | 5907 | #define ATOM_S7_DOS_MODE_PIXEL_DEPTHb0 0x0C |
5809 | #define ATOM_S7_DOS_MODE_PIXEL_FORMATb0 0xF0 | 5908 | #define ATOM_S7_DOS_MODE_PIXEL_FORMATb0 0xF0 |
5810 | #define ATOM_S7_DOS_8BIT_DAC_ENb1 0x01 | 5909 | #define ATOM_S7_DOS_8BIT_DAC_ENb1 0x01 |
5910 | #define ATOM_S7_ASIC_INIT_COMPLETEb1 0x02 | ||
5911 | #define ATOM_S7_ASIC_INIT_COMPLETE_MASK 0x00000200 | ||
5811 | #define ATOM_S7_DOS_MODE_NUMBERw1 0x0FFFF | 5912 | #define ATOM_S7_DOS_MODE_NUMBERw1 0x0FFFF |
5812 | 5913 | ||
5813 | #define ATOM_S7_DOS_8BIT_DAC_EN_SHIFT 8 | 5914 | #define ATOM_S7_DOS_8BIT_DAC_EN_SHIFT 8 |
@@ -6242,6 +6343,7 @@ typedef struct _ATOM_MC_INIT_PARAM_TABLE | |||
6242 | #define _128Mx32 0x53 | 6343 | #define _128Mx32 0x53 |
6243 | #define _256Mx8 0x61 | 6344 | #define _256Mx8 0x61 |
6244 | #define _256Mx16 0x62 | 6345 | #define _256Mx16 0x62 |
6346 | #define _512Mx8 0x71 | ||
6245 | 6347 | ||
6246 | #define SAMSUNG 0x1 | 6348 | #define SAMSUNG 0x1 |
6247 | #define INFINEON 0x2 | 6349 | #define INFINEON 0x2 |
@@ -6987,9 +7089,10 @@ typedef struct _ATOM_DISP_OUT_INFO_V3 | |||
6987 | UCHAR ucMaxDispEngineNum; | 7089 | UCHAR ucMaxDispEngineNum; |
6988 | UCHAR ucMaxActiveDispEngineNum; | 7090 | UCHAR ucMaxActiveDispEngineNum; |
6989 | UCHAR ucMaxPPLLNum; | 7091 | UCHAR ucMaxPPLLNum; |
6990 | UCHAR ucCoreRefClkSource; // value of CORE_REF_CLK_SOURCE | 7092 | UCHAR ucCoreRefClkSource; // value of CORE_REF_CLK_SOURCE |
6991 | UCHAR ucReserved[3]; | 7093 | UCHAR ucDispCaps; |
6992 | ASIC_TRANSMITTER_INFO_V2 asTransmitterInfo[1]; // for alligment only | 7094 | UCHAR ucReserved[2]; |
7095 | ASIC_TRANSMITTER_INFO_V2 asTransmitterInfo[1]; // for alligment only | ||
6993 | }ATOM_DISP_OUT_INFO_V3; | 7096 | }ATOM_DISP_OUT_INFO_V3; |
6994 | 7097 | ||
6995 | //ucDispCaps | 7098 | //ucDispCaps |