diff options
| -rw-r--r-- | arch/arm/mach-mvebu/irq-armada-370-xp.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c index 6a9195e10579..d5970f5a1e8d 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c | |||
| @@ -61,7 +61,6 @@ static struct irq_domain *armada_370_xp_mpic_domain; | |||
| 61 | */ | 61 | */ |
| 62 | static void armada_370_xp_irq_mask(struct irq_data *d) | 62 | static void armada_370_xp_irq_mask(struct irq_data *d) |
| 63 | { | 63 | { |
| 64 | #ifdef CONFIG_SMP | ||
| 65 | irq_hw_number_t hwirq = irqd_to_hwirq(d); | 64 | irq_hw_number_t hwirq = irqd_to_hwirq(d); |
| 66 | 65 | ||
| 67 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) | 66 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
| @@ -70,15 +69,10 @@ static void armada_370_xp_irq_mask(struct irq_data *d) | |||
| 70 | else | 69 | else |
| 71 | writel(hwirq, per_cpu_int_base + | 70 | writel(hwirq, per_cpu_int_base + |
| 72 | ARMADA_370_XP_INT_SET_MASK_OFFS); | 71 | ARMADA_370_XP_INT_SET_MASK_OFFS); |
| 73 | #else | ||
| 74 | writel(irqd_to_hwirq(d), | ||
| 75 | per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS); | ||
| 76 | #endif | ||
| 77 | } | 72 | } |
| 78 | 73 | ||
| 79 | static void armada_370_xp_irq_unmask(struct irq_data *d) | 74 | static void armada_370_xp_irq_unmask(struct irq_data *d) |
| 80 | { | 75 | { |
| 81 | #ifdef CONFIG_SMP | ||
| 82 | irq_hw_number_t hwirq = irqd_to_hwirq(d); | 76 | irq_hw_number_t hwirq = irqd_to_hwirq(d); |
| 83 | 77 | ||
| 84 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) | 78 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
| @@ -87,10 +81,6 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) | |||
| 87 | else | 81 | else |
| 88 | writel(hwirq, per_cpu_int_base + | 82 | writel(hwirq, per_cpu_int_base + |
| 89 | ARMADA_370_XP_INT_CLEAR_MASK_OFFS); | 83 | ARMADA_370_XP_INT_CLEAR_MASK_OFFS); |
| 90 | #else | ||
| 91 | writel(irqd_to_hwirq(d), | ||
| 92 | per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); | ||
| 93 | #endif | ||
| 94 | } | 84 | } |
| 95 | 85 | ||
| 96 | #ifdef CONFIG_SMP | 86 | #ifdef CONFIG_SMP |
| @@ -146,7 +136,11 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, | |||
| 146 | unsigned int virq, irq_hw_number_t hw) | 136 | unsigned int virq, irq_hw_number_t hw) |
| 147 | { | 137 | { |
| 148 | armada_370_xp_irq_mask(irq_get_irq_data(virq)); | 138 | armada_370_xp_irq_mask(irq_get_irq_data(virq)); |
| 149 | writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); | 139 | if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
| 140 | writel(hw, per_cpu_int_base + | ||
| 141 | ARMADA_370_XP_INT_CLEAR_MASK_OFFS); | ||
| 142 | else | ||
| 143 | writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); | ||
| 150 | irq_set_status_flags(virq, IRQ_LEVEL); | 144 | irq_set_status_flags(virq, IRQ_LEVEL); |
| 151 | 145 | ||
| 152 | if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) { | 146 | if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) { |
