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-rw-r--r--arch/arm/mach-s5pv210/gpiolib.c6
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h6
2 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 0d459112d039..29dfb894d4f4 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -150,6 +150,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
150 .label = "GPG3", 150 .label = "GPG3",
151 }, 151 },
152 }, { 152 }, {
153 .config = &gpio_cfg_noint,
153 .chip = { 154 .chip = {
154 .base = S5PV210_GPI(0), 155 .base = S5PV210_GPI(0),
155 .ngpio = S5PV210_GPIO_I_NR, 156 .ngpio = S5PV210_GPIO_I_NR,
@@ -259,11 +260,14 @@ static __init int s5pv210_gpiolib_init(void)
259{ 260{
260 struct s3c_gpio_chip *chip = s5pv210_gpio_4bit; 261 struct s3c_gpio_chip *chip = s5pv210_gpio_4bit;
261 int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit); 262 int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit);
263 int gpioint_group = 0;
262 int i = 0; 264 int i = 0;
263 265
264 for (i = 0; i < nr_chips; i++, chip++) { 266 for (i = 0; i < nr_chips; i++, chip++) {
265 if (chip->config == NULL) 267 if (chip->config == NULL) {
266 chip->config = &gpio_cfg; 268 chip->config = &gpio_cfg;
269 chip->group = gpioint_group++;
270 }
267 if (chip->base == NULL) 271 if (chip->base == NULL)
268 chip->base = S5PV210_BANK_BASE(i); 272 chip->base = S5PV210_BANK_BASE(i);
269 } 273 }
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index cdb8ae415124..bb7f277c1fa3 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -121,8 +121,12 @@
121#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) 121#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
122#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) 122#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
123 123
124/* GPIO interrupt */
125#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
126#define S5P_GPIOINT_GROUP_MAXNR 22
127
124/* Set the default NR_IRQS */ 128/* Set the default NR_IRQS */
125#define NR_IRQS (IRQ_EINT(31) + 1) 129#define NR_IRQS (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
126 130
127/* Compatibility */ 131/* Compatibility */
128#define IRQ_LCD_FIFO IRQ_LCD0 132#define IRQ_LCD_FIFO IRQ_LCD0