diff options
| -rw-r--r-- | drivers/spi/spi-tegra20-slink.c | 97 |
1 files changed, 40 insertions, 57 deletions
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index e66715ba37ed..3ce1de8872f0 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c | |||
| @@ -196,7 +196,7 @@ struct tegra_slink_data { | |||
| 196 | u32 rx_status; | 196 | u32 rx_status; |
| 197 | u32 status_reg; | 197 | u32 status_reg; |
| 198 | bool is_packed; | 198 | bool is_packed; |
| 199 | unsigned long packed_size; | 199 | u32 packed_size; |
| 200 | 200 | ||
| 201 | u32 command_reg; | 201 | u32 command_reg; |
| 202 | u32 command2_reg; | 202 | u32 command2_reg; |
| @@ -220,14 +220,14 @@ struct tegra_slink_data { | |||
| 220 | static int tegra_slink_runtime_suspend(struct device *dev); | 220 | static int tegra_slink_runtime_suspend(struct device *dev); |
| 221 | static int tegra_slink_runtime_resume(struct device *dev); | 221 | static int tegra_slink_runtime_resume(struct device *dev); |
| 222 | 222 | ||
| 223 | static inline unsigned long tegra_slink_readl(struct tegra_slink_data *tspi, | 223 | static inline u32 tegra_slink_readl(struct tegra_slink_data *tspi, |
| 224 | unsigned long reg) | 224 | unsigned long reg) |
| 225 | { | 225 | { |
| 226 | return readl(tspi->base + reg); | 226 | return readl(tspi->base + reg); |
| 227 | } | 227 | } |
| 228 | 228 | ||
| 229 | static inline void tegra_slink_writel(struct tegra_slink_data *tspi, | 229 | static inline void tegra_slink_writel(struct tegra_slink_data *tspi, |
| 230 | unsigned long val, unsigned long reg) | 230 | u32 val, unsigned long reg) |
| 231 | { | 231 | { |
| 232 | writel(val, tspi->base + reg); | 232 | writel(val, tspi->base + reg); |
| 233 | 233 | ||
| @@ -238,38 +238,30 @@ static inline void tegra_slink_writel(struct tegra_slink_data *tspi, | |||
| 238 | 238 | ||
| 239 | static void tegra_slink_clear_status(struct tegra_slink_data *tspi) | 239 | static void tegra_slink_clear_status(struct tegra_slink_data *tspi) |
| 240 | { | 240 | { |
| 241 | unsigned long val; | 241 | u32 val_write; |
| 242 | unsigned long val_write = 0; | ||
| 243 | 242 | ||
| 244 | val = tegra_slink_readl(tspi, SLINK_STATUS); | 243 | tegra_slink_readl(tspi, SLINK_STATUS); |
| 245 | 244 | ||
| 246 | /* Write 1 to clear status register */ | 245 | /* Write 1 to clear status register */ |
| 247 | val_write = SLINK_RDY | SLINK_FIFO_ERROR; | 246 | val_write = SLINK_RDY | SLINK_FIFO_ERROR; |
| 248 | tegra_slink_writel(tspi, val_write, SLINK_STATUS); | 247 | tegra_slink_writel(tspi, val_write, SLINK_STATUS); |
| 249 | } | 248 | } |
| 250 | 249 | ||
| 251 | static unsigned long tegra_slink_get_packed_size(struct tegra_slink_data *tspi, | 250 | static u32 tegra_slink_get_packed_size(struct tegra_slink_data *tspi, |
| 252 | struct spi_transfer *t) | 251 | struct spi_transfer *t) |
| 253 | { | 252 | { |
| 254 | unsigned long val; | ||
| 255 | |||
| 256 | switch (tspi->bytes_per_word) { | 253 | switch (tspi->bytes_per_word) { |
| 257 | case 0: | 254 | case 0: |
| 258 | val = SLINK_PACK_SIZE_4; | 255 | return SLINK_PACK_SIZE_4; |
| 259 | break; | ||
| 260 | case 1: | 256 | case 1: |
| 261 | val = SLINK_PACK_SIZE_8; | 257 | return SLINK_PACK_SIZE_8; |
| 262 | break; | ||
| 263 | case 2: | 258 | case 2: |
| 264 | val = SLINK_PACK_SIZE_16; | 259 | return SLINK_PACK_SIZE_16; |
| 265 | break; | ||
| 266 | case 4: | 260 | case 4: |
| 267 | val = SLINK_PACK_SIZE_32; | 261 | return SLINK_PACK_SIZE_32; |
| 268 | break; | ||
| 269 | default: | 262 | default: |
| 270 | val = 0; | 263 | return 0; |
| 271 | } | 264 | } |
| 272 | return val; | ||
| 273 | } | 265 | } |
| 274 | 266 | ||
| 275 | static unsigned tegra_slink_calculate_curr_xfer_param( | 267 | static unsigned tegra_slink_calculate_curr_xfer_param( |
| @@ -312,10 +304,9 @@ static unsigned tegra_slink_fill_tx_fifo_from_client_txbuf( | |||
| 312 | { | 304 | { |
| 313 | unsigned nbytes; | 305 | unsigned nbytes; |
| 314 | unsigned tx_empty_count; | 306 | unsigned tx_empty_count; |
| 315 | unsigned long fifo_status; | 307 | u32 fifo_status; |
| 316 | unsigned max_n_32bit; | 308 | unsigned max_n_32bit; |
| 317 | unsigned i, count; | 309 | unsigned i, count; |
| 318 | unsigned long x; | ||
| 319 | unsigned int written_words; | 310 | unsigned int written_words; |
| 320 | unsigned fifo_words_left; | 311 | unsigned fifo_words_left; |
| 321 | u8 *tx_buf = (u8 *)t->tx_buf + tspi->cur_tx_pos; | 312 | u8 *tx_buf = (u8 *)t->tx_buf + tspi->cur_tx_pos; |
| @@ -329,9 +320,9 @@ static unsigned tegra_slink_fill_tx_fifo_from_client_txbuf( | |||
| 329 | nbytes = written_words * tspi->bytes_per_word; | 320 | nbytes = written_words * tspi->bytes_per_word; |
| 330 | max_n_32bit = DIV_ROUND_UP(nbytes, 4); | 321 | max_n_32bit = DIV_ROUND_UP(nbytes, 4); |
| 331 | for (count = 0; count < max_n_32bit; count++) { | 322 | for (count = 0; count < max_n_32bit; count++) { |
| 332 | x = 0; | 323 | u32 x = 0; |
| 333 | for (i = 0; (i < 4) && nbytes; i++, nbytes--) | 324 | for (i = 0; (i < 4) && nbytes; i++, nbytes--) |
| 334 | x |= (*tx_buf++) << (i*8); | 325 | x |= (u32)(*tx_buf++) << (i * 8); |
| 335 | tegra_slink_writel(tspi, x, SLINK_TX_FIFO); | 326 | tegra_slink_writel(tspi, x, SLINK_TX_FIFO); |
| 336 | } | 327 | } |
| 337 | } else { | 328 | } else { |
| @@ -339,10 +330,10 @@ static unsigned tegra_slink_fill_tx_fifo_from_client_txbuf( | |||
| 339 | written_words = max_n_32bit; | 330 | written_words = max_n_32bit; |
| 340 | nbytes = written_words * tspi->bytes_per_word; | 331 | nbytes = written_words * tspi->bytes_per_word; |
| 341 | for (count = 0; count < max_n_32bit; count++) { | 332 | for (count = 0; count < max_n_32bit; count++) { |
| 342 | x = 0; | 333 | u32 x = 0; |
| 343 | for (i = 0; nbytes && (i < tspi->bytes_per_word); | 334 | for (i = 0; nbytes && (i < tspi->bytes_per_word); |
| 344 | i++, nbytes--) | 335 | i++, nbytes--) |
| 345 | x |= ((*tx_buf++) << i*8); | 336 | x |= (u32)(*tx_buf++) << (i * 8); |
| 346 | tegra_slink_writel(tspi, x, SLINK_TX_FIFO); | 337 | tegra_slink_writel(tspi, x, SLINK_TX_FIFO); |
| 347 | } | 338 | } |
| 348 | } | 339 | } |
| @@ -354,9 +345,8 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf( | |||
| 354 | struct tegra_slink_data *tspi, struct spi_transfer *t) | 345 | struct tegra_slink_data *tspi, struct spi_transfer *t) |
| 355 | { | 346 | { |
| 356 | unsigned rx_full_count; | 347 | unsigned rx_full_count; |
| 357 | unsigned long fifo_status; | 348 | u32 fifo_status; |
| 358 | unsigned i, count; | 349 | unsigned i, count; |
| 359 | unsigned long x; | ||
| 360 | unsigned int read_words = 0; | 350 | unsigned int read_words = 0; |
| 361 | unsigned len; | 351 | unsigned len; |
| 362 | u8 *rx_buf = (u8 *)t->rx_buf + tspi->cur_rx_pos; | 352 | u8 *rx_buf = (u8 *)t->rx_buf + tspi->cur_rx_pos; |
| @@ -366,7 +356,7 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf( | |||
| 366 | if (tspi->is_packed) { | 356 | if (tspi->is_packed) { |
| 367 | len = tspi->curr_dma_words * tspi->bytes_per_word; | 357 | len = tspi->curr_dma_words * tspi->bytes_per_word; |
| 368 | for (count = 0; count < rx_full_count; count++) { | 358 | for (count = 0; count < rx_full_count; count++) { |
| 369 | x = tegra_slink_readl(tspi, SLINK_RX_FIFO); | 359 | u32 x = tegra_slink_readl(tspi, SLINK_RX_FIFO); |
| 370 | for (i = 0; len && (i < 4); i++, len--) | 360 | for (i = 0; len && (i < 4); i++, len--) |
| 371 | *rx_buf++ = (x >> i*8) & 0xFF; | 361 | *rx_buf++ = (x >> i*8) & 0xFF; |
| 372 | } | 362 | } |
| @@ -374,7 +364,7 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf( | |||
| 374 | read_words += tspi->curr_dma_words; | 364 | read_words += tspi->curr_dma_words; |
| 375 | } else { | 365 | } else { |
| 376 | for (count = 0; count < rx_full_count; count++) { | 366 | for (count = 0; count < rx_full_count; count++) { |
| 377 | x = tegra_slink_readl(tspi, SLINK_RX_FIFO); | 367 | u32 x = tegra_slink_readl(tspi, SLINK_RX_FIFO); |
| 378 | for (i = 0; (i < tspi->bytes_per_word); i++) | 368 | for (i = 0; (i < tspi->bytes_per_word); i++) |
| 379 | *rx_buf++ = (x >> (i*8)) & 0xFF; | 369 | *rx_buf++ = (x >> (i*8)) & 0xFF; |
| 380 | } | 370 | } |
| @@ -387,27 +377,24 @@ static unsigned int tegra_slink_read_rx_fifo_to_client_rxbuf( | |||
| 387 | static void tegra_slink_copy_client_txbuf_to_spi_txbuf( | 377 | static void tegra_slink_copy_client_txbuf_to_spi_txbuf( |
| 388 | struct tegra_slink_data *tspi, struct spi_transfer *t) | 378 | struct tegra_slink_data *tspi, struct spi_transfer *t) |
| 389 | { | 379 | { |
| 390 | unsigned len; | ||
| 391 | |||
| 392 | /* Make the dma buffer to read by cpu */ | 380 | /* Make the dma buffer to read by cpu */ |
| 393 | dma_sync_single_for_cpu(tspi->dev, tspi->tx_dma_phys, | 381 | dma_sync_single_for_cpu(tspi->dev, tspi->tx_dma_phys, |
| 394 | tspi->dma_buf_size, DMA_TO_DEVICE); | 382 | tspi->dma_buf_size, DMA_TO_DEVICE); |
| 395 | 383 | ||
| 396 | if (tspi->is_packed) { | 384 | if (tspi->is_packed) { |
| 397 | len = tspi->curr_dma_words * tspi->bytes_per_word; | 385 | unsigned len = tspi->curr_dma_words * tspi->bytes_per_word; |
| 398 | memcpy(tspi->tx_dma_buf, t->tx_buf + tspi->cur_pos, len); | 386 | memcpy(tspi->tx_dma_buf, t->tx_buf + tspi->cur_pos, len); |
| 399 | } else { | 387 | } else { |
| 400 | unsigned int i; | 388 | unsigned int i; |
| 401 | unsigned int count; | 389 | unsigned int count; |
| 402 | u8 *tx_buf = (u8 *)t->tx_buf + tspi->cur_tx_pos; | 390 | u8 *tx_buf = (u8 *)t->tx_buf + tspi->cur_tx_pos; |
| 403 | unsigned consume = tspi->curr_dma_words * tspi->bytes_per_word; | 391 | unsigned consume = tspi->curr_dma_words * tspi->bytes_per_word; |
| 404 | unsigned int x; | ||
| 405 | 392 | ||
| 406 | for (count = 0; count < tspi->curr_dma_words; count++) { | 393 | for (count = 0; count < tspi->curr_dma_words; count++) { |
| 407 | x = 0; | 394 | u32 x = 0; |
| 408 | for (i = 0; consume && (i < tspi->bytes_per_word); | 395 | for (i = 0; consume && (i < tspi->bytes_per_word); |
| 409 | i++, consume--) | 396 | i++, consume--) |
| 410 | x |= ((*tx_buf++) << i * 8); | 397 | x |= (u32)(*tx_buf++) << (i * 8); |
| 411 | tspi->tx_dma_buf[count] = x; | 398 | tspi->tx_dma_buf[count] = x; |
| 412 | } | 399 | } |
| 413 | } | 400 | } |
| @@ -434,14 +421,10 @@ static void tegra_slink_copy_spi_rxbuf_to_client_rxbuf( | |||
| 434 | unsigned int i; | 421 | unsigned int i; |
| 435 | unsigned int count; | 422 | unsigned int count; |
| 436 | unsigned char *rx_buf = t->rx_buf + tspi->cur_rx_pos; | 423 | unsigned char *rx_buf = t->rx_buf + tspi->cur_rx_pos; |
| 437 | unsigned int x; | 424 | u32 rx_mask = ((u32)1 << t->bits_per_word) - 1; |
| 438 | unsigned int rx_mask, bits_per_word; | ||
| 439 | 425 | ||
| 440 | bits_per_word = t->bits_per_word; | ||
| 441 | rx_mask = (1 << bits_per_word) - 1; | ||
| 442 | for (count = 0; count < tspi->curr_dma_words; count++) { | 426 | for (count = 0; count < tspi->curr_dma_words; count++) { |
| 443 | x = tspi->rx_dma_buf[count]; | 427 | u32 x = tspi->rx_dma_buf[count] & rx_mask; |
| 444 | x &= rx_mask; | ||
| 445 | for (i = 0; (i < tspi->bytes_per_word); i++) | 428 | for (i = 0; (i < tspi->bytes_per_word); i++) |
| 446 | *rx_buf++ = (x >> (i*8)) & 0xFF; | 429 | *rx_buf++ = (x >> (i*8)) & 0xFF; |
| 447 | } | 430 | } |
| @@ -501,17 +484,16 @@ static int tegra_slink_start_rx_dma(struct tegra_slink_data *tspi, int len) | |||
| 501 | static int tegra_slink_start_dma_based_transfer( | 484 | static int tegra_slink_start_dma_based_transfer( |
| 502 | struct tegra_slink_data *tspi, struct spi_transfer *t) | 485 | struct tegra_slink_data *tspi, struct spi_transfer *t) |
| 503 | { | 486 | { |
| 504 | unsigned long val; | 487 | u32 val; |
| 505 | unsigned long test_val; | ||
| 506 | unsigned int len; | 488 | unsigned int len; |
| 507 | int ret = 0; | 489 | int ret = 0; |
| 508 | unsigned long status; | 490 | u32 status; |
| 509 | 491 | ||
| 510 | /* Make sure that Rx and Tx fifo are empty */ | 492 | /* Make sure that Rx and Tx fifo are empty */ |
| 511 | status = tegra_slink_readl(tspi, SLINK_STATUS); | 493 | status = tegra_slink_readl(tspi, SLINK_STATUS); |
| 512 | if ((status & SLINK_FIFO_EMPTY) != SLINK_FIFO_EMPTY) { | 494 | if ((status & SLINK_FIFO_EMPTY) != SLINK_FIFO_EMPTY) { |
| 513 | dev_err(tspi->dev, | 495 | dev_err(tspi->dev, "Rx/Tx fifo are not empty status 0x%08x\n", |
| 514 | "Rx/Tx fifo are not empty status 0x%08lx\n", status); | 496 | (unsigned)status); |
| 515 | return -EIO; | 497 | return -EIO; |
| 516 | } | 498 | } |
| 517 | 499 | ||
| @@ -551,9 +533,9 @@ static int tegra_slink_start_dma_based_transfer( | |||
| 551 | } | 533 | } |
| 552 | 534 | ||
| 553 | /* Wait for tx fifo to be fill before starting slink */ | 535 | /* Wait for tx fifo to be fill before starting slink */ |
| 554 | test_val = tegra_slink_readl(tspi, SLINK_STATUS); | 536 | status = tegra_slink_readl(tspi, SLINK_STATUS); |
| 555 | while (!(test_val & SLINK_TX_FULL)) | 537 | while (!(status & SLINK_TX_FULL)) |
| 556 | test_val = tegra_slink_readl(tspi, SLINK_STATUS); | 538 | status = tegra_slink_readl(tspi, SLINK_STATUS); |
| 557 | } | 539 | } |
| 558 | 540 | ||
| 559 | if (tspi->cur_direction & DATA_DIR_RX) { | 541 | if (tspi->cur_direction & DATA_DIR_RX) { |
| @@ -587,7 +569,7 @@ static int tegra_slink_start_dma_based_transfer( | |||
| 587 | static int tegra_slink_start_cpu_based_transfer( | 569 | static int tegra_slink_start_cpu_based_transfer( |
| 588 | struct tegra_slink_data *tspi, struct spi_transfer *t) | 570 | struct tegra_slink_data *tspi, struct spi_transfer *t) |
| 589 | { | 571 | { |
| 590 | unsigned long val; | 572 | u32 val; |
| 591 | unsigned cur_words; | 573 | unsigned cur_words; |
| 592 | 574 | ||
| 593 | val = tspi->packed_size; | 575 | val = tspi->packed_size; |
| @@ -714,8 +696,8 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi, | |||
| 714 | u8 bits_per_word; | 696 | u8 bits_per_word; |
| 715 | unsigned total_fifo_words; | 697 | unsigned total_fifo_words; |
| 716 | int ret; | 698 | int ret; |
| 717 | unsigned long command; | 699 | u32 command; |
| 718 | unsigned long command2; | 700 | u32 command2; |
| 719 | 701 | ||
| 720 | bits_per_word = t->bits_per_word; | 702 | bits_per_word = t->bits_per_word; |
| 721 | speed = t->speed_hz; | 703 | speed = t->speed_hz; |
| @@ -762,17 +744,18 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi, | |||
| 762 | 744 | ||
| 763 | static int tegra_slink_setup(struct spi_device *spi) | 745 | static int tegra_slink_setup(struct spi_device *spi) |
| 764 | { | 746 | { |
| 765 | struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master); | 747 | static const u32 cs_pol_bit[MAX_CHIP_SELECT] = { |
| 766 | unsigned long val; | ||
| 767 | unsigned long flags; | ||
| 768 | int ret; | ||
| 769 | unsigned int cs_pol_bit[MAX_CHIP_SELECT] = { | ||
| 770 | SLINK_CS_POLARITY, | 748 | SLINK_CS_POLARITY, |
| 771 | SLINK_CS_POLARITY1, | 749 | SLINK_CS_POLARITY1, |
| 772 | SLINK_CS_POLARITY2, | 750 | SLINK_CS_POLARITY2, |
| 773 | SLINK_CS_POLARITY3, | 751 | SLINK_CS_POLARITY3, |
| 774 | }; | 752 | }; |
| 775 | 753 | ||
| 754 | struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master); | ||
| 755 | u32 val; | ||
| 756 | unsigned long flags; | ||
| 757 | int ret; | ||
| 758 | |||
| 776 | dev_dbg(&spi->dev, "setup %d bpw, %scpol, %scpha, %dHz\n", | 759 | dev_dbg(&spi->dev, "setup %d bpw, %scpol, %scpha, %dHz\n", |
| 777 | spi->bits_per_word, | 760 | spi->bits_per_word, |
| 778 | spi->mode & SPI_CPOL ? "" : "~", | 761 | spi->mode & SPI_CPOL ? "" : "~", |
